TW536782B - Method for forming dual-damascene trench - Google Patents

Method for forming dual-damascene trench Download PDF

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Publication number
TW536782B
TW536782B TW91108746A TW91108746A TW536782B TW 536782 B TW536782 B TW 536782B TW 91108746 A TW91108746 A TW 91108746A TW 91108746 A TW91108746 A TW 91108746A TW 536782 B TW536782 B TW 536782B
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Taiwan
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layer
forming
semiconductor substrate
hole
patent application
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TW91108746A
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Chinese (zh)
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Tien-I Bao
Syun-Ming Jang
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Taiwan Semiconductor Mfg
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Abstract

A kind of method for forming dual-damascene trench is provided in the present invention. At first, a semiconductor substrate is provided; and a hole, which is filled up by resin material, is formed on the semiconductor substrate. Then, an amine separation layer, a bottom anti-reflection layer and a patterned photoresist layer are sequentially formed on the semiconductor substrate and resin material filling with the hole. After that, by using the patterned photoresist layer as the mask, the bottom anti-reflection layer and the amine separation layer are etched. Finally, by using the patterned photoresist layer and the bottom anti-reflection layer as the mask, the semiconductor substrate is etched.

Description

536782 五、發明說明(l) -- 在現今半導體積體電路製程中,光學微影 (photolithography)程序可說是極為關鍵性的步驟,其 能否將所設計的線路圖案精確地轉移到半導體基底上,是 決定產品性質的重要因素之一。通常,微影程序包括:塗 佈(coating)光阻、曝光(eXp0Sure)、顯影 (development )、和去除光阻等幾個主要步驟。近年來 ’隨^元件尺寸持續縮小化的發展,微影技術之改進將面 臨更嚴苛的挑戰,其對於元件之品質、良率及成本具有 鍵性之影響。 在〇· 13或0· 1〇微米(#„!)之微影製程中,由於定義 圖案之光阻,在製程中受到污染,致使在曝光時光化學反 應不全’而在進行後續顯影步驟時餘留殘渣(scum ),特 別疋使用於248及1 93奈米(nm )曝光光源之光阻,進而 使定義出的圖案失真,嚴重影響元件之電性。 請參考第la至lh圖,第la至lh圖係習知之先形成介層 洞之形成雙鑲嵌溝槽的方法之步驟示意圖。 、請參考第1&圖,首先,提供一半導體基底101,在半 導體基底101上形成具有開口之光阻(未顯示),並以此具 有開口之光阻為罩幕,蝕刻半導體基底丨〇 i以形成一介層 洞102,然後將光阻移除;其中半導體基底1〇1例如是矽基 底0 /請參考第lb圖,於形成有介層洞1〇2的半導體基底1〇1 上形成=樹脂層103,介層洞1〇2中亦會填滿樹脂層1〇3。 接著,對樹脂層103進行回蝕刻(etch back),直至露536782 V. Description of the Invention (l)-In today's semiconductor integrated circuit manufacturing process, the photolithography process can be said to be a very critical step. Can it accurately transfer the designed circuit pattern to the semiconductor substrate? This is one of the important factors that determines the nature of the product. Generally, the lithography process includes several main steps: coating photoresist, eXpoSure, development, and removal of photoresist. In recent years, as the size of components continues to shrink, improvements in lithography technology will face more severe challenges, which have a key impact on the quality, yield and cost of components. In the lithography process of 0.13 or 0.10 micron (# „!), The photoresist that defines the pattern is contaminated during the process, resulting in incomplete photochemical reactions during exposure. Residues (scum), especially for photoresistance of 248 and 193 nanometer (nm) exposure light sources, which will distort the defined pattern and seriously affect the electrical properties of the components. Please refer to Figures la to lh, and la Figure lh is a schematic diagram of a conventional method for forming a double damascene trench by first forming a via hole. Please refer to FIG. 1 & First, a semiconductor substrate 101 is provided, and a photoresist having an opening is formed on the semiconductor substrate 101 (Not shown), and using the photoresist with an opening as a mask, the semiconductor substrate is etched to form a via hole 102, and then the photoresist is removed; the semiconductor substrate 101 is, for example, a silicon substrate. Referring to FIG. 1b, a resin layer 103 is formed on the semiconductor substrate 101 formed with the via hole 102, and the resin layer 103 is also filled in the via hole 102. Then, the resin layer 103 is filled. Etch back until exposed

0503-7668TWF(N) ; TSMC200M308 ; Claire.ptd 5367820503-7668TWF (N); TSMC200M308; Claire.ptd 536782

出半導體基底ιοί的表面為止,如第1(:圖所示。 請參考第Id圖,接著,在半導體基底1〇1及在填滿 層洞102之樹脂層103所露出之表面上形成一底抗反射層 104,底抗反射層1〇4是用來在後續形成溝槽的步驟中來 為阻隔的用處。 請參考第1 e圖,然後,於底抗反射層丨〇4上形成一光 阻層105,並利用曝光將光罩(未顯示)上之溝槽的圖案轉 移至光阻層1 0 5,並對光阻層1 〇 5進行蝕刻以形成開口 1 〇 6 ;其中光阻層1 0 5為一種有機材料。The surface of the semiconductor substrate is shown as shown in Figure 1 (:). Please refer to Figure Id. Then, a bottom is formed on the surface of the semiconductor substrate 101 and the exposed surface of the resin layer 103 filling the hole 102. The anti-reflection layer 104 and the bottom anti-reflection layer 104 are used as a barrier in the subsequent step of forming a trench. Please refer to FIG. 1e, and then form a light on the bottom anti-reflection layer 〇04. The photoresist layer 105, and the pattern of the grooves on the photomask (not shown) is transferred to the photoresist layer 105 by exposure, and the photoresist layer 105 is etched to form an opening 106; wherein the photoresist layer 1 0 5 is an organic material.

树月曰層1〇3疋一種含有胺類化合物(amine)成分之材 料,但是底抗反射層1 0 4對胺類化合物而言並不是一種很 好的阻隔層’因此在形成光阻層1 〇 5後,樹脂層1 〇 3中所含 有的胺類化合物會穿過底抗反射層104與光阻層105反應, 而在樹脂1 0 3上方之底抗反射層1 〇 4之表面上會形成殘渣 1 〇 7。因為殘渣1 〇 7不能被蝕刻底抗反射層丨〇 4之蝕刻液去 除,因此在後續之以光阻105為罩幕蝕刻底抗反射層1〇4以 在底抗反射層1 0 4上形成開口時,殘渣1 〇 7亦會成為一個罩 幕層,底抗反射層1 04無法形成如開口 1 〇6同樣的開口,將 會被蝕刻成兩個較小的開口 1 〇 8,如第1 f圖所示。 請參考第1 g圖,以具有開口 1 〇 8之光阻1 0 5及底抗反射 層1 04為罩幕,蝕刻半導體基底1 〇 1以形成溝槽。 在進行蝕刻並去除底抗反射層104及樹脂層103後,會 在半導體基底101上形成不連續的溝槽109,如第lh圖所 示〇Shuyue said layer 103 is a material containing amine components, but the bottom anti-reflection layer 104 is not a good barrier layer for amine compounds. Therefore, photoresist layer 1 is being formed. After 〇5, the amine compounds contained in the resin layer 103 will pass through the bottom anti-reflection layer 104 and react with the photoresist layer 105, and on the surface of the bottom anti-reflection layer 104 above the resin 103, A residue 10 was formed. Since the residue 1 07 cannot be removed by the etching solution for etching the bottom anti-reflection layer 〇04, the photoresist 105 is used as a mask to etch the bottom anti-reflection layer 104 to form the bottom anti-reflection layer 104. When opening, the residue 1 07 will also become a cover layer. The bottom anti-reflection layer 104 cannot form the same opening as the opening 10, and will be etched into two smaller openings 108, as in the first. f picture. Referring to FIG. 1g, using a photoresist 105 having an opening 108 and a bottom anti-reflection layer 104 as a mask, the semiconductor substrate 101 is etched to form a trench. After etching and removing the bottom anti-reflection layer 104 and the resin layer 103, discontinuous trenches 109 are formed on the semiconductor substrate 101, as shown in FIG. 1h.

0503-7668TWF(N) ; TSMC2001-1308 ; Claire.ptd 第5頁 536782 五、發明說明(3) 因為殘渣107會影響丰道 也會影響阻劑的線寬,因導^體基底101上之溝槽的製造, 步驟之前,需進行將額外 2::刻底抗反射層104的 1〇7。 、★〜及餘刻步驟來去除殘渣 形成ΐ此不i::在於提供-種避免光阻殘渣 可有效形成符合;r二;:::除光阻殘渣的步驟’即 根據上述目的,本發明挺 _ t 法,包括下列步驟:提供導體;,成雙;嵌溝槽的方 形成-孔洞;以樹脂材料填;^導^基底,☆半導體基底上 、、n夕抖供从W L 真滿孔洞,於半導體基底及填滿 洞之树月曰材料上依序形成一胺類 及一圖案化光阻層;以圖宰化光卩且厣炎^苴底抗反射層 M ^ Ji ^ ^ ^ ^ 間系化光阻層為罩幕,蝕刻底抗反 射層及胺類阻隔層;及以圖案化 幕餘刻半導體基底。 ^底抗反射層為罩 鑲= 發明再提供本發明提供-種形成雙 括下列步驟:提供-半導體基底,於 :=基底上形成一孔洞;以樹脂材料填滿孔洞;於半導 體基底及填滿孔洞之樹脂材料上依序形成一旋塗材料層、 一底抗反射層及一圖案化光阻層;以圖案化光阻層為^幕 ,蝕刻底抗反射層及旋塗材料層;及以圖案化光阻層及底 抗反射層為罩幕蝕刻半導體基底。 θ 一 根據上述目的,本發明更提供本發明提供一種形成雙 鑲嵌溝槽的方法,包括下列步驟:提供一半導體芙底,於 半導體基底上形成一孔洞;以樹脂材料填滿孔洞^於半導 0503-7668TWF(N) ; TSMC200M308 ; Claire.ptd 第6頁 536782 五、發明說明(4) 體基底及填滿孔洞之谢p ^丨 一 層、-底抗反射層及一』依序形成-低溫沉積材料 罩幕,親心;阻層、:以圖案化光阻層ΐ 阻層及底抗反射層為i篡铋,/儿積材料層;及以圖案化光 町層為罩幕蝕刻半導體基底。 G先 根J上述目的,本發明另提供 方法,包括下列步驟:提供 溝槽的 層洞;回敍刻樹脂層’其中樹脂層會填滿介 表面之樹脂層==产=底表面;於"底及露出 曰丄〜风与度為50 Α至50Κ Α夕τ — 1 ; 山 層,·於I - 1 i n e光阻層上开彡此一广 n e光阻 上形成一經圖案轉移之H幸二几f層’於底抗反射層 ,雜抗反射Π;”,且:以圖案化光阻為單幕 有開口之圖案化=層 -開口;以具 在梦基底形成一溝槽=吻基底以 及I-line光阻層。 去除0案^阻層、底抗反射層 實施例: 請參考第2a至2f圖,第2&至以圖係本發明之形成 嵌溝槽的方法之步驟示意圖。0503-7668TWF (N); TSMC2001-1308; Claire.ptd Page 5 536782 V. Description of the invention (3) Because the residue 107 will affect the abundance and the line width of the resist, because of the groove on the substrate 101 Before the process of manufacturing the grooves, an additional 2: 7 of the bottom 2: anti-reflection layer 104 needs to be etched. , ★ ~, and the remaining steps to remove the residue formation i :: is to provide-a way to avoid the formation of photoresist residues can be effectively formed in accordance with; r two ::: Steps of removing photoresist residues, that is, according to the above purpose, the invention The t_t method includes the following steps: providing a conductor; double; forming a square with a trench embedded in-a hole; filling with a resin material; ^ guide ^ substrate, ☆ on the semiconductor substrate, and n trembling from WL true full holes An amine and a patterned photoresist layer are sequentially formed on the semiconductor substrate and the tree-filled material filled with holes; the photoresist layer and the anti-reflection layer M ^ Ji ^ ^ ^ ^ The interlayered photoresist layer is a mask, and the bottom anti-reflection layer and the amine barrier layer are etched; and the semiconductor substrate is etched with a patterned curtain. ^ The bottom anti-reflection layer is a mask. The invention provides the invention. The invention provides a method of forming the following steps: providing a semiconductor substrate, forming a hole in the substrate; filling the hole with a resin material; filling the semiconductor substrate with the material. A spin-coated material layer, an anti-reflection layer, and a patterned photoresist layer are sequentially formed on the resin material of the holes; the bottom anti-reflection layer and the spin-coated material layer are etched using the patterned photoresist layer as a curtain; and The patterned photoresist layer and the bottom anti-reflection layer are mask etching semiconductor substrates. θ According to the above-mentioned object, the present invention further provides a method for forming a dual damascene trench, which includes the following steps: providing a semiconductor substrate to form a hole in the semiconductor substrate; filling the hole with a resin material ^ on the semiconductor 0503-7668TWF (N); TSMC200M308; Claire.ptd Page 6 536782 V. Description of the invention (4) The body substrate and the holes filled with it ^ 丨 one layer,-bottom anti-reflection layer and one "sequentially formed-low temperature deposition Material mask, dear; resist layer: using patterned photoresist layer, resist layer and bottom anti-reflection layer as i-bismuth, / layer material layer; and patterned photomachin layer as mask for etching semiconductor substrate. According to the foregoing objectives, the present invention further provides a method, which includes the following steps: providing a layer hole of a groove; and engraving the resin layer 'where the resin layer will fill the resin layer on the mesial surface == PRODUCT = bottom surface; The bottom and the exposure are 丄 ~ the wind and the degree are 50 Α to 50Κ Αnight τ — 1; the mountain layer, on the I-1 ine photoresist layer is opened on this wide ne photoresist to form a pattern H Hoshiji Several f layers' on the bottom anti-reflection layer, hetero anti-reflection Π; ", and: patterned photoresist as a single screen pattern with openings = layer-opening; with a groove in the dream substrate = kiss substrate and I-line photoresist layer. Example of removing a resist layer and a bottom anti-reflection layer: Please refer to Figs. 2a to 2f, and Fig. 2 to Fig. Are schematic diagrams of steps of the method for forming a trench embedded in the present invention.

遙# I 5二第h圖’百先,提供一半導體基底201,在半 導體基底201上形成具有開口之光阻(未顯示),並以此具 有開口、之光阻為罩|,餘刻半導體基底2()1以形成一孔洞 202,然後將光阻移除;其中半導體基底2〇1例如是矽基 底;孔洞2 0 2係作為介層洞。 請參考第2b圖,於形成有孔洞2〇2的半導體基底2〇1上Remote # I 5 2 Figure h. Baixian, providing a semiconductor substrate 201, forming a photoresist (not shown) with an opening on the semiconductor substrate 201, and using this photoresist with an opening as a cover | The substrate 2 () 1 forms a hole 202, and then the photoresist is removed; the semiconductor substrate 201 is, for example, a silicon substrate; the hole 202 is used as a via hole. Please refer to FIG. 2b, on the semiconductor substrate 201 where the hole 20 is formed

536782536782

形成二樹脂層203,孔洞202中亦會填滿樹脂層2〇3。Two resin layers 203 are formed, and the hole 202 will also be filled with the resin layer 203.

凊參考第2c圖,接著,對樹脂層203進行回蝕刻(etch ac ,直至露出半導體基底201的表面為止;並且,在半 導體基底201及在填滿孔洞2〇2之樹脂層2〇3所露出之表面 上形成一胺類阻隔層,例如卜Hne光阻層2〇4 ;其中, I-line光阻層2〇4的厚度約為5〇 A至5〇]( A左右。卜Hne光 阻層204是一種可在丨 — iiw光線下曝光的光阻,例如曝光 波長在248 nm之光阻,包括365 nm,193 nm等;通常使用 於線=為0· 13或〇· 1〇微米()之微影製程。 "月參考第2d圖,接著,在I-line光阻層204上形成一 底抗反射層205,並在底抗反射層2〇5上形成一光阻層 20 6,光阻層206是一種有機材料,例如是DVV193或適用 於193nm之光阻等材料。並利用曝光將光罩(未顯示)上之 溝槽的圖案轉移至光阻2〇6,並對光阻層2〇6進行蝕刻以形 成開口 20 7 ;其中,底抗反射層2〇5除了可以隔絕形成光阻 層206對半導體基底2〇1的傷害之外,更可在後續形成溝槽 的步驟中來作為蝕刻半導體基底2〇 1以形成溝槽時之罩 幕0凊 Referring to FIG. 2c, the resin layer 203 is etched back (etch ac until the surface of the semiconductor substrate 201 is exposed; and the semiconductor substrate 201 and the resin layer 203 filled with the holes 202 are exposed An amine-based barrier layer is formed on the surface, such as a Hne photoresist layer 204; wherein the thickness of the I-line photoresist layer 204 is about 50 A to 50] (A. Bu Hne photoresist Layer 204 is a type of photoresist that can be exposed under ii—iiw light, for example, a photoresist with an exposure wavelength of 248 nm, including 365 nm, 193 nm, etc .; usually used for line = 0.13 or 0.10 microns ( The photolithography process is described in reference to Figure 2d. Next, a bottom anti-reflection layer 205 is formed on the I-line photoresist layer 204, and a photoresist layer 20 6 is formed on the bottom anti-reflection layer 205. The photoresist layer 206 is an organic material, such as DVV193 or a photoresist suitable for 193nm, and the pattern of the groove on the photomask (not shown) is transferred to the photoresist 206 by exposure, and the photoresist The resist layer 206 is etched to form an opening 20 7; wherein the bottom anti-reflection layer 205 can be isolated to form a photoresist layer 206 to the semiconductor 2〇1 damage than the substrate, but also at the subsequent step of forming the groove by etching the semiconductor substrate a mask of 0. 1 to form a trench 2〇

因為卜1 ine光阻層204對胺類化合物而言是一種好的 阻隔層’因此當光阻層2〇6形成在I-line光阻層204上時, 樹月曰層203中的胺類化合物不會穿過I — iine光阻層204,所 以不會與形成在底抗反射層20 5上之光阻層206反應,在樹 月曰層203上方之底抗反射層205的表面上就不會有殘渣產 生,沒有殘渣產生就不會影響後續形成溝槽的形狀,也就Because the photoresist layer 204 is a good barrier layer for amine compounds, when the photoresist layer 206 is formed on the I-line photoresist layer 204, the amines in the tree layer 203 The compound does not pass through the I-iine photoresist layer 204, so it does not react with the photoresist layer 206 formed on the bottom anti-reflection layer 205, and it is on the surface of the bottom anti-reflection layer 205 above the tree moon layer 203. No residue will be generated, and the shape of the subsequent grooves will not be affected if no residue is generated.

〇503-7668TWF(N) ; TSMC200M308 ; Claire.ptd 第8頁 536782〇503-7668TWF (N); TSMC200M308; Claire.ptd Page 8 536782

536782 圖式簡單說明 為使本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉一較佳實施例,並配合所附圖式,作詳 細說明如下: 第1 a至1 h圖係習知之先形成介層洞之形成雙鑲嵌溝槽 的方法之步驟示意圖。 第2a至2f圖係本發明之形成雙鑲嵌溝槽的方法之步驟 示意圖。 符號說明: 1 0 2〜介層洞; 1 0 4〜底抗反射層 1 0 6〜開口; 1 0 8〜開口; 2(Π〜半導體基底 2 0 3〜樹脂層; 2 0 5〜底抗反射層 2 0 7〜開口; 101〜半導體基底 1 0 3〜樹脂層; 1 0 5〜光阻層; 1 0 7〜殘渣; 1 0 9〜溝槽; 2 0 2〜孔洞; 204〜I-line光阻 2 0 6〜光阻層; 2 0 8〜溝槽。536782 A brief description of the drawings In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is described below in conjunction with the accompanying drawings to make a detailed description as follows: The 1 h diagram is a schematic diagram of the steps of a conventional method for forming a dual damascene trench by first forming a via hole. Figures 2a to 2f are schematic diagrams of the steps of the method of forming a dual damascene trench according to the present invention. Explanation of symbols: 1 0 2 ~ interlayer hole; 1 0 4 ~ bottom anti-reflection layer 10 6 ~ opening; 10 8 ~ opening; 2 (Π ~ semiconductor substrate 2 3 3 ~ resin layer; 2 5 5 ~ bottom impedance Reflective layer 207 ~ opening; 101 ~ semiconductor substrate 103 ~ resin layer; 105 ~ photoresist layer; 107 ~ residue; 109 ~ trench; 202 ~ hole; 204 ~ I- Line photoresist 206 ~ photoresist layer; 208 ~ trench.

0503-7668TWF(N) ; TSMC2001-1308 ; Claire.ptd 第10頁0503-7668TWF (N); TSMC2001-1308; Claire.ptd page 10

Claims (1)

536782 六 申請專利範圍 1 接:種^成雙鑲嵌溝槽的方法’包括下 = 半導體基底’於該半導體基底上形成驟 以Μ月曰材料填滿該孔洞; 成 * 2 :玄半導體基底及填滿該孔洞之該樹脂材料 :增 底抗反射層及一圖案化光料 想阳= 光阻層為罩幕,餘刻該底抗反射^ 類阻隔層;及 对層及該胺 基底以圖案化光阻層及該底抗反射層為罩幕餘刻該半導 2.如申請專利範圍第丨項所述之形成雙鑲嵌 法,其中更包括將該底抗反射層及該胺類阻 的方 驟。 ㈢去除的步 體 3 ·如申請專利範圍第1項所述之形成雙鑲哉 法,其中該半導體基底為矽基底。 〜 4 ·如申请專利範圍第1項所述之形成雙鑲嵌 法’其中該孔洞為介層洞。 /冓槽的 溝槽的 方 方 法 法 5·如申請專利範圍第丨項所述之形成雙鑲嵌 ,其中該胺類阻隔層為1一1 ine光阻層。 彳曰的方 6·如申請專利範圍第5項所述之形成雙鑲嵌溝 ,其中該I- line光阻層之厚度為50A至。槽的方 7 · —種形成雙鑲嵌溝槽的方法,包括下列步 提供一半導體基底,於該半導體基底上形成—· 以樹脂材料填滿該孔洞; —孔洞; 於該半導體基底及填滿該孔洞之該樹脂材 上依序形536782 Six applications for patent scope 1 Connection: a method of forming a dual damascene trench 'including the following = a semiconductor substrate' forms a hole on the semiconductor substrate to fill the hole with a material; forming a second semiconductor substrate and filling The resin material that fills the hole: a bottom-increased anti-reflection layer and a patterned optical material. The photoresist layer is a mask, and the bottom is an anti-reflection ^ type barrier layer; and the layer and the amine substrate are patterned with light. The resist layer and the bottom anti-reflection layer are the mask and the semiconducting. 2. The double-damascene method described in item 丨 of the patent application scope, which further includes a step of blocking the bottom anti-reflection layer and the amine. . Steps for removing ytterbium 3-The method of forming a dual damascene as described in item 1 of the scope of patent application, wherein the semiconductor substrate is a silicon substrate. ~ 4 • The double-damascene formation method described in item 1 of the scope of the patent application, wherein the hole is a via hole. Method for forming trenches in the trenches 5. Form a double damascene as described in item 丨 of the patent application, wherein the amine barrier layer is a 1 to 1 ine photoresist layer. The following formula 6: The double damascene groove is formed as described in item 5 of the scope of patent application, wherein the thickness of the I-line photoresist layer is 50A to 50A. The method of forming a trench 7-a method of forming a dual damascene trench, comprising the steps of providing a semiconductor substrate and forming on the semiconductor substrate-filling the hole with a resin material;-a hole; filling the semiconductor substrate and filling the hole Holes in the resin material 536782 、申請專利範圍 成碇塗材料層、一底抗反射層及一圖案化光阻層; 塗材圖;化光阻層為罩[触刻該底抗反射層及該旋 體基=4圖案化光阻層及該底抗反射層為罩幕蝕刻該半導 法 驟 m ί ί利範圍第7項所述之形成雙鑲嵌溝槽的方 八更匕括將該底抗反射層及t亥旋塗材料層去除的步 9·如申請專利範圍第7項所述之 法’其中該半導體基底㈣基底。n溝槽的方 10. 如申請專利範圍第7 法,其中該孔洞為介層洞。 形成雙鑲肷溝槽的方 11. 如申請專利範圍第7項所述之 法’其中該旋塗材料層為光阻層成又鑲肷溝槽的方 12. 如申請專利範圍第"項所述之 方法’其中該1-1 ine光阻層# # /。成又鑲肷溝槽的 ^種形成雙鑲嵌溝胃槽之 提供-半導體基底,於該半導體基底上V成驟: 以樹脂材料填滿該孔洞; &上形成一孔洞; 於該半導體基底及填滿該孔 成一低溫沉積材料層、-底抗反射層;圖1:上依序形 以該圖案化光阻層為軍幕,钮 固^:匕光阻層; 溫沉積材料層;及 -彳几反射層及該低 以該圖案化光阻層及該底 π層為罩幕蝕刻該半導536782, the scope of the patent application is to coat the material layer, an anti-reflection layer and a patterned photoresist layer; the coating material map; the photoresist layer is a cover [engraving the bottom antireflection layer and the rotating base = 4 pattern The photoresist layer and the bottom anti-reflection layer are masks, and the semi-conductive method described in item 7 of the method for forming a double mosaic groove described in item 7 above includes the bottom anti-reflection layer and t Step 9 of removing the spin-coated material layer: The method as described in item 7 of the scope of patent application, wherein the semiconductor substrate is a substrate. The method of n trench 10. As in the seventh method of the patent application scope, the hole is a via hole. Method for forming double inlay trench 11. Method as described in item 7 of the scope of patent application 'wherein the spin-coating material layer is a photoresist layer into inlay groove. 12. As in the scope of patent application " The method described, wherein the 1-1 ine photoresist layer ## /. Provided by the formation of a double-inlaid trench groove into a trench-semiconductor substrate, a semiconductor substrate is formed on the semiconductor substrate: filling the hole with a resin material; & forming a hole in the semiconductor substrate and Fill the hole to form a low-temperature deposition material layer, a bottom anti-reflection layer; Figure 1: The patterned photoresist layer is used as a military curtain on the top, and the button is fixed: a photoresist layer; a layer of warm deposition material; and-反射 several reflective layers and the patterned photoresist layer and the bottom π layer as a mask to etch the semiconductor 0503-7668TWF(N) ; TSMC200M308 ; Claire.ptd 第12頁 536782 六、申請柄顧 ' ' -- 體基底。 、1 4 ·如申請專利範圍第丨3項所述之形成雙鑲嵌溝槽的 方法,其中更包括將該底抗反射層及該低溫沉積材料層去 除的步驟。 1 5·如申請專利範圍第丨3項所述之形成雙鑲嵌 方法’其中該半導體基底為矽基底。 1 6·如申請專利範圍第丨3項所述之形成雙鑲嵌 方法,其中該孔洞為介層洞。 曰 、17·如申請專利範圍第13項所述之形成雙鑲嵌溝槽的 方法’其中該低溫沉積材料層為丨-丨ine光阻層。 曰 、、18·如申請專利範圍第17項所述之形成雙鑲嵌溝槽的 方法’其中31-line光阻層之厚度為50A至50KA。 19· 一種形成雙鑲嵌溝槽的方法,包括下列步驟: 提供一矽基底,於該矽基底上形成一介層洞; 於该矽基底上形成一樹脂層,其中該樹脂層會填滿該 介層洞; ' /' 〃 回姓刻該樹脂層以露出該矽基底表面; 於该石夕基底及露出表面之該樹脂層上形成一厚度 A至50KA之I-line光阻層; 又” 於該I-line光阻層上形成一底抗反射層; 於該底抗反射層上形成一經圖案轉移之圖案化光阻; 以該圖案化光阻為罩幕,蝕刻該底抗反射層及該, I - 1 i n e光阻層以形成一開口; 以具有該開口之該圖案化光阻層及該底抗反射層為罩0503-7668TWF (N); TSMC200M308; Claire.ptd Page 12 536782 6. Apply for a handle ''-body substrate. 14. The method for forming a dual damascene trench as described in item 3 of the patent application scope, further comprising the step of removing the bottom anti-reflection layer and the low-temperature deposition material layer. 15. The method of forming a dual damascene as described in item 丨 3 of the scope of the patent application, wherein the semiconductor substrate is a silicon substrate. 16. The method of forming a dual damascene as described in item 3 of the patent application scope, wherein the hole is a via hole. That is, the method of forming a dual damascene trench as described in item 13 of the scope of the patent application, wherein the low-temperature deposition material layer is a photoresist layer. That is, the method of forming a dual damascene trench as described in item 17 of the scope of the patent application, wherein the thickness of the 31-line photoresist layer is 50A to 50KA. 19. A method of forming a dual damascene trench, comprising the following steps: providing a silicon substrate to form a via hole on the silicon substrate; forming a resin layer on the silicon substrate, wherein the resin layer will fill the interlayer Hole; '/' 〃 engraved the resin layer to expose the surface of the silicon substrate; forming an I-line photoresist layer with a thickness of A to 50KA on the resin substrate and the exposed surface of the resin layer; Forming a bottom anti-reflection layer on the I-line photoresist layer; forming a patterned photoresist on the bottom antireflection layer; using the patterned photoresist as a mask, etching the bottom antireflection layer and the, I-1 ine photoresist layer to form an opening; using the patterned photoresist layer and the bottom anti-reflection layer as the cover 0503-7668TW(N) * TSMC200M308 ; Claire.ptd 第13頁 5367820503-7668TW (N) * TSMC200M308; Claire.ptd Page 13 536782 0503-7668TWF(N) ; TSMC2001-1308 ; Claire.ptd 第14頁0503-7668TWF (N); TSMC2001-1308; Claire.ptd page 14
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