530425 A7 經濟部智慧財產局員工消費合作社印製 五、發明説明（） 自從60年代初期第一顆半導體雷射發明以來，半導體雷射科 技曰新月異，直至今日’半導體雷射在我們的曰常生活中扮演著重 要的角色。諸如光纖通訊，DVD唱盤，雷射印表機等及其他為數眾 多的應用，其中由於光纖具有高速、高容量、寬頻等優點，使光寬 頻通訊更成為電信事業之主流。 1970年代，GaAs/AlGaAs雷射二極體被應用於第一代的光纖通 訊系統’發展至今使用傳輸損耗及色散最低的丨.3及L 55微米波長 的雷射二極體，甚而具有單模優點的分佈迴授式雷射二極體。由發 光之鏡面所在而言，起先有屬於共振腔平行半導艎基底，光由劈裂 面輸出的「邊射型雷射」；以及近年來，Soda及Iga等人提出，光 垂直晶片表面射出的「垂直共振腔型式面射型雷射」（VCSEL) (VCSELS; vertical-cavity surface-emitting lasers)。而垂直 共振腔雷射的重大突破乃是在1989年由Tai等人所提出，以量子井 結構做為動作層、以兩個高反射的分佈式布拉格反射鏡(DBR)做為光 共振腔的垂直共振腔雷射。自此，垂直共振腔面射型雷射成為發展 重點並在幾年中迅速發展。總而言之，垂直共振腔面射型雷射之結 構包含一雙異質接面之pn接面二極體，上下並夹以兩個高反射的鏡 面’光垂直晶片表面射出。 圖1是一種常見的VCSEL結構，VCSEL與傳統透射型雷射比較， 光在垂直作用區的方向共振，因此共振腔長度(作用層厚度)極小， 由雷射發生的臨界增益條件公式中可知，要能產生雷射的臨界增益 舆共振腔長度成反比，因而極短的共振腔將會增加臨限電流，也因 此需要一個高效率的共振腔，使得共振反射鏡DBR品質要求極高(99% 以上）。因此DBR交互層中反射率則視對的數目、折射率之區別及邊 界情況而定，目的是要得到反射光建設性的干涉。用反射率差異最 大’並且可以穿透光的材料，便可得到反射率高的反射鏡。其次， 這結構的的共通點，也是主要目的是在於使得VCSEL (VCSELS ; vertical-cavity surface-emitting lasers)的橫向範圍受到限制， 降低不必要的損耗，也因此才可製造出連續波操作的元件。 最近發展的VCSEL的橫向範圍限制方法中，氧化限制法所做出 的VCSEL-所謂的周邊氧化型表面發光二極體，可以有效的產生光及 電之侷限，已經可以得到低臨電流及高效率的雷射。用此法時，首 先要成長A1含量極高的AlGaAs或AlAs，在濕氧下將其轉變成低折 本紙張尺度適用中關家標準（CNS ) A4規格（21GX297公釐) '' (請先閱讀背面之注意事項再填寫本頁) 裝· 、1T_ 線 530425 A5 B5 射率、絕緣的鋁氧化物，在中間形成開口之大小則視氧化的溫度與） 時間而定，因此可以得到相當好的電流控制。 現有之低溫長時間氧化方法雖可行，但是如何利用高溫氧化快之 特性，配合現有低溫氧化慢之特性來加速氧化之進行，再加上石英 船平流裝置之設計，使其更為可行。 、 簡而言之，最近由ιπ·ν族化合物半導體氧化產生的高品質絕緣 氧化薄膜被證實，在眾多化合物半導體的氧化研究中，已形成三氧 化二鋁（Al2〇3)最為容易，而且Α12〇3是一穩定的氧化物。在雷 射元件方面，它可運用於垂直腔面射型雷射，作為侷限層來降低雷 射的臨界電流，成為光發射元件，作為通信元件不可或缺的一部份。 目前化合物半導體氧化層的形成是採用低溫長時間（400〜450°c)擴 散來達成期望的氧化層深度；但因為需要花費長時間，故基於成本 控制及成品交期等因素，採用此方法並不適當。 本發明鑑於以往氧化的方法需要長時間來完成，故提出一種多 階段式化合物半導體氧化層深度控制的方法，它既可精確的控制氧 化層深度，且又不需耗費長時間來完成，為一種節省成本的可行方 i-，特此申請專利--—-_ (請先閱讀背面之注意事項再填寫本頁各攔) 窣· b -、 、言 Γ 經濟部智慧財產局員工消費合作社印製 較佳之實施例一： 蠢晶部分： 周邊氧化型表面發光二極體之製造，首先包含：以氣相 磊晶M0CVD或分子束磊晶MBE，形成發光元件所須結構之半導 體層（EPILAYERS)之步驟，用以形成複數個多層半導體層（下反 射層 B0TT0M-DBR，動作層 ACTIVE LAYER，上反射層 TOP-DBR) 於基板上，如圖一所示，其中該形成半導體層之步驟包含，形 成第一型半導髏層於該基板上，以及隨後形成第二型半導體層 於該第一型半導體層上。其中該形成半導體層之步驟更包含， 在形成該第一型半導體層、該發光層、以及該第二型半導層之 前，形成第一型緩衝層於該基板上。其中更包含，在形成該第 一型緩衝層、該第一型半導體層、該發光層、該第二型半導體 層、以及該第二型接觸層之前，形成核化層於該基板上(未圖 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 530425 (^L6ZX0\Z ) ( SND )东芻洚® 1 示），在本實施例之周邊氧化型表面發光二極邋之製造中，其 中該第一塑係Ν型，該第二型係Ρ型。 製程部分： 其次為形成第一歐姆接觸層於該複數個半導艨層之下未 受蝕刻下表面上；以及形成第二歐姆接觸層於該複數個半導難 層中受蝕刻後之嗪露表面上，製成用以連接至外界之周邊氧化 型表面發先二極艎元件，其中包含：形成第_包覆電極以包覆 著基材之一端；形成第二包覆電極以包覆著該基材之另一端： 則須進行以下之步騍： 步驟1:晶片清洗 (1)將欲清洗之磊晶後晶片於三氣乙烯<TCE)、丙銅(ACE)溶液中， 以電熱板加熱焘5分鐘，再利用超音波振洗5分鐘。 2)將步驟i之溶液換為甲酵，並重複步騍1 〇 (3) 將晶片以去離子水沖洗5分鐘。 (4) 將晶片取出，並以氮氣搶吹乾❶ _______________________________ (1) 晶片清洗完成，於烤箱中去水烘烤5分鐘。 (2) 旋塗機塗佈光阻。 (3) 將塗佈好光阻之蟲片，於真空烤箱中軟烤30分鐘。 (4) 將軟烤之晶片取邊緣較厚之先阻去除，以光單對準機將晶 片光罩對準、爆光β (5) 曝光完成之晶片顯影，並以氮氣清洗吹乾。 (6) 再次以光單對準機將所需之光單圈案，轉移至晶片上區域曝光， 並重複步驊2〇 步驊3.十型歐姆接觸層金屬蒸鍍 (1) 以熱蒸鍍系统將歡姆接觸層金屬鍍於晶片0 (2) 將鍵好金屬之晶片置入丙綱液中，以超音波震盪器加迷掀離為 止0 步驟4:快速熱退火RTA 將晶片置入快逮熱退火處理機中，快速升溫至400-500C，20秒，目 的在使得金屬歐姆層緊密結合，以降低歐姆接觸電阻° 步驟5:研磨及刨光 研攀晶片背面至厚度為25(k油以下，並于α撤光。530425 A7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention () Since the first semiconductor laser was invented in the early 1960s, semiconductor laser technology has changed rapidly. Plays an important role in daily life. Such as optical fiber communications, DVD players, laser printers, and many other applications, among which optical fiber has the advantages of high speed, high capacity, and broadband, making optical broadband communications the mainstream of telecommunications. In the 1970s, GaAs / AlGaAs laser diodes were used in the first generation of fiber-optic communication systems. 'Development to date has used laser diodes with the lowest transmission loss and dispersion. .3 and L 55 micron wavelengths, even with single mode Advantages of distributed feedback laser diodes. From the point of view of the light-emitting mirror, there is firstly an "edge-emitting laser" that belongs to the cavity parallel semiconducting chirped base, and the light is output from the split surface; and in recent years, Soda and Iga et al. "VCSELS" (VCSELS; vertical-cavity surface-emitting lasers). The major breakthrough in vertical cavity lasers was proposed by Tai et al. In 1989. The quantum well structure was used as the action layer, and two highly reflective distributed Bragg reflectors (DBR) were used as optical resonators. Vertical cavity laser. Since then, vertical cavity surface-emitting lasers have become the focus of development and have developed rapidly over the years. In a word, the structure of the vertical cavity surface-emitting laser includes a pn junction diode with a double heterojunction, and two high-reflection mirrors' light are emitted vertically from the wafer surface. Figure 1 is a common VCSEL structure. Compared with a traditional transmission laser, VCSELs resonate in the direction of the vertical action zone, so the length of the resonant cavity (the thickness of the active layer) is extremely small. It can be known from the formula of the critical gain condition for laser generation, To be able to generate the critical gain of the laser, the cavity length is inversely proportional, so the extremely short cavity will increase the threshold current. Therefore, a high-efficiency cavity is needed, making the quality of the resonant mirror DBR extremely high (99% the above). Therefore, the reflectivity in the DBR interactive layer depends on the number of pairs, the difference in refractive index, and the boundary conditions. The purpose is to obtain constructive interference of reflected light. Using a material that has the largest difference in reflectivity and that can penetrate light, a mirror with high reflectance can be obtained. Secondly, the common point of this structure is also the main purpose is to limit the lateral range of VCSELs (VCSELS; vertical-cavity surface-emitting lasers), reduce unnecessary losses, and thus make continuous wave operation components. . Among the recently developed lateral limitation methods of VCSELs, the VCSEL-the so-called peripheral oxidized surface-emitting diodes made by the oxidation limitation method can effectively generate the limitations of light and electricity, and can already obtain low current and high efficiency. Laser. When using this method, you must first grow AlGaAs or AlAs with a very high A1 content, and convert it into a low-fold paper under wet oxygen. The paper size applies the CNS A4 specification (21GX297 mm) '' (please first Read the precautions on the back and fill in this page again.), 1T_ wire 530425 A5 B5 Emissivity, insulating aluminum oxide, the size of the opening formed in the middle depends on the temperature and time of oxidation, so it can get quite good Current control. Although the existing low-temperature long-term oxidation method is feasible, how to use the characteristics of high-temperature oxidation fast and the existing characteristics of low-temperature oxidation slow to accelerate the oxidation process, coupled with the design of quartz boat advection device, make it more feasible. In short, high-quality insulating oxide films recently produced by the oxidation of ιπ · ν group compound semiconductors have been confirmed. Among many compound semiconductor oxidation studies, aluminum oxide (Al203) has been most easily formed, and A12 O3 is a stable oxide. In terms of laser components, it can be used in vertical cavity surface-emitting lasers as a confinement layer to reduce the laser's critical current and become a light-emitting component as an integral part of communication components. At present, the formation of compound semiconductor oxide layers is achieved by diffusion at low temperature for a long time (400 ~ 450 ° c) to achieve the desired oxide layer depth. However, because it takes a long time, based on factors such as cost control and product delivery, this method is used and Not appropriate. In view of the fact that the conventional oxidation method requires a long time to complete, the present invention proposes a multi-stage method for controlling the depth of an oxide layer of a compound semiconductor, which can accurately control the depth of the oxide layer without taking a long time to complete. Cost-saving feasible party i-, hereby apply for a patent ----_ (Please read the precautions on the back before filling out the blocks on this page) b · b-,, Γ Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs The best embodiment 1: Stupid crystal part: The manufacture of peripheral oxidized surface light-emitting diodes, firstly includes the steps of forming a semiconductor layer (EPILAYERS) of the structure required for a light-emitting element by vapor phase epitaxy MOCVD or molecular beam epitaxy MBE. For forming a plurality of multilayer semiconductor layers (lower reflective layer B0TT0M-DBR, active layer active layer, upper reflective layer TOP-DBR) on the substrate, as shown in FIG. 1, wherein the step of forming a semiconductor layer includes forming a first A first-type semiconductor layer is formed on the substrate, and then a second-type semiconductor layer is formed on the first-type semiconductor layer. The step of forming a semiconductor layer further includes forming a first-type buffer layer on the substrate before forming the first-type semiconductor layer, the light-emitting layer, and the second-type semiconductor layer. It further includes, before forming the first type buffer layer, the first type semiconductor layer, the light emitting layer, the second type semiconductor layer, and the second type contact layer, forming a nucleation layer on the substrate (not yet The paper size of this paper applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 530425 (^ L6ZX0 \ Z) (SND) Dong Chuan 洚 洚 1)), in the peripheral oxide type surface emitting diode of this embodiment In manufacture, the first type is N type, and the second type is P type. Process part: secondly, forming a first ohmic contact layer on the unetched lower surface under the plurality of semiconducting hafnium layers; and forming a second ohmic contact layer on the plurality of semiconducting refractory layers after etching. On the surface, a peripheral oxidized surface emitting diode is formed to be connected to the outside, which includes: forming a first covering electrode to cover one end of the substrate; forming a second covering electrode to cover The other end of the substrate: The following steps must be performed: Step 1: Wafer cleaning (1) The epitaxial wafer to be cleaned is placed in a solution of three gas ethylene < TCE), propylene copper (ACE), and electric heating The plate was heated for 5 minutes and then ultrasonically washed for 5 minutes. 2) Change the solution in step i to formazan, and repeat step 10 (3) Rinse the wafer with deionized water for 5 minutes. (4) Take out the wafer and blow dry with nitrogen. _______________________________ (1) After the wafer is cleaned, bake it in the oven for 5 minutes. (2) Photoresist applied by spin coater. (3) The light-shielded insect sheet is soft-baked in a vacuum oven for 30 minutes. (4) Remove the soft-baked wafer with thicker edges and remove it first. Align the photomask with a light single-alignment machine and explode the beta. (5) Develop the wafer after exposure, and blow dry with nitrogen. (6) Use the light single aligner again to transfer the required light single circle to the area on the wafer for exposure, and repeat steps 20 and 3. 3. Type 10 type ohmic contact layer metal evaporation (1) The plating system deposits the contact layer metal on the wafer. 0 (2) Place the keyed metal wafer in the Cgang solution, and lift it off with an ultrasonic oscillator and fan. Step 4: Rapid thermal annealing RTA Place the wafer into the wafer. In the thermal annealing processing machine, the temperature is quickly raised to 400-500C for 20 seconds. The purpose is to make the metal ohmic layer tightly to reduce the ohmic contact resistance. Step 5: Grind and plan the back of the wafer to a thickness of 25 (k Oil below, and withdrawn at α.
sa sv 530425 Α5 Β5 經濟部中央標隼局員工消費合作杜印复 步驟6: P型歐姆接觸層金屬蒸鍍 ） 以熱蒸鍍系統蒸鍍於晶片背面0 步驟7:快速熱退火(RTA) 將晶片置入快速熱退火處理機中，快速升溫至350-450° C，目的同 樣在降低歐姆接觸電阻〇 步麻8:#刻mesa (1) 同步驟2 ,以光微影術將光軍圈案移到晶片表面。 (2) 將晶片置於H3P04:H202:H2(M : 1:4的溶液令，蝕刻出平台。 步驟併**:氧化步騍 以氧化系統，將周邊區域系統氧化，用以減少發先開〇區域，《提 高發光效率β 步驊10:晶粒切割 以切割機將晶片切割成晶粒，至此整個製轾告一段落。 氧化部分： 其中之氧化步驟併絲，如圈2A可知，若僅以現有長時間 低溫之氧化(450C以下）為之，其氧化時間必需較(2hr以上)長，導 至交期過長·!成本上升等不利X業量產之發逢二其攻因氧化時__ 間必需較長，水汽凝結，導至氣流之不頫，更易照造成如圈二b之） 氧化不均勻情形，不利生產。若以至少以一怏速氧化步驟，伴随至 少另一慢逮氧化步驟：則可以違成怏速且精確控制周邊氧化區域之 深度之須要，如国2A可知，其中該快速氧步驊包含，至少一以氮 氣或氫氣為載體之快速濕氧化過程，其溫度為450-800度之間：至少 另一慢速氧化步驟，包含以氮氣或氫氣為載體之濕氧化遢輕；其溫^ 夷以气氧氣為，裁1體之濕氧化遇程攀，如洗 ^ 一來，便可將總時間縮短至原時程一半以内。 習知氧化之裝置（酾未示），包含至少一載運氣體供給管路，流 董控制單元，水氣產生裝置，氧化燼及燫管(該爐擁有一水平定向伸 長之石英管及環繞石英管的加熱元件供其内收容之晶片升溫氧化之 用），及排放裝董；本實施例氧化之裝置將其中該石英爐管之前端設 董氣流擾動裝置，如格狀(或多孔狀擾流板），使流動氣艘通過晶片 間之前，於該氣流中產生均句擾動，以便其後以大致水平之流動方 向將晶月均勻氧化；並在含水氣體引入氧化壚之前，包含一管路加 熱裝置，以防止水氣超過露點，而降低水氣含量；並在含水氣撤排 (請先閱讀背面之注意事項再填寫本買各棚)sa sv 530425 Α5 Β5 Consumption cooperation between employees of the Central Bureau of Standards, Ministry of Economic Affairs, Du Yinfu Step 6: P-type ohmic contact layer metal evaporation) Evaporation on the back of the wafer using a thermal evaporation system 0 Step 7: Rapid thermal annealing (RTA) The wafer is placed in a rapid thermal annealing processor, and the temperature is rapidly raised to 350-450 ° C. The purpose is also to reduce the ohmic contact resistance. Step 8: # 刻 mesa (1) Same as step 2, the light army is used to photolithography Case moved to the wafer surface. (2) Place the wafer in a solution of H3P04: H202: H2 (M: 1: 4 to etch out the platform. Steps and steps **: Oxidation step: Use an oxidation system to oxidize the surrounding area system to reduce the first open 〇 area, "Improving luminous efficiency β Step 10: Grain cutting using a dicing machine to cut the wafer into grains, and the entire production process has come to an end. Oxidation part: The oxidation step is parallel, as shown in circle 2A, if only The existing long-term low-temperature oxidation (below 450C) is for it, its oxidation time must be longer than (more than 2hr), leading to long delivery time !! The cost increase and other unfavorable X-industry mass production occur when the attack is caused by oxidation__ The interval must be longer, and the water vapor condenses, leading to the non-overflow of the air flow, which is more likely to cause uneven oxidation such as in circle 2b), which is not good for production. If at least one rapid oxidation step is accompanied by at least one other slow oxidation step: it can violate the need for rapid and precise control of the depth of the surrounding oxidation area, as known in China 2A, where the rapid oxygen step contains at least A rapid wet oxidation process using nitrogen or hydrogen as a carrier, the temperature of which is between 450-800 degrees: at least another slow oxidation step, including wet oxidation using nitrogen or hydrogen as a carrier; With oxygen, the wet oxidation of the body 1 can be achieved by Cheng Pan. If washed, the total time can be shortened to less than half of the original time course. The conventional oxidation device (not shown) includes at least one carrier gas supply line, a flow control unit, a water gas generating device, oxidized ash and a stern tube (the furnace has a horizontally oriented quartz tube and a surrounding quartz tube) The heating element is used for heating and oxidizing the wafers contained therein, and the discharge device is installed; in the oxidation device of this embodiment, a gas flow disturbance device such as a grid (or a porous spoiler) is arranged at the front end of the quartz furnace tube. ), Before the mobile gas vessel passes through the wafer, a homogeneous disturbance is generated in the airflow, so that the crystal moon is uniformly oxidized in a generally horizontal flow direction; and a pipe heating device is included before the water-containing gas is introduced into the thorium oxide In order to prevent water vapor from exceeding the dew point and reduce the water vapor content; and remove the water vapor (please read the precautions on the back before filling in this shed)
本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） 530425 經濟部智慧財產局員工消費合作社印製 A5 --—__________— .__B5__ ，氧化爐之後，也包含一管路加熱裝置，以防止水氣凝結，而阻塞） 吕路:經採用本發明所揭示之手段，如圖二c所示，氧化均勻結果 可以据丨。 較佳之實施例二： 本實施例中之製程與氧化，均與實施例一相同；唯其中上反 射層TOP-DBR磊晶部分，由於遙晶層之含銘量與氧化速率有絕對之 關係，磊晶層之含紹量小於百分之七十以下，低溫氧化不易，需在 700C以上為之；在400至500C之間，氧化深度將依含鋁量之增加 而明顯增大，故如圖五所示，含銘量依開口向下之深度而由百分之 ^十漸增為百分之百，可使開口由表面向下變小，有效增加發光強 度。 較佳之實施例三： 其中之磊晶與製程均與實施例一相雷同；唯有鑑於傳統之氧化 ^驟，之所以須長時間，乃因氧需橫向長距離進行擴散，來將周邊 區，土統氧化:用以減少發光開口區域。因此，為減少氧化時間， 及提功焚尤區域之脊效控刺，如冊二b所示』可經由再一次之微影_ ，刻過程，可將所欲氧化之區域，形成周圍之微通道，本發明所揭） 示在周邊氧化區域之中形成許多垂直之細微通道後(其深度可如圖三 示），再進一步進行氧化步驟；藉由該細微通道之形成，氧無需 橫向長距，進行擴散，便可以達成快速，且精確控制周邊氧化區域 之，度之須要，如圖三c所示。其中該垂直之細微通道的形成步驟 包，，以濕式蝕刻來形成垂直之細微通道、乾式RIE來形成垂直之 細微通道、或以乾式ICPRIE來形成垂直之細微通道，本較佳之實施 例乃以乾式ICPRIE來形成垂直之細微通道。 較佳之實施例四： 、其，中之蠢晶與製程均與實施例三相雷同；唯有將所欲氧化之區 域’ ^成周圍之微通道，乃藉由離子佈植來形成。本較佳之實施例 所揭示f周邊氧化區域之中形成許多垂直之細微通道前(其光罩如圖 四a所不），須增加再一道之光阻及si〇2沉積以抵擋離子，然後加 以去除之。 本紙張尺度適用中國國家標準（CNS) M規格（210x297公羡） ^|_ (請先閱讀背面之注意事項再填寫本頁各棚) 訂 530425 A5 B5 步驟4a:光微影術 將所需之光罩圖形精確轉移至晶月上。 步驟4b:成長Si02 在曝光顯影完成之晶片表面上鍍上一層厚度約為1000A的Si02，目 的在使經高能量雛子佈植的先限不至於焦掉而艎以去除。 步驟4c:離子佈植 ^ 步驟4d:Si02及PR的移除 (U以去離子水沖洗晶片後，將晶片置入HF:H2(H:1()的溶液中 約一分鐘，將Si02移除。 (2)同步驟1之晶片清洗步驟，以ACE將光阻去除: 其後進行氧化步驟；藉由該細微通道之形成，氧無需橫向長距 離進行擴散，也可以達成快速，且精確控制周邊氧化區域之深度之 須要’如圖四b所示。 (請先閱讀背面之注意事項再填寫本頁各欄) 裝· 經濟部智慧財產局員工消費合作社印製 圖式簡單說明： 弟…圖顯示先前技術之周邊氧化型表面發光二極體的結構； 第二圖（a)本發明第一實施例之氧化深度興； 第二圖(b)(c)顯示依本發嘴第一實施例，外加平流器及冷法器斧德 之氧化深度比較圖； 董三圖（a)至第三圖（c)顯示依本發明第三實施例之結構； 第四圖(a)至第四爵(b)顯示依本發萌第爵實施㈣之結構;； 第五阔顯示第二實施例之周邊氧化型表面發光二極體的結構。 -訂 線- 度通用中國國家襟準（CNS ) A4規格（210X297公釐）This paper size applies the Chinese National Standard (CNS) A4 specification (210 × 297 mm) 530425 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A5 ---__________— .__ B5__ After the oxidation furnace, it also contains a pipeline heating device to Prevent water vapor from condensing and blocking) Lu Lu: After adopting the method disclosed in the present invention, as shown in Fig. 2c, the uniform oxidation result can be obtained. Preferred embodiment two: The manufacturing process and oxidation in this embodiment are the same as those in embodiment one, except that the TOP-DBR epitaxial part of the upper reflective layer has an absolute relationship with the content of the telecrystalline layer and the oxidation rate. The epitaxial layer has a content of less than 70%, and it is not easy to oxidize at low temperature. It must be above 700C; between 400 and 500C, the oxidation depth will increase significantly according to the increase of the aluminum content, so as shown in the figure As shown in Figure 5, the amount of inscriptions gradually increases from ^ 10 to 100% according to the depth of the opening downward, which can make the opening smaller from the surface downward and effectively increase the luminous intensity. The third preferred embodiment: The epitaxial crystal and the manufacturing process are the same as those in the first embodiment; only in view of the traditional oxidation process, it takes a long time because the oxygen needs to be diffused horizontally over a long distance to cover the surrounding area, soil Uniform oxidation: used to reduce the luminous opening area. Therefore, in order to reduce the oxidizing time and control the spine effect in the area of increasing power and burning, as shown in Book 2b, the process of lithography can be used to form the surrounding micro area through the lithography process. Channel, disclosed in the present invention) After forming many vertical fine channels (the depth of which can be shown in Figure 3) in the surrounding oxidized area, the oxidation step is further performed; by the formation of the fine channels, oxygen does not need a long lateral distance By performing diffusion, it is possible to achieve fast and precise control of the surrounding oxidized regions, as shown in Figure 3c. The formation steps of the vertical fine channels include wet etching to form vertical fine channels, dry RIE to form vertical fine channels, or dry ICPRIE to form vertical fine channels. The preferred embodiment is to Dry ICPRIE to form vertical fine channels. The preferred embodiment 4: The stupid crystals and the processes in the embodiment are the same as those in the three phases of the embodiment; only the area to be oxidized is formed into the surrounding microchannels, which are formed by ion implantation. Before many vertical fine channels are formed in the oxidized area around f disclosed in this preferred embodiment (the photomask is not shown in Fig. 4a), another photoresist and SiO2 deposition must be added to resist ions, and then Remove it. This paper size applies the Chinese National Standard (CNS) M specification (210x297). ^ | _ (Please read the notes on the back before filling in each shed on this page) Order 530425 A5 B5 Step 4a: Photolithography The mask pattern is accurately transferred to the crystal moon. Step 4b: Growing Si02 A layer of Si02 with a thickness of about 1000 A is plated on the surface of the wafer after the exposure and development, so as to prevent the high-energy seedlings from being planted before being burnt and removed. Step 4c: Ion implantation ^ Step 4d: Removal of Si02 and PR (U rinse the wafer with deionized water, then place the wafer in a solution of HF: H2 (H: 1 () for about one minute to remove Si02) (2) Same as the wafer cleaning step in step 1, removing the photoresist with ACE: followed by an oxidation step; by the formation of this fine channel, oxygen does not need to be diffused horizontally over a long distance, and it can also achieve fast and precise control of the periphery The need for the depth of the oxidized area is shown in Figure 4b. (Please read the precautions on the back before filling in the columns on this page.) Equipment · Printed description of the employee's consumer cooperative of the Intellectual Property Bureau of the Ministry of Economics. The structure of a peripheral oxidized surface light-emitting diode of the prior art; the second figure (a) shows the oxidation depth of the first embodiment of the present invention; the second figure (b) (c) shows the first embodiment according to the present invention, Comparison diagram of the oxidation depth of the advection device and the cooler axe; Dong San diagram (a) to third diagram (c) shows the structure according to the third embodiment of the present invention; fourth picture (a) to fourth ( b) shows the structure of the first embodiment according to the present invention; the fifth display shows the peripheral oxygen of the second embodiment Type surface light-emitting diode structure of - Order Line - General of China National lapel quasi (CNS) A4 size (210X297 mm)