TW518643B - High density plasma chemical vapor deposition chamber and method of forming chamber season film - Google Patents

High density plasma chemical vapor deposition chamber and method of forming chamber season film Download PDF

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Publication number
TW518643B
TW518643B TW90121875A TW90121875A TW518643B TW 518643 B TW518643 B TW 518643B TW 90121875 A TW90121875 A TW 90121875A TW 90121875 A TW90121875 A TW 90121875A TW 518643 B TW518643 B TW 518643B
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Taiwan
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reaction chamber
layer
thickness
protective layer
scope
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TW90121875A
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Chinese (zh)
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Ming-Hwa Yoo
Shih-Chi Lin
Yi-Lung Cheng
Szu-An Wu
Ying-Lang Wang
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Taiwan Semiconductor Mfg
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Abstract

This invention discloses a high density plasma chemical vapor deposition chamber and a method of forming chamber season film, which is suitable for producing intermetal dielectric layer using fluorosilicate glass as the dielectric material. The chamber has an inner wall and a silicon oxynitride season film covering the inner wall of the chamber. The formation of the season film comprises: using cleaning gas to clean the chamber, and then forming the silicon oxynitride season film on the surface of the chamber inner wall. The silicon oxynitride season film is a season film with hardness and toughness. Therefore, contamination of particles peeling off from the chamber can be effectively reduced when performing fluorosilicate glass deposition process.

Description

518643 、發明說明(1) 本發明係有關於半導體製造的範疇,特別係指一種製 造以含氟矽玻璃(fluorosilicate glass,以下簡稱FSG) 為介電材料之内金屬介電層(inter metal dieiectric layer ’以下簡稱IMD層)時,在高密度電漿(high density Plasma,以下簡稱HDP)化學氣相沉積(chemical vapor deposition,以下簡稱CVD)反應室(chamber)内壁表面上 形成保護層(season film)之方法。 在現今的深次微米製程中,積體電路的集成度愈來愈 南’使得製作電晶體的基底面積需不斷地減少以提高密 度’因此目前的半導體製程廣泛地採用立體架構,例如以 多層金屬内連線的方式來連接各元件,其中用來隔離各金 屬層之介電材料稱之為IMD,現在常以低介電係數的材 料’例如F S G,作為兩金屬層之間的I M D層,以降低金屬層 間的耦合電容量,達到縮小RC延遲時間,提昇傳輸速度的 目的。 一般是以HDP-CVD的方式在晶圓上沉積形成FSG的IMD 層。在每片晶圓進行FSG沉積之前,會先對HDP-CVD反應室 通以一清潔用氣體,將附著在反應室内之反應殘渣加以清 除,以降低製程中的微粒污染(particle518643, invention description (1) The present invention relates to the field of semiconductor manufacturing, and particularly refers to the manufacture of an inter metal dieiectric layer with fluorosilicate glass (hereinafter referred to as FSG) as a dielectric material. 'Hereinafter referred to as the IMD layer), a protective film (season film) is formed on the inner wall surface of a chemical vapor deposition (hereinafter referred to as CVD) chemical vapor deposition (CVD) chamber of a high density plasma (HDP) Method. In today's deep sub-micron processes, the integration of integrated circuits is getting more and more south ', making the area of the substrate for the transistor need to be continuously reduced to increase the density. Therefore, the current semiconductor process widely uses three-dimensional architecture, such as multilayer metal The interconnect is used to connect the components. The dielectric material used to isolate the metal layers is called IMD. Now, a material with a low dielectric constant, such as FSG, is used as the IMD layer between the two metal layers. The coupling capacitance between the metal layers is reduced to reduce the RC delay time and increase the transmission speed. Generally, HDP-CVD is used to deposit the FMD IMD layer on the wafer. Before FSG deposition is performed on each wafer, the HDP-CVD reaction chamber is first purged with a cleaning gas to remove the reaction residues attached to the reaction chamber to reduce particle contamination during the process.

contamination),然後利用沉積製程在反應室内壁面上形 成無掺雜石夕玻璃(Undoped Silicon Glass,USG)的二氧化 矽(Si 02)保護膜(season film),如第1圖所示,反應室壁 10與覆蓋在反應室内壁面上的USG保護膜12。將晶圓30放 置在反應室裡的靜電吸盤50之後,接著借助氬離子(arg〇ncontamination), and then a deposition process is used to form an undoped silicon glass (USG) silicon dioxide (Si 02) protective film (season film) on the wall surface of the reaction chamber. As shown in FIG. 1, the reaction chamber The wall 10 and the USG protective film 12 covering the wall surface of the reaction chamber. After the wafer 30 is placed in the electrostatic chuck 50 in the reaction chamber,

518643 五、發明說明(2) ion ’ A r+)的轟擊(bombardment)把反應室加熱到425 °C以 利後續HDP-CVD的進行,所以保護膜12主要是避免離子義 擊損壞反應室内壁。反應室加熱到425 °C後,便可以進行 HDP-CVD的沉積製程在晶圓30上形成FSG的IMD層。在完成 一片晶圓IMD層的沉積後,將該晶圓3 〇取出,再重新清洗 反應至以去除前次覆蓋在反應室内壁面上的保護膜,然後 重覆上述步驟以對另一晶圓形成FSG的imd層。這種傳統的 製程以及USG保護膜有下列的缺點: 1·由於清洗反應室的時間大約佔去整個FSG沉積製程 的一半時間’上述清洗一遍反應室僅能進行一次FSG沉積 的製程,其產能無法提高。 2·雖然USG保護膜12可以避免離子轟擊加熱反應室 時:損壞反應室内壁,但USG保護膜1 2在離子轟擊之下, 卻會導致部份保護膜剝落,剝落的微粒掉在晶圓3 〇上會造 成後續形成的IMD層留下凹洞,這種凹洞係製程上致命的 缺陷,將大大地降低晶片製造的良率。 —有鑑於此,本發明之目的是提供一種形成HDp_CVD反 應室保護層之方法,藉由本發明所提出的保護層,可以有 效提昇FSG沉積製程的產能。 本發明之另一目的是提供一種具有氮氧化矽(Si ON)保 ^ ^的HDP^CVD反應室,在該反應室中進行FSG沉積製程能 夠減少剝落微粒的污染,改善晶片製造的良率。 =達上述目的,本發明提供一種HDP-CVD反應室與形 、反μ至保護層之方法,適用於製造以fsg為介電材料之518643 V. Description of the invention (2) The bombardment of ion ’A r +) heats the reaction chamber to 425 ° C to facilitate the subsequent HDP-CVD. Therefore, the protective film 12 is mainly to prevent the ion wall from damaging the reaction chamber. After the reaction chamber is heated to 425 ° C, the HDP-CVD deposition process can be performed to form an FMD IMD layer on the wafer 30. After the deposition of the IMD layer of a wafer is completed, the wafer 30 is taken out, and then the reaction is cleaned to remove the protective film covering the inner surface of the reaction chamber, and then the above steps are repeated to form another wafer. FSG imd layer. This traditional process and the USG protective film have the following disadvantages: 1. Since the time for cleaning the reaction chamber occupies about half of the entire FSG deposition process, the above-mentioned cleaning of the reaction chamber can only perform the FSG deposition process once, and its capacity Can't improve. 2. Although the USG protective film 12 can prevent ion bombardment from heating the reaction chamber: damage to the inner wall of the reaction chamber, the USG protective film 12 under the ion bombardment will cause some of the protective film to peel off, and the peeled particles will fall on the wafer 3 〇 will cause subsequent formation of IMD layer leaving a cavity, this cavity is a fatal defect in the process, which will greatly reduce the yield of wafer manufacturing. In view of this, the object of the present invention is to provide a method for forming a protective layer for an HDp_CVD reaction chamber. Through the protective layer proposed by the present invention, the productivity of the FSG deposition process can be effectively improved. Another object of the present invention is to provide a HDP ^ CVD reaction chamber with silicon oxynitride (Si ON) protection. The FSG deposition process in the reaction chamber can reduce the pollution of exfoliated particles and improve the yield of wafer manufacturing. To achieve the above-mentioned object, the present invention provides a HDP-CVD reaction chamber and a method of forming and inverting a protective layer, which is suitable for manufacturing fsg as a dielectric material.

518643518643

族反應至具有一反應室内壁以及覆蓋 内壁表面之Si ON保護層。形成該伴μ牛_、J反應至 人翁、區μ ] · 〜风β保瘦層的步騍特徵係先以 S〇UrCe)之清潔用氣體,例如以三氟化 虱(NFS)來清洗反應室,接著在反應室内壁表面上形成 Si ON保濩層。s 1 ON保護層係一較為堅韌之保護膜,可以在 進行FSG之沉積製程時,有效減少由反應室剝落粒子所造 成之污染,此外,由於Si ON保護層不易剝落的緣故,本發 明所提出用於HDP-CVD反應室的保護層,可以在歷經3次The group reacts to have a reaction chamber inner wall and a Si ON protective layer covering the inner wall surface. The formation of the companion μ 牛 _, J response to humans, and area μ] · ~ The step characteristic of the wind β thin layer is first cleaned with a cleaning gas such as SOCrCe, for example, with trifluoride lice (NFS) The reaction chamber is followed by the formation of a Si ON protective layer on the surface of the reaction chamber. The s 1 ON protective layer is a relatively tough protective film, which can effectively reduce the pollution caused by the peeling particles in the reaction chamber during the FSG deposition process. In addition, because the Si ON protective layer is not easy to peel off, the present invention proposes Protective layer for HDP-CVD reaction chamber, can pass through 3 times

FSG沉積製程後,才需以况匕清洗反應室而不會造成污染, 也就是說,在兩次反應室清洗之間,可以進行連續3片晶 圓的FSG沉積製程,如此將能大幅提昇產能。 圖示簡單說明: 為使本發明之上述目的、特徵和優點能更明顯易懂, 下文特舉一較佳實施例,並配合所附圖式,作詳細說明如 下: 第1圖是傳統之HDP-CVD反應室剖面示意圖及反應室壁 局部放大圖; 第2圖是本發明實施例之HDP-CVD反應室剖面示意圖及 反應室壁局部放大圖 標號說明: 12〜USG保護膜; 22〜第一USG層; 26〜第二USG層; 3 0〜晶圓; 1 〇〜反應室壁; 2 〇〜反應室壁; 24〜FSG層; 28〜Si〇N保護層;After the FSG deposition process, the reaction chamber needs to be cleaned without causing pollution, that is, between two reaction chamber cleanings, a continuous FSG deposition process of 3 wafers can be performed, which will greatly increase production capacity. . Brief description of the drawings: In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below and described in detail with the accompanying drawings as follows: Figure 1 is a traditional HDP -Cross section view of the CVD reaction chamber and a partially enlarged view of the reaction chamber wall; Figure 2 is a schematic cross section view of the HDP-CVD reaction chamber and a partially enlarged reaction chamber wall according to an embodiment of the present invention. Icon description: 12 ~ USG protective film; 22 ~ first USG layer; 26 to second USG layer; 30 to wafer; 10 to reaction chamber wall; 20 to reaction chamber wall; 24 to FSG layer; 28 to SiON protective layer;

518643 五、發明說明(4) 5 0〜靜電吸盤。 根據本發明的HDP-CVD反應室與形成反應室保護層方 法的較佳實施例,其特徵為適用於製造以FSG為介電材料 之IMD層,這種反應室具有一反應室内壁以及反應室内壁 表面所覆蓋之Si ON保護層。形成Si 0N保護層的方法係提供 一用於製造以FSG為介電材料之IMI)層的HDP-CVD反應室, 以含氟源之清潔用氣體,例如以NF3來清洗該反應室,將 附著在反應室内之反應殘渣加以清除,並且去除前次覆蓋 在反應室内壁面上的保護層,以降低製程中的微粒污染。 接下來,例用薄膜沉積的方式在反應室内壁表面上形成 Si ON保護層,由於Si-N之間的原子鍵結能量大於Si_〇之間 的原子鍵結能量,因此Si ON保護層將比以USG形成之Si 02 保護層更加堅韌,在以離子轟擊加熱反應室溫度至45〇它 時,S1 ON保濩層可以保護反應室不會受到直接的離子撞擊 而能延長反應室壽命,並且由於Si〇N保護層比傳統Si〇2保 濩層堅韌,禁得起離子轟擊而不容易造成剝落,可以有效 減少剝落微粒的污染。&外,為了能夠在兩次反應室清洗 =的進晶圓的FSG沉積製程,以達到提昇產能 的=的,最好先在反應室内壁面上覆蓋一FSG層,可 以讓兩次清洗間的連續3次FSG沉積製程,其’ 始FSG氣體分壓大致相同,而不會 二 、 度不一致的現象。但是由於FS“=3密 室内壁面上覆蓋FSG層,將很容易在離 /、在反應 谷易在離子轟擊下而剝落,518643 V. Description of the invention (4) 50 ~~ electrostatic chuck. According to a preferred embodiment of the HDP-CVD reaction chamber and the method for forming a protective layer of the reaction chamber according to the present invention, it is suitable for manufacturing an IMD layer using FSG as a dielectric material. The reaction chamber has a reaction chamber wall and a reaction chamber. Si ON protective layer covered by the wall surface. The method for forming the Si 0N protective layer is to provide an HDP-CVD reaction chamber for manufacturing an IMI layer with FSG as a dielectric material. The reaction chamber is cleaned with a cleaning gas containing a fluorine source, such as NF3, and the adhesion The reaction residues in the reaction chamber are removed, and the protective layer covering the wall surface of the reaction chamber was removed to reduce particulate pollution during the process. Next, a thin film deposition method is used to form a Si ON protective layer on the surface of the reaction chamber. Since the atomic bonding energy between Si-N is greater than the atomic bonding energy between Si_〇, the Si ON protective layer will It is tougher than the Si 02 protective layer formed by USG. When the temperature of the reaction chamber is heated to 45 ° by ion bombardment, the S1 ON protection layer can protect the reaction chamber from direct ion impact and extend the life of the reaction chamber. Because the SiON protective layer is tougher than the traditional Si02 protective layer, it can withstand ion bombardment and is not easy to cause spalling, which can effectively reduce the pollution of exfoliated particles. In addition, in order to be able to clean the FSG deposition process of the incoming wafers in the two reaction chambers to increase productivity, it is best to first cover an FSG layer on the wall of the reaction chamber to allow For three consecutive FSG deposition processes, the initial FSG gas partial pressure is approximately the same, and there is no inconsistency between degrees and degrees. However, because the FSG layer is covered on the inner wall of the FS "= 3 dense chamber, it will be easily peeled off by ion bombardment in the ionization and reaction valleys.

518643 五、發明說明(5) 造成嚴重的微粒污染問題,因此較佳的方式是將FSG層形 成f反應室内壁與SiON保護層之間。然而,fSG的特性並 不谷易附著在反應室内壁的表面,最好先在反應室内壁面 上覆蓋一層對於反應室内壁表面以及FSG層均有良好附著 性之USG的Si〇2層,另一方面,由於fSG與Si〇N之間的化學 鍵結比差異太大,因此最好在FSG層與Si〇N層之間形成另 「USG的Si〇2層,換句話說,參考第2圖,在清洗反應室之 後’先在反應室壁20的内壁面上沉積厚度約35〇〇a〜4500 A ’大體上以4000A為較佳的第一 USG層22,然後在第一 USG層22之上沉積厚度約50〇a〜1 00 0 A,大體上以700 A為 較佳的FSG層24,接下來在FSG層24之上沉積形成厚度約· 40 0 0 A〜50 0 0 A,大體上以4500 A為較佳的第二USG層26, 最後在第二USG層26之上沉積厚度約5〇〇A〜100〇A,大體 上以640A為較佳的SiON保護層28。 在形成如第2圖所示包括Si ON保護層28之後,將晶圓 30放置在反應室裡的靜電吸盤5〇,然後借助Ar+的轟擊把 反應室加熱到425 °C以利後續HDP-CVD的進行,此時“⑽保 濩層2 8可以保護反應室壁2 〇不會受到直接的離子撞擊,並 且月b夠減少剝落微粒的污染。反應室加熱到4 2 5 °c後,便’ 可以進行HDP-CVD的沉積製程在晶圓3〇上形成FSG的1〇 層。在完成一片晶圓IMD層的沉積後,將該晶圓3〇取出, 重複上述置入晶圓、加熱反應室以及以沉積形成丨MD層的 步驟,如此完成另兩片晶圓的IMD層製作。經歷3次 HDP-CVD的FSG沉積製程之後,必須重新清洗反應室以完全518643 5. Description of the invention (5) Causes serious particulate pollution problems, so the better way is to form the FSG layer between the f reaction chamber wall and the SiON protective layer. However, the characteristics of fSG are not easy to adhere to the surface of the reaction chamber. It is best to cover the reaction chamber with a layer of US SiO2 that has good adhesion to the surface of the reaction chamber and the FSG layer. On the other hand, because the chemical bond ratio between fSG and SiON is so different, it is best to form another "USG Si02 layer" between the FSG layer and the SiON layer. In other words, referring to Figure 2, After cleaning the reaction chamber, 'first deposit a thickness of about 350,000 a to 4,500 A on the inner wall surface of the reaction chamber wall 20', generally, the first USG layer 22, preferably 4000 A, and then over the first USG layer 22 Deposition thickness is about 50〇a ~ 100 0 A, generally 700 A is the preferred FSG layer 24, and then deposited on the FSG layer 24 to form a thickness of about 40 0 0 A ~ 50 0 0 A, generally 4500 A is the preferred second USG layer 26, and finally a thickness of about 500 A to 100 A is deposited on the second USG layer 26. Generally, 640 A is the preferred SiON protective layer 28. After the Si ON protective layer 28 is shown in FIG. 2, the wafer 30 is placed in an electrostatic chuck 50 in the reaction chamber, and then reversed by Ar + bombardment. The reaction chamber is heated to 425 ° C to facilitate the subsequent HDP-CVD. At this time, the "protective layer 28" can protect the reaction chamber wall 20 from direct ion impact, and the month b can reduce the pollution of exfoliated particles. After the reaction chamber is heated to 4 2 5 ° c, the HDP-CVD deposition process can be performed to form a 10 layer of FSG on the wafer 30. After the deposition of the IMD layer on one wafer is completed, the wafer 30 is taken out, and the above steps of placing the wafer, heating the reaction chamber, and depositing and forming the MD layer are repeated, so that the IMD layers of the other two wafers are completed. . After three HDP-CVD FSG deposition processes, the reaction chamber must be cleaned again to completely

518643518643

f除前次覆蓋在反應室内壁面上的各種薄膜和附著在反應 至内之反應殘渣,再形成如第2圖所示包括si〇N保護層 後進行另外3次的如前所述置入晶圓、加熱反應室 和以沉積形成I MD層的步驟。 綜合以上所述,根據本發明的HDP-CVD反應室與形成 反應至保護層之方法,可以藉由堅韌之S i ON保護層,有效 1咸少因反應室剝落粒子所造成之污染,經由各種分析與測 "式’例如電性驗收測試(Wafer Acceptance Test,WAT), 可以驗證依據本發明所形成之反應室保護層,相較於傳統 ^方法的確能提高晶圓良率,並且由於s丨〇N保護層不易剝 落的緣故,能夠在歷經3次FSG沉積製程後,才需以評3清 先反應至而不會开> 成污染,換言之,在兩次反應室清洗之 間可以進行連績3片晶圓的FSG沉積製程,如此將能大幅 提昇產能。 雖然本發明已以一具體實施例揭露如上,然其僅為了 明本發明之技術内容’而並非將本發明狹義地限定 施例’任何熟習此技藝者,在不脫離本發明之精神 和範圍内,當可作些許之更動與潤飾,因此本發明之保 粑圍當視後附之申請專利範圍所界定者為準。f In addition to the various films covering the inner surface of the reaction chamber and the reaction residues attached to the inside of the reaction chamber, it is formed as shown in Fig. 2 and includes a protective layer of SiO. The steps of heating the reaction chamber and depositing the I MD layer are performed. To sum up, according to the HDP-CVD reaction chamber and the method for forming a reaction-to-protection layer according to the present invention, the tough Si ON protection layer can effectively reduce the pollution caused by the peeling particles in the reaction chamber. Analysis and measurement formulas such as the Wafer Acceptance Test (WAT) can verify that the protective layer of the reaction chamber formed according to the present invention can indeed improve the yield of the wafer compared to the traditional method, and because丨 〇N protective layer is not easy to peel off, after three FSG deposition processes, it is necessary to react to the first three evaluations without opening > pollution, in other words, between the two reaction chamber cleaning The FSG deposition process for 3 wafers in a row will greatly increase production capacity. Although the present invention has been disclosed as above with a specific embodiment, it is only for the purpose of clarifying the technical content of the present invention, rather than limiting the present invention to the embodiment in a narrow sense. Any person skilled in the art will not depart from the spirit and scope of the present invention. As some changes and retouching can be made, the protection scope of the present invention shall be determined by the scope of the attached patent application.

Claims (1)

518643 六、申請專利範圍 I一種形成高密度電漿化風* 方法,其步驟包括·· 匕予虱相沉積反應室保護層之 提供一高密度電漿化學潢4 含氟石夕玻璃為介電材料之—内金:介室’用來製造以 以一清潔用氣體清洗該反應室;以^ 内壁表面上形成-氮氧化矽保護層。 凊專利範圍第1項所述形成高密度電漿化學氣 相沉積反應室保護層之方法,更包括下列步驟 子 形成在ί述内壁表面上與上述氮氧化矽保護層之間 I H ㈣璃層’其厚度大體上祕00A -450 0 A ; =:無摻雜石夕玻璃層上與上述氮氧化石夕保護層之 間形成3鼠矽玻璃層,其厚度大體上為50〇A~1〇〇〇A · 以及 ’ 在該含氟矽玻璃層上與上述氮氧化矽保護層之間形成 一第二無摻雜矽玻璃層,其厚度大體上為4〇〇〇a〜5〇〇〇 A。 3·如申响專利範圍第1項所述形成高密度電漿化學氣 相沉積反應室保護層之方法,其中上述氮氧化 厚度大體上為500 A〜 1 000 A。 夕保Λ層< 4·如申請專利範圍第2項所述形成高密度電漿化學氣( 相沉積反應室保護層之方法,其中上述氮氧化矽伴鳟 厚度大體上以640A為較佳。 夕保屋層之 5 ·如申請專利範圍第2項所述形成高密度電漿化學氣 0503-6452TWF;TSMC2001-0144;mflin.ptd 第11頁 518643 六、申請專利範圍 相沉積反應室保護層之方法,其中上 層之厚度大體上以4000A為較佳。,L 無摻雜石夕玻璃 6·如申請專利範圍第2項所述形成古〜— 相沉積反應室保護層之方法,其中上度電聚化學氣 度大體上以700 A為較佳。 述含氣矽玻璃層之厚 7.如申請專利範圍第2項所述形成高 相沉積反應室保護層之方法,其中上 / 層之厚度大體上以4500 A為較佳。之弟二無換雜碎玻璃 8·如申請專利範圍第丨項所述形成高密度電浆化學氣 反應室保護層之方法’其中上述清潔用氣體為三氣 化氮(NF3)。 9· 一種減少因反應室保護層剝落粒子所造成污毕之方 法,適用於以高密度電漿化學氣相沉積方式製造以含氟矽 玻璃為介電材料之内金屬介電層,其步驟包括· 先以一清潔用氣體清洗該反應室; 在該反應室内壁表面上形成一第—無摻雜矽玻璃層; 在該第一無摻雜石夕玻璃層上形成一含就石夕玻璃層; 在該含氟石夕玻璃層上形成一弟—無摻雜石夕玻璃声;以 及 θ ’ 在该第一無摻雜石夕玻璃層上形成一氮氧化石夕保護層。 1 0 ·如申请專利範圍第9項所述減少因反應室保護層剝 落粒子所造成污染之方法,其中上述第一無摻雜矽玻^ 層’其厚度大體上為3500Α〜4500Α,上述含氟石夕玻璃 層,其厚度大體上為500Α〜1000Α,上述第二無摻雜石夕玻518643 6. Scope of patent application I. Method for forming high-density plasma plasma wind *, the steps include ... providing a high-density plasma chemical finish for the protective layer of the reaction chamber deposition phase 4 fluorite glass as the dielectric Material-Inner Gold: Intermediate chamber 'is used to manufacture to clean the reaction chamber with a cleaning gas; a silicon oxynitride protective layer is formed on the inner wall surface.凊 The method for forming a protective layer of a high-density plasma chemical vapor deposition reaction chamber described in item 1 of the patent scope, further comprising the following steps to form an IH glass layer on the surface of the inner wall and the above-mentioned silicon oxynitride protective layer ' Its thickness is generally 00A-4500 A; =: a 3 mouse silica glass layer is formed between the undoped stone oxide glass layer and the above-mentioned oxynitride protective layer, and its thickness is generally 50A to 100%. 〇A · and 'A second undoped silica glass layer is formed between the fluorine-containing silica glass layer and the above-mentioned silicon oxynitride protective layer, and the thickness thereof is generally 4,000a to 50000A. 3. The method for forming a protective layer of a high-density plasma chemical vapor deposition reaction chamber as described in item 1 of the scope of the patent application, wherein the thickness of the above-mentioned nitrogen oxide is generally 500 A to 1 000 A. Xibao Λ layer < 4 · The method for forming a high-density plasma chemical gas (phase protective reaction layer protection layer) as described in item 2 of the scope of the patent application, wherein the thickness of the aforementioned silicon oxynitride accompanied trout is preferably 640A. No. 5 of the Yubao floor. · Form high-density plasma chemical gas 0503-6452TWF; TSMC2001-0144; mflin.ptd page 11 518643 as described in item 2 of the scope of patent application. Method, in which the thickness of the upper layer is generally better than 4000 A., L undoped Shixi glass 6. The method for forming a protective layer of the ancient ~ -phase deposition reaction chamber as described in the second item of the patent application scope, wherein The polymer chemical gasity is generally better than 700 A. The thickness of the gas-containing silica glass layer 7. The method for forming a protective layer for a high-phase deposition reaction chamber as described in item 2 of the patent application scope, wherein the thickness of the upper / layer is substantially 4500 A is preferred. The second is no replacement of broken glass. 8 · The method for forming a protective layer of a high-density plasma chemical gas reaction chamber as described in item 丨 of the application scope, wherein the cleaning gas is tri-gas nitrogen ( NF3). 9. One kind The method of less contamination caused by particles peeled off from the protective layer of the reaction chamber is suitable for manufacturing a metal dielectric layer using fluorine-containing silicon glass as a dielectric material by a high-density plasma chemical vapor deposition method. The steps include: A cleaning gas is used to clean the reaction chamber; a first non-doped silica glass layer is formed on the inner surface of the reaction chamber; a first stone-doped glass layer is formed on the first non-doped stone-xi glass layer; A brother—an undoped stone glass sound is formed on the fluorine-containing stone glass layer; and θ ′ forms a oxynitride protective layer on the first undoped stone glass layer. The method for reducing contamination caused by peeling particles of the protective layer of the reaction chamber according to item 9, wherein the thickness of the first undoped silica glass layer ′ is generally 3500A to 4500A, and the thickness of the above fluorite-containing glass layer is Roughly 500A ~ 1000A, the second undoped stone 518643 六 申請專利範圍 _________ 璃層,其厚度大體上為4000 Α〜5〇〇〇Α,、 矽保護層,其厚度大體上為5〇〇Α〜1〇()ί)’Α以及上述氮氧化 11·如申請專利範圍第1〇項所述減Α ° 剝落粒子所造成污染之方法,其中上 ~长μ至保護層 厚度大體上以6 4 0 Α為較佳。 ,氮氧化石夕保護層之 12·如申請專利範圍第1〇項所述減少 剝落粒子所造成污染之方法,其中上述益vi^至呆護層 層之厚度大體上以4000 A為較佳。 …、多雜矽玻璃 13· Η請專利範圍第10項所述減少因反應室保護層 ,洛粒子所造成污染之方法,其中上述含氟矽玻曰 度大體上以70 0 Α為較佳。 曰知 # 14·如申請專利範圍第丨〇項所述減少因反應室保護層 剝落粒子所造成污染之方法,其中上述第二無摻雜矽玻曰璃 層之厚度大體上以4500A為較隹。 1 5 ·如申請專利範圍第9項所述減少因反應室保護層剝 落粒子所造成污染之方法,其中上述清潔用氣體為三氟化 氮(NF3) 〇 16· —種高密度電漿化學氣相沉積反應室,適用於製 造以含氟矽玻璃為介電材料之内金屬介電層,該反應室包 括: 一反應室内壁;以及 一氮氧化矽保護層,覆蓋於該反應室内壁表面,用以 減少因反應室剝落粒子所造成之污染,該氮氧化矽保護層 厚度大體上為500 A〜1 000 A。518643 The scope of six patent applications _________ The thickness of the glass layer is generally 4,000 A to 50000A, and the thickness of the silicon protective layer is generally 500A to 10 ()) and the nitrogen Oxidation 11. The method of reducing the pollution caused by exfoliated particles as described in item 10 of the scope of the patent application, wherein the thickness of the upper layer to the length of the protective layer is preferably about 6 40 A. 12. The method for reducing the oxynitride layer as described in item 10 of the scope of patent application, reducing the pollution caused by exfoliated particles, wherein the thickness of the above-mentioned protective layer to the protective layer is generally about 4000 A. …, Polysilica glass 13. Please request the method for reducing pollution caused by the protective layer of the reaction chamber and particles in the scope of the patent, in which the above-mentioned fluorine-containing silica glass is preferably about 70 Α.知 知 # 14 · The method for reducing pollution caused by peeling off particles of the protective layer of the reaction chamber as described in the scope of the patent application, wherein the thickness of the above-mentioned second undoped silica glass layer is roughly 4500A. . 15 · The method for reducing pollution caused by peeling particles of the protective layer of the reaction chamber as described in item 9 of the scope of the patent application, wherein the cleaning gas is nitrogen trifluoride (NF3) 〇16 ·-a high-density plasma chemical gas A phase deposition reaction chamber is suitable for manufacturing an inner metal dielectric layer using fluorine-containing silica glass as a dielectric material. The reaction chamber includes: a reaction chamber wall; and a silicon oxynitride protective layer covering the surface of the reaction chamber wall. To reduce the pollution caused by the exfoliated particles in the reaction chamber, the thickness of the silicon oxynitride protective layer is generally 500 A to 1 000 A. 518643518643 1 7 ·如申請專利範圍第1 6項所述之高密度電漿化學氣 相沉積反應室,更包括·· 一第一無摻雜石夕玻璃層,形成於上述反應室内壁表面 上’其厚度大體上為3500A〜45〇〇A ; 一含氟矽玻璃層,形成於該第一無摻雜矽玻璃層上, 其厚度大體上為5〇〇A〜1000A ;以及 一第二無摻雜矽玻璃層,形成於該含氟矽玻璃層上與 上述氮氧化矽保護層之間,其厚度大體上為4000A〜5000 A 〇 1 8 ·如申請專利範圍第1 6項所述之高密度電漿化學氣 相沉積反應室,其中上述氮氧化矽保護層之厚度大體上以 640 A為較佳。 1 9 ·如申請專利範圍第1 6項所述之高密度電漿化學氣 相沉積反應室,其中上述第一無摻雜矽玻璃層之厚度大體 上以4 0 0 0 A為較佳。 2 0 ·如申請專利範圍第1 6項所述之高密度電漿化學氣 相沉積反應室,其中上述含氟矽玻璃層之厚度大體上以 70 0 A為較佳。1 7 · The high-density plasma chemical vapor deposition reaction chamber as described in item 16 of the scope of the patent application, further comprising a first non-doped stone glass layer formed on the inner wall surface of the reaction chamber. The thickness is generally 3500A ~ 4500A; a fluorine-containing silicon glass layer is formed on the first undoped silica glass layer, and the thickness is generally 500A ~ 1000A; and a second undoped A silica glass layer is formed between the fluorine-containing silica glass layer and the above-mentioned silicon oxynitride protective layer, and its thickness is generally 4000A to 5000 A 〇1 8 · High-density electricity as described in item 16 of the scope of patent application In the slurry chemical vapor deposition reaction chamber, the thickness of the aforementioned silicon oxynitride protective layer is preferably about 640 A. 19 · The high-density plasma chemical vapor deposition reaction chamber according to item 16 of the scope of the patent application, wherein the thickness of the first undoped silica glass layer is generally about 4 000 A. 20 · The high-density plasma chemical vapor deposition reaction chamber described in item 16 of the scope of the patent application, wherein the thickness of the fluorine-containing silica glass layer is generally about 70 0 A. 21 ·如申請專利範圍第丨6項所述之高密度電漿化學氣 相沉積反應室,其中上述第二無楼雜矽玻璃層之厚度大體 上以4 5 0 0 A為較佳。21 · The high-density plasma chemical vapor deposition reaction chamber described in item 6 of the patent application range, wherein the thickness of the second non-building heterogeneous silica glass layer is generally about 4500 A. 0503-6452TWF;TSMC2001-0144;mf1 in.ptd 第14頁0503-6452TWF; TSMC2001-0144; mf1 in.ptd p. 14
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