TW512510B - Electrostatic discharge protection device - Google Patents

Abstract

An electrostatic discharge protection device is disclosed, which is disposed between the bonding pad coupled to the external signal and a specific level, and which comprises a substrate of first type; a first doped region of the second type formed on the substrate of the first type and coupled to the bonding pad; a second doped region of the second type formed on the substrate of the first type; a third doped region of the second type formed on the substrate of the first type and coupled to the specific level; a gate disposed between the second doped region of the second type and the third doped region of the second type and coupled to the specific level; and a resistor disposed between the second doped region of the second type and the bonding pad.

Description

The present invention relates to various types of electrical discharge protection devices capable of reducing bonding pads. 2Electrical discharge protection devices, especially those related to unnecessary power loss in the process of electrostatic discharge) ^ Electrostatlc Dlscharge (hereinafter referred to as ESD //, said k exists in the measurement, assembly, installation and use of integrated circuits, it may be Causes damage to the integrated circuit and indirectly affects the performance of the electronic system. However, the most common reasons for the formation of ESD stress are the following three types. (1) Human body model: US military only Model No. 3015.6 (MIL-STD-883, Method 3015 · 6) is a model defined by the ESD stress caused by the static electricity of the human body when it contacts the pins of the integrated circuit. (2) machine mode m〇del): The ESD stress caused by the static electricity carried by the machine touching the pins of the integrated circuit is measured according to the existing industry standard El A J-1C-121 method 20. (3) Charge element mode ( charge device model): In the subsequent process, the integrated circuit that has been charged contacts the grounded conductive material, so it forms an ESD pulse path for the plutonium circuit. ^ With the advancement of process technology, the ESD tolerance has been One of the main considerations for the reliability of integrated circuits (1C). Especially after the semiconductor process technology has entered the deep submicron era (deepsubmicr ο η regime), SCaled-down transistors, shallower doped The depth of the hybrid interface, the thinner gate oxide layer, the lightly-doped drain (LDD), the shallow trench isolation (STI) process, and the metal silicide process, etc. ESD stress is relatively fragile. Therefore, in jc

D1ZD1U V. Description of the invention (2) = Loss: Ports must be specially designed with ESD protection circuit components to avoid ESJ damage. Guarantee. Only K 笮 refers to FIG. 1, which shows a conventional electrostatic discharge. ”As shown in FIG. 10, the conventional electrostatic discharge protective device ^ -type substrate 10 includes an N-type doped ㈣ and a ^ -type doped region 1 1 It is coupled to the receiver; the “Miscellaneous N” signal includes the above two external power sources during normal operation; and the n-type doped region 12 is lightly connected to and is the gate. Therefore, the N-type potential additionally Layer structure

The doped region 12 can form a parasitic chirp, a chirped substrate 10, and a device of N chirp current.

The doped region 11 and the P-type substrate 10 will mainly appear at the junction 塾 13, and N will prevent the internal circuit π from being damaged by ESD. ^ Before and after, the ESD current will be discharged. 'In order to eliminate high-frequency noise from the power supply, the conventional technology is used in the bonding pads 3 and a ^ ^ 16. Here, 5 Ω is taken as an example. Resistor 丨 6 σ ”is placed between a resistor, s, south ★ 6 and the existing capacitor in the power supply circuit. See Figure 2. Figure 2 is the high-frequency noise of the power supply. Roadmap. See Figure 2. As shown in the figure, the connection = 3 pass ^: there is a right lightning resistance 16 between the electrical discharge protection device and the internal circuit 17 and 15 parasitic double-junction transistor 7 /, with power

When u, it can be seen on the bonding pad through the parasitic double-sided electrical 5 nd 2D event ... ^ ^ ^ φ The voltage of the electric sun and the sun body 15 collapses, and the high frequency Xun Neng ί Γ Low pass filter, wave 0503-6720TWf formed by the existing capacitors in the source circuit; TSMC2001-0624; ROBERT.ptd $ 5 pages

51251U V. Description of the invention (3) shows that the traditional technology must be used, and it will increase the power consumption of the 塾 13 for the benefit of one type. ^ In order to solve the above problems, the main purpose of the present invention is to set up; ^ 接 人 ί 盘 / ^ If the protection device can be set in normal operation; the resistance between the circuit inside the mouth will come from electricity; the $ frequency miscellaneous 1 of ^ will be eliminated. In addition, the present invention further describes a brother pcn ^ 3 4, the original high frequency miscellaneous table flow through the above-mentioned resistor and vainly ^ ..., plus the power loss of the bonding pad. " As mentioned, the present invention proposes an electrostatic discharge arrangement, which is disposed on a bonding pad and a garment which are lightly connected to an external signal, and includes a first-type substrate formed between the first pull-in, a first-type doped region, It is formed on the first type substrate, and is formed on the first type substrate. The first and second type doped regions are formed on the first type substrate, and the third and second type doped regions are formed on the first type substrate. The j-coupling of the region and the third and second type doped regions: a gate electrode provided in the second and second type dopants and a second and second type doped regions: = = == Between the resistance. In order to make the above object of the present invention, a preferred embodiment is exemplified below, people and points can be more clearly understood, as follows: 1 In accordance with the drawings, a detailed description is given as an illustration: Show traditional electrostatic discharge Figure 2 is a cross-sectional view showing the traditional electrostatic discharge. Fig. 3 is a circuit diagram showing the positions of the clothes according to the present invention. "Static discharge protection described in the example Page 6 0503-6720TWf; TSMC2001-0624; ROBERT.ptd ^ 510

The electrostatic discharge protection device according to the embodiment. Fig. 4 is a circuit diagram showing an implementation according to the present invention. Number description: 1 0, 20 ~ p-type substrate; 11, 12, 21, 22, 23 ~ N-type doped regions; 1 3, 2 4 ~ bonding pads; 1 4, 2 7 ~ laminated structure; 15, 28A 28B ~ parasitic double-junction transistor; 1 6, 2 5 ~ resistance;

17, 26 ~ internal circuit; ^ Pathl, Path2 ~ current path. Implementation Example: Brother, FIG. 3 is a cross-sectional view showing a household application device according to an embodiment of the present invention. As shown in FIG. 3, according to the present invention, ^ == the electric discharge protection device i includes a -P-type substrate 20 type ": a junction region N; a doped region 22; and an Nΐ-type doped region 22 on the N-type doped region. It is electrically connected to 塾 2 via a resistor 25; and NL includes input to the above-mentioned external power source during normal operation; and the ν-type doped region 23 is connected to the ground potential and 2 7 is the gate, which is subject to other Controlled by the signal—the structure region, the P-type substrate 20, and the erbium doped region 2 " port: the configuration doped transistor 28A; the N-type doped region 22 I j constitutes a double-junction type substrate 20 N-type doping

512510

The region 23 can constitute a parasitic double junction transistor 28B, which can be used as a garment for discharging ESD current. When the ESD event occurs in the bonding pad 24, the current path Path2 has a higher resistance than the current path Pathl by 25, so its impedance is higher. At this time, the ESD current will choose to pass through the current path pathi, thus causing the n-type doping region 21 It collapses with the P-type substrate 20 in advance to discharge esd current, and prevents the internal circuit 26 from being damaged by ESD. As mentioned above, because of the resistance 25, there is little chance that the double junction transistor 28B will be turned on. When an ESD event occurs at junction 塾 24 ', usually only the double junction transistor 28a, which is the main ESD structure, is turned on.

In addition, in normal operation, in order to eliminate high-frequency noise from the power source, a resistor 25 is provided between the bonding pad 24 and the internal circuit 26. Here, 5 Ω is used as an example. The resistor 25 and the existing capacitor in the power supply circuit form a low-pass filter, so it effectively eliminates high-frequency noise from the power supply.

… Refer to FIG. 4 ′ FIG. 4 is a circuit diagram showing an electrostatic discharge protection device according to an embodiment of the present invention. As shown in Fig. 4, a resistance 25 and a parasitic double junction transistor 28B are provided between the bonding pad 24 and the internal circuit 26, and a parasitic double junction transistor 28a is provided between the f-bond pad 24 and the ground potential. When the ESD event occurs on the bonding pad 24, the ESD can be eliminated by the voltage collapse of the parasitic double junction transistor 28A, and the current path is not the same as pathi: when the circuit is generally operated, due to the parasitic double junction transistor 28A is not up to the "Condition" so the signal input from the power supply terminal will be directly input to the internal circuit 26 through the resistor 2 5. The current path is as shown in Path2, and the part of the signal that turns off high-frequency noise will be resistor 25. Low-pass filter formed by existing capacitors in the power circuit.

〇503-6720TWf; TSMC2001-0624; ROBERT.ptd

512510 V. Description of the invention (6) In summary, according to the electrostatic discharge protection device according to the embodiment of the present invention, in normal operation, the resistance between the pad and the internal circuit will be high from the power supply. Noise reduction. In the case of ESD, the electrostatic discharge protection device according to the embodiment of the present invention will automatically switch the discharge path of the ESD to prevent the ESD current from passing through the above-mentioned resistor, so the power loss during the ESD event can be effectively reduced. Although the present invention is disclosed as above with a preferred embodiment, it is not intended to limit the scope of the present invention. Any person skilled in the art can make some modifications and decorations without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be determined by the scope of the attached patent application. Xin

0503-6720TWf; TSMC2001-0624; ROBERT.ptd page 9

Claims (1)

512510 6. Scope of patent application1. An electrostatic discharge protection device is provided between a bonding pad coupled to an external signal and a specific level, including: ~ a first type substrate; formed on the first type substrate, and Lightly formed on the first type substrate; formed on the first type substrate and coupled to a first and second type doped region and connected to the bonding pad; a second and second type doped region and a third and second type doped region The impurity regions are connected to the above-mentioned specific level; ★ One gate is formed on the surface of the first-type substrate, and is disposed between the second-type doped region and the third-type doped region, and is coupled. Connected to the specific level; and a resistor disposed between the second and second type doped regions and above. 4 π mouth! 2. The electrostatic discharge protection device according to item 1 of the scope of patent application, wherein the first type substrate is a P-type substrate. 3. The electrostatic discharge protection device according to item 2 of the scope of the patent application, wherein the first and second type doped regions, the second and second type doped regions, and the second type doped region are N-type doped regions. . 4 · According to the electrostatic discharge protection device described in item 3 of the scope of the patent application, a filter circuit is used to filter the external signal. 5 · The electrostatic discharge protection device as described in item 4 of the patent application, wherein the specific level is a ground potential.