TW512485B - Method for coating material with low dielectric constant at an elevated process yield - Google Patents
Method for coating material with low dielectric constant at an elevated process yield Download PDFInfo
- Publication number
- TW512485B TW512485B TW90124753A TW90124753A TW512485B TW 512485 B TW512485 B TW 512485B TW 90124753 A TW90124753 A TW 90124753A TW 90124753 A TW90124753 A TW 90124753A TW 512485 B TW512485 B TW 512485B
- Authority
- TW
- Taiwan
- Prior art keywords
- dielectric constant
- low dielectric
- coating
- constant material
- low
- Prior art date
Links
Landscapes
- Formation Of Insulating Films (AREA)
Abstract
Description
五、發明說明(1) 發明領域: 絲备 即低介電常數材皙,古 種在進行塗佈低介電常數材質之制二之方法,特別是一 質的溶劑預濕於晶圓表、ς 以低介電常數材 而拎向製程良率的方法。 發明背景: 因導線的阻值與其截面積成反比 度的提高’金屬内連線的線寬:::,電路之集 此其阻值便隨之提高二!度都隨之縮小,因 度的提高,金屬内連$ 迎者積體電路之集積宓 間的藕合電容=距隨之縮小1而造成導線: 領域之後,金::連:=積體電路的製程進入深次微; 此影響積體電路的運:::且電谷遲滯大幅提高’也因 路的集積密度,取ΐ率…提高積體電 佳的選擇便是更換入 、.距卩不且提咼的條件之下,最 屬内連線方面層間介電層的材質。在金 子良的特性外更具有良好的“ 值則必須在另一方面,層間介電 質以原有 J "電吊數(Dl elec trie Constant )的材 々。二、一氧化矽,以降低金屬内連線之間的藕合電 ί小夕的介電常數約為3·9,因此必須選取介電常 、 、介電質做為層間介電層,方可達到降低電阻一 512485 五、發明說明(2) 電容遲滯的功效,例如:氟挾雜之二氧化矽(S i OF )、有 機旋塗玻璃(S0G )等等。 然而塗佈介電材質於晶圓上會受到微粒以及表面特性 之影響。由於微粒所造成的特性不良,圖案缺陷、絕緣膜 耐壓不良、離子植入時局部植入不佳等。在實際的元件製 程之中,較多微粒可能吸附在矽晶圓表面的製程,被舉出 的有(1 )乾蝕刻製程、(2 )離子植入製程、(3 )濺鍍 成膜製程、(4 )化學氣相沉積製程等。還有,可能吸附 在晶圓表面的製程,除了上記的製程之外尚有微影製程。 關於微粒去除的基本考量方法,首先是必須降低晶圓表面 的微粒,但是藉由濕式洗淨來去除也是不得不考量的方法 之一。 以先前技術所塗佈之結果示之於圖二(a ),在已往 習知之晶圓塗佈製程中’很容易在晶圓表面上形成很多的 小微粒;比較嚴重時,甚至會出現凹凸不平的現象的。 本發明有鑑於上述之缺失,因此提出一種新方法’以為改 善晶圓塗佈製程之方法。 發明目的與概述 本發明之主要目的為在塗佈低介電常數材質之前,使V. Description of the invention (1) Field of invention: Silk preparation means low-dielectric-constant materials. The ancient method is the second method for coating low-dielectric-constant materials, especially pre-wet a solvent with a good quality on the wafer surface. ς A method for heading the process yield with a low dielectric constant material. Background of the invention: As the resistance value of a wire increases in inverse proportion to its cross-sectional area, the line width of a metal interconnect :::, a set of circuits, the resistance value will increase by two! As the degree increases, as the degree increases, the metal interconnects the combined capacitance of the integrated circuit of the welcome circuit = the distance decreases by 1 and the wire is caused: after the field, gold :: connect: = integrated circuit The manufacturing process is deep and subtle; this affects the operation of the integrated circuit :: and the hysteresis of the electric valley is greatly increased, and also due to the accumulation density of the road, the rate of access ... The best choice to improve the integrated circuit is to replace the input,. Under the condition of mentioning the most, the material of the interlayer dielectric layer in the interconnection. In addition to the characteristics of Jinliangliang, it must have a good "value. On the other hand, the interlayer dielectric must be based on the original J " Dl elec trie Constant. 2. Silicon monoxide to reduce The dielectric constant of the coupling electric wire between the metal interconnects is about 3.9. Therefore, the dielectric constant, dielectric, and dielectric must be selected as the interlayer dielectric layer in order to reduce the resistance. 512485 Description of the invention (2) The effect of capacitor hysteresis, such as: silicon dioxide (Si i) doped with fluorine, organic spin-on glass (S0G), etc. However, coating dielectric materials on the wafer will be subject to particles and surfaces The effect of characteristics. Due to the poor characteristics caused by particles, pattern defects, poor insulation film pressure resistance, poor local implantation during ion implantation, etc. In the actual device manufacturing process, more particles may be adsorbed on the surface of the silicon wafer. The processes include (1) dry etching process, (2) ion implantation process, (3) sputtering film formation process, (4) chemical vapor deposition process, etc. In addition, it may be adsorbed on the wafer Surface process, in addition to the above-mentioned process, there is still a slight The basic consideration method of particle removal is to first reduce the particles on the wafer surface, but it is also one of the methods that must be considered to remove by wet cleaning. The result of coating with the previous technology is shown in the figure Second (a), in the conventional wafer coating process, it is easy to form a lot of small particles on the wafer surface; when it is more serious, the phenomenon of unevenness may even occur. The present invention has the above-mentioned shortcomings, Therefore, a new method is proposed as a method for improving the wafer coating process. OBJECTS AND SUMMARY OF THE INVENTION The main purpose of the present invention is to make low-k dielectric materials before coating.
512485512485
用溶劑預濕晶圓表 中之塗佈低介電常 述之晶圓上,接著 烤該低介電常數材 面之製程,進而提 婁丈材質之方法包含 塗佈上述之低介電 質’最後固化該低 高塗佈製程良率。其 ,首先以溶劑預濕所 常數材質,再接著烘 介電常數材質。 上述之低介電常數材質包括,但不限定於··(a) Si lkThe solvent is used to pre-wet the low-dielectric wafer on the wafer sheet, and then the process of baking the low-dielectric constant material surface, and then the method of improving the material includes coating the above-mentioned low-dielectric material. Finally, the low and high coating process yield is cured. Firstly, the constant-constant material is first wetted with a solvent, and then the dielectric-constant material is dried. The above low dielectric constant materials include, but are not limited to ... (a) Si lk
(Aromatic alkyne p〇lymer) 、(b) LKD-5109 (Inorganic siloxane polymer) 、(c) Nanoglass-E (Inorganic siloxane polymer ) ^ (d) Flare (I n 〇 r g a n i c s i 1 〇 x a n e p 〇 1 y m e r )。 其中之預濕溶劑至少包括:(a)溶劑:PG ME A (propylene glycol monomethyl ether acetate)其適 用的低介電常數材質:Silk (Aromatic alkyne polymer )N LKD-510 9 ( Inorganic siloxane polymer );及(b) 溶劑·· GBL(Gama-butyl lactone)其適用的低介電常數材 質有Nanog1 ass —E (Inorganic siloxane polymer )、 Flare ( Inorganic siloxane polymer ) 0 詳細說明 本發明係關於一種低介電常數材質之預濕處理進而改 善塗佈製程良率的方法;特別是關於一種在塗佈低介電常(Aromatic alkyne polymer), (b) LKD-5109 (Inorganic siloxane polymer), (c) Nanoglass-E (Inorganic siloxane polymer) ^ (d) Flare (I n 〇 r g a n i c s i 1 〇 x a n e p 〇 1 y m e r). The pre-wetting solvent includes at least: (a) Solvent: PG ME A (propylene glycol monomethyl ether acetate) and its applicable low dielectric constant material: Silk (Aromatic alkyne polymer) N LKD-510 9 (Inorganic siloxane polymer); and (b) Solvents. · GBL (Gama-butyl lactone) is suitable for low dielectric constant materials such as Nanog1 ass —E (Inorganic siloxane polymer), Flare (Inorganic siloxane polymer). 0 Detailed description The present invention relates to a low dielectric constant Method for pre-wetting material to improve the yield of coating process; in particular, it relates to a method for coating low dielectric constant
第6頁Page 6
本發明揭露使用一種低介電常數材質的溶劑,預濕 」所奴進行塗佈之半導體基板上的塗佈方法,其中之低介 電常數材質包括,但不限定於:(a) suk (Aromatic alkyne polymer) >(b) LKD-5109 (Inorganic siloxane Polymer ) (c) Nanog1ass-E (Inorganic siloxane polymer ) 、 (d) XLK (Inorganic siloxane polymer )。 其中所述之低介電常數材質的成份,其材質的成份包括 有:矽:0〜30% ,氧:〇〜50% ,碳:1〇〜94% ,氫:5〜50% 。The present invention discloses a method for coating a semiconductor substrate using a solvent with a low dielectric constant material to pre-wet the substrate. The low dielectric constant material includes, but is not limited to: (a) suk (Aromatic (alkyne polymer) > (b) LKD-5109 (Inorganic siloxane Polymer) (c) Nanog1ass-E (Inorganic siloxane polymer), (d) XLK (Inorganic siloxane polymer). The composition of the low-dielectric constant material mentioned above includes: silicon: 0 ~ 30%, oxygen: 0 ~ 50%, carbon: 10 ~ 94%, hydrogen: 5 ~ 50%.
上述之預濕溶劑至少包括但不限定(a)溶劑:PGME A (propylene glycol monomethyl ether acetate )其適 用的低介電常數材質:Silk (Aromatic alkyne polymer )、LKD-5109 (Organic siloxane polymer);及(b)溶 劑:GBL (Gama-butyl lactone)其適用的低介電常數材 質有Nanoglass一E (Inorganic si 1oxane polymer ) - XLK (Inorganic s i1oxane polymer) o 本發明第一實施例的製程流程圖請參閱圖一;首The aforementioned pre-wetting solvents include at least, but not limited to, (a) solvents: PGME A (propylene glycol monomethyl ether acetate) and its applicable low dielectric constant materials: Silk (Aromatic alkyne polymer), LKD-5109 (Organic siloxane polymer); and (B) Solvent: GBL (Gama-butyl lactone). Suitable low dielectric constant materials are Nanoglass-E (Inorganic si 1oxane polymer)-XLK (Inorganic s i1oxane polymer). O Please refer to the process flow chart of the first embodiment of the present invention. See figure one;
第7頁 J 丄 五、發明說明(5) 先我們在執行晶圓塗佈之前’以低介雪堂卷以# ^ ^ ,,πη · Λ低)丨電吊數材質的溶劑 曰曰HJ表面上10 0,清特別注意每次實 毫升劑量的預濕效果“以:定 t境之參數:轉速約25〇〇—30 0 0轉/分鐘,持續約 y、·里/完成塗佈後,需再經過烘烤過程11 〇,將溶劑蒸 X /而形成具有介電隔離作用之固體化材質,換言之,加 熱後體積會變小。繼續進行乾燥階段丨20,依據本°發明之 環境參數為:轉速3 0 0 0轉/分鐘,持續25_35秒鐘/再者’ 在合氮氣之環境下執行烘乾階段130:該烘乾製程之環境 參數為轉速介於2 0 0 0〜45 0 0轉/分鐘間,溫度介於攝氏 80〜3 5 0度間,持續5〜10分鐘;最後是固化階段UQ,用以將 上述塗佈之介電材質固化:舉例而言其轉速介於 2000〜4500轉/分鐘間,並在溫度介於攝氏35〇〜45〇度間之 參數下’通入氮氣以進行穩定化製程(。叮6)。 本發明揭露在塗佈低介電常數材質之前,使用溶劑 預濕2 1 0於晶圓表面上之製程,來取代習知技藝之未經溶 劑預濕2 0 0於晶圓表面之製程,而提高塗佈製程良率。請 參考圖示二(a) 2 0 0、(b) 21〇之比照,在以往習知的技藝 中,若晶圓表面有微粒或缺陷時,此方法可改良凹凸不平 的現象。請參考圖示二(a)、(b)中,分別將膜層塗佈於晶 圓上,以上面序號刻痕做為表面狀態最差之情況代表。由 圖可知[先刖技術膜層無法附著,而使用本發明可將膜層 塗佈於最差狀況之表面,足見本發明之功效。Page 7 J. V. Description of the invention (5) Before we perform wafer coating, we will use # ^ ^,, πη · Λ low) to reduce the temperature of the material. At 100, Qing paid special attention to the pre-wetting effect of each real milliliter dose. "To: set parameters of the environment: rotation speed of about 2500-30 million revolutions per minute, lasting about y, · li / after finishing coating, Need to go through the baking process 11 〇, steam the solvent X / to form a solid material with dielectric isolation, in other words, the volume will become smaller after heating. Continue the drying stage 丨 20, according to the environmental parameters of the invention is: : Rotation speed 3 0 0 0 revolutions / minute for 25_35 seconds / again 'to perform the drying phase in a nitrogen atmosphere 130: The environmental parameter of the drying process is that the rotation speed is between 2 0 0 0 to 45 0 0 revolutions / Minute, the temperature is between 80 ~ 350 degrees Celsius for 5 ~ 10 minutes; finally, the curing stage UQ is used to cure the coated dielectric material: for example, its speed is between 2000 ~ 4500 Turn / minute, and under the parameters of temperature between 35 ~ 45 degrees Celsius, pass in nitrogen for stabilization Process (.ding 6). The present invention discloses a process of pre-wetting a solvent on a wafer surface with a solvent before coating a low dielectric constant material to replace the conventional technique of pre-wetting a solvent without a solvent. The wafer surface process can improve the yield of the coating process. Please refer to the comparison of Figure 2 (a) 2 0 0 and (b) 2 0 0. In the conventional art, if there are particles or defects on the surface of the wafer This method can improve the phenomenon of unevenness. Please refer to Figure 2 (a), (b), apply the film layer on the wafer respectively, and use the above serial number score as the worst case condition. . It can be seen from the figure that [the prior art film layer cannot be attached, and the film layer can be coated on the worst-case surface using the present invention, which shows the efficacy of the present invention.
第8頁 512485 五、發明說明(6) 本發明各實施例所得之塗佈製程良率,遠較習知技 藝之塗佈製程良率為高;因此,使用本發明揭露之溶劑 (b )預濕2 1 0晶圓表面之製程,來取代(a )未經溶劑預濕2 0 0 於晶圓表面上之製程,除了可以大幅改善後續製程之製程 良率外,也可以大幅改善元件性能,同時也降低了製造的 成本。此外,藉由調整本發明之晶圓塗佈製程的參數,例 如,適度的調整劑量以達預濕效果至較佳;調整設定該塗 佈環境之參數:(轉速,時間,溫度);調整設定烘烤過程 之參數等,對元件的設計和應用有極大的助益。 以上所述係利用較佳實施例,詳細說明本發明而非 限制本發明的範圍,而且熟知此技藝的人士亦能明瞭適當 地作些微的改變與調整仍將不失本發明之要義所在亦不脫 離之精神和範圍。Page 8 512485 V. Description of the invention (6) The yield of the coating process obtained by each embodiment of the present invention is much higher than that of the coating process of the conventional technology; therefore, the solvent (b) disclosed in the present invention is used to predict the yield of the coating process. The process of wet 2 10 wafer surface instead of (a) the process of pre-wetting 2 0 0 on the wafer surface without solvent can not only greatly improve the process yield of subsequent processes, but also greatly improve component performance. It also reduces manufacturing costs. In addition, by adjusting the parameters of the wafer coating process of the present invention, for example, moderately adjusting the dosage to achieve a better pre-wetting effect; adjusting and setting the parameters of the coating environment: (speed, time, temperature); adjusting settings The parameters of the baking process are of great help to the design and application of components. The above description uses the preferred embodiments to explain the present invention in detail without limiting the scope of the present invention, and those skilled in the art can understand that appropriate changes and adjustments will still be made without losing the essence of the present invention. The spirit and scope of disengagement.
512485 圖式簡單說明 圖一、本發明之最佳實施例之預濕功能流程圖。 圖二、(a )未使用預濕處理,相較於(b)使用預濕處理之對 照圖示。 圖號表 I 0 0預先濕潤 II 0初步烘乾 1 2 0再烘乾 1 3 0氮氣烘乾 1 4 0固化階段 2 0 0未經預濕處理 2 1 0經預濕處理512485 Brief description of the diagram Figure 1. Flow chart of the pre-wetting function of the preferred embodiment of the present invention. Figure 2. (a) No pre-wet treatment is used, compared to (b) a comparison of the pre-wet treatment. Drawing number table I 0 0 Pre-wet II 0 Preliminary drying 1 2 0 Re-drying 1 3 0 Nitrogen drying 1 4 0 Curing stage 2 0 0 Without pre-wetting treatment 2 1 0 After pre-wetting treatment
第10頁Page 10
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW90124753A TW512485B (en) | 2001-10-05 | 2001-10-05 | Method for coating material with low dielectric constant at an elevated process yield |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW90124753A TW512485B (en) | 2001-10-05 | 2001-10-05 | Method for coating material with low dielectric constant at an elevated process yield |
Publications (1)
Publication Number | Publication Date |
---|---|
TW512485B true TW512485B (en) | 2002-12-01 |
Family
ID=27731304
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW90124753A TW512485B (en) | 2001-10-05 | 2001-10-05 | Method for coating material with low dielectric constant at an elevated process yield |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW512485B (en) |
-
2001
- 2001-10-05 TW TW90124753A patent/TW512485B/en not_active IP Right Cessation
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6080526A (en) | Integration of low-k polymers into interlevel dielectrics using controlled electron-beam radiation | |
US6214748B1 (en) | Semiconductor device and method for the fabrication thereof | |
JP3418458B2 (en) | Method for manufacturing semiconductor device | |
JP4521992B2 (en) | Manufacturing method of wiring structure | |
JP3568537B2 (en) | Electron beam processed film for microelectronic structure | |
US6559071B2 (en) | Process for producing dielectric thin films | |
JP2004511896A (en) | Method for restoring hydrophobicity in dielectric films and materials | |
JP2001514802A (en) | Chemical mechanical polishing of organic polymer insulation film | |
KR20110062158A (en) | Filler for filling a gap and method for manufacturing semiconductor capacitor using the same | |
JP2007508691A (en) | Repair of damage in low dielectric constant dielectric materials using silylating agents | |
JP2005517784A (en) | Organosiloxane | |
US5877080A (en) | Method of manufacturing semiconductor device | |
JP3015763B2 (en) | Method for manufacturing semiconductor device | |
JP2005507015A (en) | Etch stop resin | |
US7056824B2 (en) | Electronic device manufacture | |
JP2002524849A (en) | A method to optimize the mechanical strength of nanoporous silica | |
JPH1140554A (en) | Insulating film forming material, and method for forming insulating film and semiconductor device using it | |
TW512485B (en) | Method for coating material with low dielectric constant at an elevated process yield | |
JP3982073B2 (en) | Low dielectric constant insulating film forming method | |
JPH08316209A (en) | Method of plasma-etching multilayer insulation film | |
JP3949841B2 (en) | Membrane processing method | |
JP2006503165A (en) | Organosiloxane | |
JP2004285266A (en) | Composition for porous insulating film, its manufacturing method, porous insulating film and its manufacturing method | |
JP2000021872A (en) | Low-dielectric const. resin compsn., method of forming low-dielectric const. insulation film and manufacturing semiconductor device | |
JPH06326202A (en) | Semiconductor, and formation of its insulating film flattened film |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GD4A | Issue of patent certificate for granted invention patent | ||
MK4A | Expiration of patent term of an invention patent |