TW511135B - Method for integrated in-situ cleaning and subsequent atomic layer deposition within a single processing chamber - Google Patents

Method for integrated in-situ cleaning and subsequent atomic layer deposition within a single processing chamber Download PDF

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Publication number
TW511135B
TW511135B TW90128452A TW90128452A TW511135B TW 511135 B TW511135 B TW 511135B TW 90128452 A TW90128452 A TW 90128452A TW 90128452 A TW90128452 A TW 90128452A TW 511135 B TW511135 B TW 511135B
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TW
Taiwan
Prior art keywords
substrate
chamber
scope
patent application
sequential method
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Application number
TW90128452A
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Chinese (zh)
Inventor
Tony P Chiang
Karl F Leeser
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Angstron Systems Inc
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Priority claimed from US09/812,352 external-priority patent/US20020104481A1/en
Application filed by Angstron Systems Inc filed Critical Angstron Systems Inc
Application granted granted Critical
Publication of TW511135B publication Critical patent/TW511135B/en

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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
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    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0227Pretreatment of the material to be coated by cleaning or etching
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    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • C23C16/45536Use of plasma, radiation or electromagnetic fields
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    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • C23C16/45536Use of plasma, radiation or electromagnetic fields
    • C23C16/45542Plasma being used non-continuously during the ALD reactions
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    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45544Atomic layer deposition [ALD] characterized by the apparatus
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    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/46Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
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    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/46Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
    • C23C16/463Cooling of the substrate
    • C23C16/466Cooling of the substrate using thermal contact gas
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/48Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation
    • C23C16/481Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation by radiant heating of the substrate
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    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/511Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using microwave discharges
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/3244Gas supply means
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    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
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    • H01J37/32449Gas control, e.g. control of the gas flow
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    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32798Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
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    • H01J37/32862In situ cleaning of vessels and/or internal parts
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
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    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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    • H01L21/76814Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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Abstract

A system and sequential method for integrated, in-situ modification of a substrate and subsequent atomic layer deposition of a thin film onto the substrate in an evacuated chamber comprising introducing at least one feed gas into the chamber; generating a plasma from the feed gas; exposing said substrate to ions and/or radicals formed by the plasma; modulating any ions; reacting the substrate with said modulated ions and/or radicals to remove any contaminants from the substrate and producing a modified substrate. These steps are followed, in-situ, by performing an atomic layer deposition of a thin film onto the modified substrate in the chamber including introducing a first reactant gas into said chamber; adsorbing at least one monolayer of the first reactant gas onto the modified substrate; evacuating any excess first reactant gas from the chamber; introducing at least one additional feed gas into the chamber, generating a second plasma from the additional feed gas; exposing the modified substrate to additional ions and/or radicals formed by the plasma; modulating any additional ions; and reacting the adsorbed monolayer of the first reactant gas with any modulated additional ions and/or radicals to deposit the thin film.

Description

511135 A7 ___B7___ 五、發明說明(I ) 相關申請案之相互參考 本發明申請案係主張在2000年12月6日申請之美國 臨時申請案號60/254,280,2000年12月15日申請之美國 臨時申請案號60/255,812及2001年3月19日申請之美國 臨時申請案號09/812,352號案的利益。 發明背景 本發明基本上係相關於廣泛使用在半導體,資料儲存 ,平面板顯示器及相關或其他工業中之先進薄膜沈積方法 的領域。尤其是,本發明係關於一現場預淸潔裝置及技術 ,其係適合於在經由調制離子感應式原子層沈積(MII-ALD)而沈積導電,半導體及非導電等薄膜之前對於具有高 縱橫比地貌之淸潔及處理。 習知技術之詳細說明 半導體積體電路製造係使用一系列沈積及蝕刻步驟之 一層接一層的製程。線(“槽溝”)及/或洞口(“通孔”)係被用來 連接一線路的一部份至另一部份,或是一層至另一層。在 鋁導電化中,一平坦鋁膜係藉由蝕刻除去製程而被圖案化 爲金屬線且然後再使用介電質間隙塡入製程而將該金屬線 隔離。該介電係作爲如一絕緣體。爲了達到使一底下鋁層 與一上方鋁層電性連接之目的,將該介電質圖案化形成通 孔且然後該通孔被沈積一金屬導體(即鎢)。在銅(Cu)導 電化中,槽溝及通孔係被圖案化在該介電質內且然後再被 __ 4 ___ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) # 丨訂________線1·_________ 511135 A7 _____Β7_____ 五、發明說明(>) (請先閱讀背面之注意事項再填寫本頁) 沈積一金屬導體(即銅)。該槽溝及通孔被分別地(其稱爲 ”單鑲嵌式”)圖案化及塡入金屬。 在鋁及銅兩者導電化技藝中,通孔係被用來將一上方 金屬層連接至一底下金屬層。然而,在進行金屬通孔塡充 之前一重要的淸潔步驟必須被完成以達到確保在介於該上 方與底下金屬層間之一可信賴,低電阻的電性連接。此一 淸潔係必需的因爲在通孔塡充之前,該底下金屬導體係曝 露至用來定義該通孔之蝕刻製程所造成的副產物中。而且 ,由於被曝露至大氣或是任何含氧的環境中,被曝露之底 下金屬就發生氧化。如果該通孔係用來“接觸”該元件矽 ,則能發生該矽表面之氧化。這些氧化物(即,鋁,銅或 矽之氧化物)和殘留物(即,自在該飩刻製程中之光阻遮 罩所生的含碳殘留物)會造成不良的電性連接(即,高通. 孔或是接觸電阻,及不良的可靠度(即如早期電子位移的 失敗)。 · 濕化學蝕刻比如緩衝氧化物蝕刻(buffered oxide etch, BOE)或是大氣壓力下完成之氫氟酸浸入製程皆已被用來 在進行金屬塡充前淸潔被該圖案化介電質的地貌。然而, 當元件幾何尺寸的減少至0.25微米或更低時,該通孔之縱 橫比(其被定義爲該通孔深度與直徑之比)就會增加。如 此則會由於濕蝕刻對深且窄通孔之底部的不穩定淸潔及在 淸潔溶液中雜粒污染的可能性而使得該濕蝕刻變得不適當 及不具吸引力。結果,在真空中所實行之氬(Ar)電漿蝕刻 .已近來地被使用在通行金屬塡充前之淸潔該通孔的底部。 ............................ ..................-.5 丨丨 .......................................................................丨丨丨丨’’—丨丨丨丨丨丨丨丨丨丨丨 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 511135 A7 B7_ -----__ — 五、發明說明($ ) 氬電漿飩刻基本上係一物理濺鍍製程,因上激發的氯 離子(Α〇係被用來濺鍍(即,物理地撞擊出)該不必要材 質比如氧化物’含碳殘留物’及其他雜質。氬濺鍍在$潔 該通的底部上係較濕化學飩刻更有效率的。然而,當縱橫 化係高時,自該通孔底部所濺渡之該不必要材質能再沈積 至該通孔側壁上。此一效應將導至介於後積沈積金屬薄^ 與被污染介電質通孔側壁間之不良機械附著力。在銅導電 化中,在進行該銅電鍍塡充製程時,這些再沈積之側壁污 染物能夠導致側壁之空隙,則減少了該有效通孔橫截面積 。一該銅橫截面積的減少將減少它的電流攜帶能力。而且 ,那並未除去之側壁污染物係被倂合如不必要材質夾雜物 ,故毒化該通化塡充之金屬。這兩者效應之作用係增加該 全部通孔電阻,惡化元件的功能,及減少連接之可靠度。 該氬氣物理濺鍍之一更進一缺點係被圖案化地貌之外形能 被改變且可能影響元件之設計規則。如作爲一範例,該通 孔之頂部係優先地先被蝕刻及能變成爲大體上圓球狀(請 看圖3Β)。 一反應性預淸潔(美國專利案號6,11〇,836)已被提案出 以解決用純氬濺鎪所產生之前述課題。一含有鹵素或氫氧 電漿係被用來創造一由化學蝕刻而非物理濺鍍所主宰之製 程。該含有物質之鹵素或是氫氣很快地與氧化物起反應而 形成含氧副產物,其能再被抽氣而排除掉。 接下來的淸潔製程,不論它是濕化學’氬濺鍍,或是 反應性預淸潔,該基底必定不能被曝露至任何氧氣或是含 ___6 _______ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) .· 訂丨^-------線丨# 511135 A7 ___B7____ 五、發明說明(f )511135 A7 ___B7___ V. Description of the Invention (I) Cross Reference to Related Applications This invention application claims US Provisional Application No. 60 / 254,280 filed on December 6, 2000, and US Provisional Application filed on December 15, 2000 Benefits of application number 60 / 255,812 and US provisional application number 09 / 812,352 filed on March 19, 2001. BACKGROUND OF THE INVENTION The present invention is basically related to the field of advanced thin film deposition methods widely used in semiconductors, data storage, flat panel displays and related or other industries. In particular, the present invention relates to an on-site pre-cleaning device and technology, which is suitable for depositing conductive, semiconductor and non-conductive thin films with high aspect ratios before depositing conductive, semiconductor, and non-conductive films via modulated ion-induced atomic layer deposition (MII-ALD). Landscape cleanliness and treatment. Detailed Description of Conventional Technology Semiconductor integrated circuit manufacturing is a layer-by-layer process using a series of deposition and etching steps. Lines ("slots") and / or openings ("through holes") are used to connect one part of a line to another, or one layer to another. In aluminum conduction, a flat aluminum film is patterned into a metal line by an etching removal process and then the metal line is isolated using a dielectric gap penetration process. The dielectric system acts as an insulator. In order to achieve the purpose of electrically connecting a bottom aluminum layer and an upper aluminum layer, the dielectric is patterned to form a via, and then the via is deposited with a metal conductor (ie, tungsten). In copper (Cu) conductivity, the grooves and vias are patterned in the dielectric and then __ 4 ___ This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) ) (Please read the notes on the back before filling this page) # 丨 Order ________ Line 1 · _________ 511135 A7 _____ Β7 _____ 5. Description of the invention (>) (Please read the notes on the back before filling this page) Metal conductor (ie copper). The trenches and vias are patterned (and referred to as "single mosaic") and pierced into metal, respectively. In both aluminum and copper conductive techniques, vias are used to connect an upper metal layer to a lower metal layer. However, an important cleaning step must be completed before metal via filling is performed to ensure a reliable, low-resistance electrical connection between the upper and lower metal layers. This cleaning is necessary because before the via filling, the underlying metal guide system is exposed to by-products caused by the etching process used to define the via. Moreover, as a result of being exposed to the atmosphere or any oxygen-containing environment, the underlying metal is oxidized. If the via is used to "contact" the silicon of the device, oxidation of the silicon surface can occur. These oxides (ie, the oxides of aluminum, copper, or silicon) and residues (ie, the carbon-containing residues generated from the photoresist mask in this engraving process) can cause poor electrical connections (ie, High pass. Hole or contact resistance, and poor reliability (ie failure of early electronic displacement). · Wet chemical etching such as buffered oxide etch (BOE) or hydrofluoric acid immersion done at atmospheric pressure The processes have been used to clean the landscape of the patterned dielectric before metal filling. However, when the component geometry is reduced to 0.25 microns or less, the aspect ratio of the via (which is defined (The ratio of the depth of the through hole to the diameter) will increase. In this way, the wet etching will be caused by the unstable cleaning of the bottom of the deep and narrow through hole by wet etching and the possibility of contamination of particles in the cleaning solution. It becomes inappropriate and unattractive. As a result, the argon (Ar) plasma etching performed in a vacuum has been recently used to clean the bottom of the through-hole before passing the metal filling. ..... .............................-. 5丨 丨 ................................................ ............. 丨 丨 丨 丨 ''-丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 This paper standard is applicable to the Chinese National Standard (CNS ) A4 specification (210 X 297 mm) 511135 A7 B7_ -----__ — V. Description of the invention ($) Argon plasma etching is basically a physical sputtering process, because of the excited chloride ion (Α〇. Is used to sputter (that is, physically strike) this unnecessary material such as oxides 'carbon residues' and other impurities. Argon sputtering is more effective than wet chemical etching on the bottom of Jieqitong Efficiency. However, when the vertical and horizontal system is high, the unnecessary material splashed from the bottom of the through hole can be deposited on the side wall of the through hole. This effect will lead to a thin metal layer between the post-deposition ^ and Poor mechanical adhesion between the side walls of the contaminated dielectric vias. In copper conduction, during the copper electroplating process, these re-deposited side wall contaminants can cause voids in the side walls, reducing the effective communication Cross-sectional area of the hole. A reduction in the cross-sectional area of the copper will reduce its current carrying capacity. In addition, the side wall contaminants that have not been removed are mixed like unnecessary material inclusions, so poisoning the Tonghua metal. The effect of these two effects is to increase the resistance of the entire through hole and deteriorate the function of the element. And reduce the reliability of the connection. One of the further disadvantages of the physical argon sputtering is that the shape of the patterned landform can be changed and may affect the design rules of the component. As an example, the top of the through hole is preferentially first It is etched and can be made into a substantially spherical shape (see Figure 3B). A reactive pre-cleaning (US Patent No. 6,11,836) has been proposed to solve the problem caused by pure argon sputtering The aforementioned problem. A halogen or hydrogen-containing plasma system is used to create a process dominated by chemical etching rather than physical sputtering. The halogen or hydrogen containing the substance reacts quickly with the oxide to form an oxygen-containing by-product, which can be pumped down again to be removed. In the next cleaning process, whether it is wet chemical 'argon sputtering or reactive pre-cleaning, the substrate must not be exposed to any oxygen or contain ___6 _______ This paper size applies to Chinese National Standards (CNS) A4 specification (210 X 297 mm) (Please read the notes on the back before filling in this page). · Order 丨 ^ ------- line 丨 # 511135 A7 ___B7____ V. Description of the invention (f)

V 有雜質之環境(即,碳,氯,氟等)。如果這樣的曝光真 的發生,則不必要之自生氧化物及/或污染將再次形成在 該全新被淸潔基底界面上因而使作爲如一準備於後續沈積 之前次步驟的目的失敗。但當此淸潔方法及沈積步驟係被 使用在各別機械或工具上(即在濕蝕刻狀況下).或是在在 同一簇群工具之各別工作站處(即,在氳濺鍍或是反應性 預淸潔的狀況下)而該簇群工具之晶圓轉換發生在各步驟 間,或是在一簇群工具之各別工作站。 爲了達到解決此一課題之目的,則在一和後續沈積步 驟用一處理室之一現場式清潔製程便是非常的需要。此一 最好係具有一各別淸潔室,其係經由一真空傳送裝置所連 接至一各別沈積室。各別淸潔室能夠在甚至一減壓下具有 出現在背景環境圍繞物中之材質,其能負面地影響到被圖 案化介電質及被曝露出底下導體兩者之介面特性(即,即 將沈積之後續薄膜的附著力及/或晶格方向)。背景環境 圍繞物仍然包含放氮雜質及/或被除法之污染物(即,水 蒸氣,氟,含碳殘留物,等),其係在該前一製程步驟( 即,除氣或預淸潔)進行之時被除去的。此係對於整合至 銅導電化之低介電常數(“低K値”)絕緣體而言係特別地重 要。低K値材質係水氣敏感且在於它們很容易地吸收水, 如此則增加它們有效介電常數(一低介電常數係需要的此 乃因它可減少介於在空間上非常接近的訊號攜帶金屬線間 之串音且它可得到更快訊號傳播的結果)。 而且,低K介電質薄膜常展現出較傳統二氧化砂更弱 ___7____ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ' 一 "" (請先閱讀背面之注意事項再填寫本頁)V An environment with impurities (ie, carbon, chlorine, fluorine, etc.). If such exposure does occur, unnecessary autogenous oxides and / or contamination will re-form at the interface of the newly cleaned substrate, thereby defeating the purpose as a next step before preparation for subsequent deposition. However, when this cleaning method and deposition process are used on separate machines or tools (ie, under wet etching conditions), or on separate workstations in the same cluster of tools (ie, in sputtering or Reactive pre-cleaning conditions) and the wafer conversion of the cluster tool occurs between steps, or at each workstation of the cluster tool. In order to achieve the purpose of solving this problem, an on-site cleaning process using a processing chamber in one and subsequent deposition steps is very much needed. This one preferably has a separate cleaning chamber which is connected to a separate deposition chamber via a vacuum transfer device. Individual cleanrooms can have materials that appear in the surrounding environment at even a reduced pressure, which can negatively affect the interface characteristics of both the patterned dielectric and exposed conductors (that is, the upcoming deposition Subsequent film adhesion and / or lattice direction). The surrounding environment still contains nitrogen-emitting impurities and / or removed pollutants (ie, water vapor, fluorine, carbon-containing residues, etc.), which are part of the previous process step (ie, degassing or precleaning) ) Removed while proceeding. This series is particularly important for low dielectric constant ("low K 値") insulators integrated into copper conduction. Low K 値 materials are sensitive to water and gas and they absorb water easily, so increasing their effective dielectric constant (a low dielectric constant is needed because it can reduce signal carryover that is very close in space). Crosstalk between metal wires and it can result in faster signal propagation). Moreover, low-K dielectric films often show weaker than traditional sand dioxide ___7____ This paper size applies to China National Standard (CNS) A4 specifications (210 X 297 mm) '' one " " (Please read the back first (Notes for filling in this page)

511135 A7 ______B7____ 五、發明說明(() 之附著力特性。就如做爲一例子,氟摻雜之二氧化矽( FSG)則因爲弱結合之介面氟(F)而遭受到不良之附著力特 性。氟將會破壞經常使用爲對於銅之擴散屏障層的含鉅 (Ta)材質。一擴散線性質係在銅種子層沈積之前被沈積進 入槽溝及通孔內。該擴散層的作用係防止銅擴散且也作用 如一黏膠層以將該銅種子層之附著至該介電質層之附著力 。氟破壞將會&lt;飛捨掉該擴散層之有效性,而導致不良之屏 障效果,高通孔電阻,在電鍍時之銅空隙的形成,以及在 進行化學機械平坦化(Chmical mechanical plai:arization,CMP)時之脫薄板(脫層化)。在同一處理室 內而在進行該屏障層沈積之前則高度地需要去立即具有一 可完成一現場預淸潔/表面處理步驟之手段。該方法在低基 底溫度下由於若比起傳統矽基氧化物時該低K材質(許多具 有K値小於2.5之低K材質僅有在溫度不高於200°C至 300°C時係穩定)之較低的熱穩定性之故,使該方法必需係 有效的。 而且,吾人仍需要如此一被整合現場預淸潔製程並不 會引入任何外額外複雜度至該全部製程或是取捨掉該沈積 室之生產量。甚而,該被整合現場淸潔方法應能夠淸潔及 處理具有高縱橫比之通孔及槽溝的底部及側壁而不會在地 貌輪廓上造成再沈積或是重大的變化。 發明槪要 本發明係相關於在導電性,半導電性及非導電性薄膜 __8 ___— —_ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) -AW—----訂— 線丨· 511135 A7 -------B7____ 五、發明說明(l ) 之沈積前所需要的一淸潔及處理高縱橫比之地貌的一現場 預淸潔裝置及技術。即將預除去之表面污染物可以係爲有 機材質,實際的雜粒污染,氧化物,或是不必要的沈積材 質,不必要的成長材質,或是其他方式形成在該基底表面 的方式。表面處理可以爲弱結合表面種類之保護(或可除 去式)的形式及不滿意之表面結合點的形式,及/或爲在 晶體結構,結晶學的方向,結構,或是相對於即將沈積的 上方薄膜的底下薄膜之附著力特性的修正。 尤其是,該本發明係使用一食虜素,或是最隹^壇食氫 薇麗基或是氫離子以淸潔並處理高縱橫比地貌之底部及其 俚J壁而沒有該被除去污染物之再沈積及在地貌輪廓之負面 的變化。該方法藉由使用在共同申請中之申請日爲2001年 3月19日的美國申請案〇9/812,352名稱“用於調制離子感 應式原子層沈積(MII-ALD)”在此係被稱爲“MII-ALD應用 ”所描述之裝置而成爲一現場式,沒有打開處理室門,沒有 在真空下進行基底輸送,及在硬體上沒有重大的變化之方 法’其中該美國申請案係爲在2000年12月6日申請之臨 時申if案,而案號爲60/254,280,且該美國申請案在此係 以整個倂入做爲參考。該淸潔表面處理步驟的完成不是以 單獨包含一鹵素或是氫的游離基就是最佳地同時採用包含 鹵素或氫及該基底之低能量離子撞擊。一氅食式5見場,言周 制式離子感應式原.子層沈積步驟(或是一系列沈積步驟)能 夠立即把跟隨包含所需在最終薄膜(或是被修正之改變成份 或材質之薄膜疊層)的主要元素之一適當先驅物質的應用。 —---— 9 ——___ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) .*··!訂---------線#.!1 511135 A7 ___ B7_;___ 五、發明說明(1 ) 該淸潔/表面處理步驟可以週期性地在介於不是同一薄膜之 各別層間就是變化成份或是材質之薄膜的各別層間被完成 以加強整個堆層的功能。該淸潔/表面處理之調制及該沈積 步驟能夠經由至少下面之一參數的調制而得以控制;該參 數係:⑴該先驅物質流量,⑵包含鹵素或氫游離基流量, ⑶該離子流量,或是⑷該離子能量。該淸潔/表面處理及後 續沈積步驟能夠在低基底溫度(即,一般係小於或是等於 200°C),以使得它相容於低K材質。 圖式簡單說明 圖1爲適合用於調制式離子感應式原子層沈積(ΜΠ-ALD)之一沈積系統。 圖2A爲一典型的依序之調制式離子感應式原子層沈 積(Mil-ALD)的製程順序。 圖2B爲另.一典型的依序之調制式離子感應式原子層 沈積(Mil-ALD)的製程順序。 圖2C爲一典型的非依序(連續的)調制式離子感應式原 子層沈積(MII-ALD)的製程順序。 圖3A爲在進行預淸潔前之一包含一已氧化的銅底層 之高縱橫比通孔。 圖3B爲一高縱橫比通孔,其揭示有被濺鍍銅氧化物 之再沈積側壁及在通孔角落處之削成梯狀。 圖3C爲一高縱橫比通孔,其揭示有本發明之該銅氧 化物已被除掉但並未有側壁再沈積及沒有負面影響到該通 ____ίο______ 本紙張尺度適用中國國家標準(CNS)A4規格㈣x 297公爱1 (請先閱讀背面之注意事項再填寫本頁) · 1 ^1 1« ϋ n n n^eJI n n n n I n n I n n 1· ϋ n n - 511135 A7 _ B7_ 五、發明說明((^ ) 孔角落之梯狀處。 圖4A爲一本發明之槪略圖,其解說一包括整合式現 場淸潔及沈積室之晶圓處理系統。 圖4B爲該習知技術之槪略圖,其解說一包含各別淸 潔及沈積室之晶圓處理系統。 元件符號說明 100 第一先驅物質 130 氬 110 回饋氣體 170 電漿產生室 160 微波功率 172 電漿 177 離子 130 回饋氣體 176 .氫游離基 184 抽氣 150 阻抗匹配裝置 170 電漿源室 180 沈積室 171 分配蓮蓬頭 175 孔口 181 基底 182 基底支撐臺 202,214 第二先驅物質 11 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁)511135 A7 ______B7____ 5. Description of the invention (() adhesion characteristics. As an example, fluorine-doped silicon dioxide (FSG) suffers from poor adhesion characteristics due to the weakly bound interface fluorine (F). Fluorine will destroy the giant (Ta) -containing material often used as a diffusion barrier for copper. A diffusion line property is deposited into the trenches and through holes before the copper seed layer is deposited. The role of the diffusion layer is to prevent Copper diffuses and also acts as an adhesive layer to adhere the copper seed layer to the dielectric layer. Fluoride damage will <strip the effectiveness of the diffusion layer, resulting in a poor barrier effect, High through-hole resistance, formation of copper voids during plating, and delamination (delamination) during chemical mechanical planarization (CMP). The barrier layer is deposited in the same processing chamber Previously, it was highly necessary to immediately have a means to complete a field pre-cleaning / surface treatment step. This method at low substrate temperature due to the low-K material (many The low-K material with K 値 less than 2.5 is only stable at a temperature not higher than 200 ° C to 300 ° C), so this method must be effective. Moreover, we still need to do this An integrated site pre-cleaning process does not introduce any extra complexity into the entire process or trade off the production volume of the deposition chamber. In addition, the integrated site cleaning process should be capable of cleaning and processing with a high aspect ratio. Compared to the bottom and sidewalls of through holes and trenches without causing redeposition or major changes in the landform outline. Invention Summary The present invention is related to conductive, semi-conductive and non-conductive thin films __8 ___ — —_ This paper size is in accordance with Chinese National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) -AW —---- Order— Line 丨 · 511135 A7- ------ B7____ V. Description of the invention (l) A clean-up device and technology for cleaning and processing high-aspect-ratio landforms required before deposition. Surface pollutants to be removed beforehand can be Organic materials, actual contamination, oxides Either unnecessary deposition materials, unnecessary growth materials, or other ways of forming on the surface of the substrate. Surface treatment can be in the form of protection (or removable) of weakly bonded surface types and unsatisfactory surface bonding The form of dots, and / or the modification of the adhesion characteristics of the underlying film with respect to the crystal structure, crystallographic orientation, structure, or bottom film relative to the upper film to be deposited. In particular, the present invention uses a esophagen Or, the most important thing is to eat hydrogen and Veliki or hydrogen ions to clean and treat the bottom of the high-aspect ratio landscape and its walls without the redeposition of pollutants to be removed and negative changes in the contour of the landscape. . This method uses the US application 09 / 812,352 with a filing date of March 19, 2001 in a joint application entitled "For Modulating Ion Inductive Atomic Layer Deposition (MII-ALD)" which is referred to herein as The device described in "MII-ALD Application" became a field-type method without opening the processing chamber door, without substrate transfer under vacuum, and without major changes in hardware. 'The U.S. application is filed at The provisional application if filed on December 6, 2000, and the case number is 60 / 254,280, and the US application here is based on the entire entry. The cleaning surface treatment step is accomplished either by containing a halogen or hydrogen radical alone or by using a low energy ion collision containing halogen or hydrogen and the substrate simultaneously. One-time food-type 5 sees the field, the word system ion induction type. The sub-layer deposition step (or a series of deposition steps) can immediately follow the film containing the desired film (or the modified composition or material that is modified) Lamination) is one of the main elements of suitable precursor materials. —---— 9 ——___ This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page). * ··! Order ----- ------ Line #.! 1 511135 A7 ___ B7_; ___ V. Description of the invention (1) The cleaning / surface treatment step can be performed periodically between different layers that are not the same film, that is, change the composition or The individual layers of the material film are completed to enhance the function of the entire stack. The modulation of the cleaning / surface treatment and the deposition step can be controlled by modulation of at least one of the following parameters; the parameter is: ⑴ the flow rate of the precursor substance, 流量 the flow rate containing halogen or hydrogen radicals, ⑶ the ion flow rate, or It is this ion energy. The cleaning / surface treatment and subsequent deposition steps can be performed at low substrate temperatures (ie, generally less than or equal to 200 ° C) to make it compatible with low-K materials. Brief description of the drawings Figure 1 is a deposition system suitable for one of the modulation ion-sensing atomic layer deposition (MΠ-ALD). FIG. 2A is a typical sequential sequence of a modulation-type ion-sensing atomic layer deposition (Mil-ALD) process. FIG. 2B shows another typical sequence of a modulated sequential ion-inductive atomic layer deposition (Mil-ALD) process. FIG. 2C is a typical non-sequential (continuous) modulation ion-sensing atomic layer deposition (MII-ALD) process sequence. Figure 3A shows one of the high aspect ratio vias including an oxidized copper substrate before one of the pre-cleaning steps. FIG. 3B is a high aspect ratio through-hole, which reveals the redeposited sidewalls sputtered with copper oxide and the stepped corners at the corners of the through-holes. FIG. 3C is a high aspect ratio through-hole, which reveals that the copper oxide of the present invention has been removed but has no side wall redeposition and does not adversely affect the through-thickness. ____ ίο ______ This paper size applies to the Chinese National Standard (CNS) A4 Specifications ㈣ x 297 Public Love 1 (Please read the precautions on the back before filling this page) · 1 ^ 1 1 «ϋ nnn ^ eJI nnnn I nn I nn 1 · ϋ nn-511135 A7 _ B7_ V. Description of the invention (( ^) Ladder at the corner of the hole. Figure 4A is a schematic diagram of the present invention, which illustrates a wafer processing system including an integrated on-site cleaning and sink chamber. Figure 4B is a schematic diagram of the conventional technology, which illustrates A wafer processing system including separate cleaning and sedimentation chambers. Symbol description 100 First precursor substance 130 Argon 110 Feedback gas 170 Plasma generation chamber 160 Microwave power 172 Plasma 177 Ion 130 Feedback gas 176 Hydrogen radical 184 Extraction 150 Impedance matching device 170 Plasma source chamber 180 Deposition chamber 171 Dispensing shower head 175 Orifice 181 Substrate 182 Substrate supporting table 202,214 Second precursor substance 11 This paper size applies to Chinese national standards (CN S) A4 size (210 X 297 mm) (Please read the notes on the back before filling this page)

511135 A7 B7 五、發明說明) 234 離子 244 基底偏壓 315 刻面 270,272,274 離子流量 300 氧化銅 305 底層 315 角落 400 第一整合式淸潔/沈積室 410 第二整合式淸潔/沈積室 475 淸潔室 450 屏障 455 種子層 較佳實施例之詳細說明 圖1係解說·一適合用於現場式預淸潔/表面處理之裝置 ,該處理之後係接著Mil ALD之沈積。該Mil ALD製程 及裝置之敘述係被描述在該Mil ALD應用中且爲了簡潔起 見在此將不再詳細地被敘述。雖然該Mil ALD製程能夠在 本質上爲依序的或連續的,但此兩者製程係牽涉到經歷至 離子曝光之一第一及第二先驅物質之反應以使得該離子能 輸送需要的活化能,該活化能係需要用來經由串級的碰撞 而沈積至該接近之表面原子及所吸附反應物。. 就如前面所討論,一已沈積薄膜之品質係大大地受到 在沈積之前該基底表面的淸潔度影響。因此,在實務上’ --- -J2---- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐〉 {請先閱讀背面之注意事項再填寫本頁}511135 A7 B7 V. Description of the invention) 234 ions 244 substrate bias 315 facets 270,272,274 ion flow 300 copper oxide 305 bottom layer 315 corner 400 first integrated cleaning / deposition chamber 410 second integrated cleaning / deposition chamber 475 cleaning Detailed description of the preferred embodiment of the seed layer of the chamber 450 barrier 455 FIG. 1 illustrates an apparatus suitable for on-site precleaning / surface treatment, which is followed by deposition of Mil ALD. The description of the Mil ALD process and device is described in the Mil ALD application and will not be described in detail here for the sake of brevity. Although the Mil ALD process can be sequential or continuous in nature, the two processes involve the reaction of one of the first and second precursors that undergo ion exposure to enable the ion to transport the required activation energy The activation energy needs to be used to deposit to the close surface atoms and adsorbed reactants through cascade collisions. As previously discussed, the quality of a deposited film is greatly affected by the cleanliness of the substrate surface before deposition. Therefore, in practice, '--- -J2 ---- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) {Please read the precautions on the back before filling this page}

511135 A7 ______B7 _____ 五、發明說明(p) 該Mil ALD製程必須在其之前進行一表面淸潔步驟,且最 好是現場式的(即不用將基底自一機台輸送至另一機台) 。該Mil ALD製程及與其相結合之裝置在缺乏一第一先驅 物質之條件下,爲一有效的現場式淸潔製程且在下文中予 以描述。然後再接著一沈積,該沈積係引入該第一先驅物 質。 該整合式現場淸潔/表面處理步驟係如下所述來完成 。在缺乏一第一先驅物質1〇〇之條件下訴諸於Mil ALD法 則氬130(A〇及一適當包含鹵素回饋氣體110(即,Cl2,F2 ,NF3,等),或是最好爲氫回饋氣體110係被引入至該電 漿產生室 170 內。射頻(Radio Frequemcy,RF),(即, 400ΚΗζ,2ΜΗζ,13·56ΜΗζ,20MHz,等)或是最好爲微波 功率160(即,2.45GHz或是更高頻率)係被施加以產生一電 漿172並經由該回饋氣體130,110之分解而形成離子177 及包含鹵素或是氫游離基176(即,第二先驅物質或是反應 物)。包含原子的氫氣或鹵素游離基176將與表面污染物比 如氧化物起反應以形成含有氧氣的氣體副產物,其然後能 夠容易地抽氣184排除。由於原子的氫氣176亦能作用爲 如在進行經由Mil ALD形成含金屬薄膜之後沈積時所需之 還原劑,故吾人最佳係使用氫氣(H2)爲游離基回饋氣體110 以形成原子的氫游離基176。而且,原子的氫176能被用 來經由氣體CHx種類的形成而除去含碳的雜質,且該CHx 種類然後可容易地被抽氣184排除。 最好地該微波功率160能經由一波導,同軸電纜,或 ____13 ——__ 本纸張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁)511135 A7 ______B7 _____ 5. Description of the Invention (p) The Mil ALD process must be preceded by a surface cleaning step, and preferably on-site (that is, it is not necessary to transport the substrate from one machine to another). The Mil ALD process and its combined devices are an effective on-site cleaning process in the absence of a first precursor substance and are described below. This is followed by a deposition which introduces the first precursor substance. This integrated field cleaning / surface treatment step is performed as described below. Recourse to Mil ALD's argon 130 (A0 and a halogen-containing feedback gas 110 (ie, Cl2, F2, NF3, etc.), or preferably hydrogen in the absence of a first precursor substance 100 The feedback gas 110 is introduced into the plasma generating chamber 170. Radio frequency (RF) (ie, 400KΗζ, 2MΗζ, 13.56MΗζ, 20MHz, etc.) or preferably a microwave power of 160 (ie, 2.45 GHz or higher) is applied to generate a plasma 172 and through decomposition of the feedback gas 130, 110 to form ions 177 and contain halogen or hydrogen radical 176 (ie, the second precursor substance or reactant ). Atom-containing hydrogen or halogen free radicals 176 will react with surface contaminants such as oxides to form gaseous by-products containing oxygen, which can then be easily pumped out 184 to remove them. Since atomic hydrogen 176 can also act as The reducing agent required for the deposition after forming a metal-containing thin film via Mil ALD, so we best use hydrogen (H2) as the radical feedback gas 110 to form atomic hydrogen radicals 176. Moreover, the atomic hydrogen 176 energy being used Carbonaceous impurities are removed by the formation of gaseous CHx species, and the CHx species can then be easily removed by pumping 184. Preferably the microwave power 160 can be passed through a waveguide, coaxial cable, or ____13 __ paper Zhang scale is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) (Please read the precautions on the back before filling this page)

511135 A7 _ —一__B7__ 五、發明說明(l h 是其他設有一適當阻抗匹配裝置150之適當裝置而被親合 至該電漿源室Π0。微波能量能被更有效率地輸送至離子 化電子,並得到已改善離子177及游離子基176密度的結 果。對於原子氫,.176之生成而言,此尤其是正確的。該蠢 離子177與該氫原子176兩者係被輸送至該沈積室ι8〇。 且此兩者亦經由被定義在該如圖1中所示之分配蓮篷171 上之一系列孔口 175而被導向在該基底181之表面處。該 沈積室180之處理壓力能被維持在1〇2至1(Τ7托耳的範圍 中,最佳地在loi-icr4托耳範圍中。該分配蓮蓬頭171係 包括一系列或陣列的孔口 175,且離子177及游離基176 係通穿該孔口而被輸送至該基底181且就如在該Mil AU) 應用中的解釋地將該主要處理腔180自該電漿源室no來 隔離。 該氬離子177將有助益於氧化物,含碳離質,及其他 污染的除去。低能量離子177撞擊可促進介於該原子氫與 氧化物(及其他污染物)之表面反應以形成氣體的副產物, 其能然後容易地再被抽氣184排除。該基底181係被偏壓 以定義出該撞擊離子Π7之能量。直流量(DC)或是射頻(即 ,400KHz,2MHz,13·56ΜΗζ,等)功率係被用來將該基底 支撐臺182偏壓。最佳地,該基底支擦臺182係一靜電夾 盤(ESC)以提供有效地偏壓電壓耦合至該基底181。典型的 基底181偏壓電壓(在圖2A及2C中之V;l,242,282)能自 -10V至-250V的範圍,但是較佳地係自-10V至-100V的範 圍,且更較佳地係自-10V至-50V。而且,任何偏壓電壓之 ____14 ---- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) • —------訂---------線丨· 511135 A7 _ B7_______ 五、發明說明&lt;1) 大小及運作週期可以被調制。該氬130與室110回饋氣體 之比値基本上係被選擇爲小於或是等於1 ’最佳地小於或 是等於0.5。該較低氬離子177流量及較低氬離子177能量 兩者能因濺鍍(請看圖3B)之故而減少地貌角落之不必要的 刻面515,該基底181較佳地係被維持在小於或是等於350 °C,但是該基底更較佳地係被維持在小於或是等於2〇〇°C ,而使得該基底可相容於非常低K的材質。低能量離子 177撞擊係使基底能在低基底181溫度下進行有效的淸潔/ 表面處理。 該淸潔/表面處理亦能夠藉由不讓該氬回饋氣體130流 動而在缺乏氬離子177條件下來完成。但是,此可能造成 一較低的分解比率及因而減少原子的氫176之產生效率。 而且,該動力及因而氧化物及其他汚染物之移除效率可以 因缺乏該低能量離子177撞擊之故而被減少。 一旦該氧化物,含碳雜質,或是其他表面污染物已被 除去,該第一先驅物質100被引入且後續的薄膜沈積係使 用,例如,該MII-ALD應用所揭示的技術來加以完成。 圖2A揭露一典型的依序地調制之離子感應式原子層 沈積(MII-ALD)的製程順序,其包括一被完成在缺乏—第 一先驅物質100條件下之整合式現場淸潔步驟。該淸潔步 驟係終止在T〇206,之後該沈積就開始。該虛線243,245 係指示出該偏壓電壓並不需要一定與該第二先驅物質曝光 212,214同步,而是該偏壓電壓能夠維持在—常數値242 一直到當它需要被改變爲一不同値,V2 244時。該現場預 _-— -_ 15 __ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公爱) (請先閱讀背面之注意事項再填寫本頁) · 訂---------線—· 511135 A7 -------B7 ____ 五、發明說明([^ ) 淸潔係緊接著依序地MII-ALD製程。該第一及第二先驅物 質202 ’ 214在每一沈積週期之時係依序地被引入。該第二 先驅物質214(即,氫原子176)曝光係與離子曝光234(即, Ar+177)—致及和一基底偏壓V2 244的應用係一致。在淸 潔進行中該基底偏壓|Π|242之大小係典型地被選爲較低於 在沈積進行中之該基底偏壓|叫244的大小達到防止因氬離 子177濺鍍之故而造成地貌之刻面315的目的,且該濺鎪 係在如在圖3B中所揭示之淸潔週期所進行。該氬離子177 的能量係由該施加基底181偏壓來決定。在沈積進行中之 典型基底偏壓V2 244能從-20V至-1000V的範圍但是較佳 地係自-25V至-500V的範圍。且更較佳爲在進行沈積中之 自一 50V到一 350V的範圍中。一被調制DC或是RF偏壓 185(即,400KHz,2MHz,13·56ΜΗζ,等)可以被使用到。 該淸潔脈衝ΊΠ 212之持續時間係基本上小於或是等於180 秒’較佳地係自_5秒小於或是等於ΤΘ12小於或是等於60 秒。所需要之薄膜厚度係藉由以所需的次數來重覆該沈積 週期而獲得的。該第二先驅物質曝光持續時間,T2 214, 可以或不可以爲等於乃212的値。 所揭示在圖2Α中之方法的變化係被解說在圖2Β中且 其中該離子曝光係在該第二先驅物質曝光之後被啓動。圖 2Β描繪出一用於一倂合該基底181至該離子177之週期曝 光改良式ALD方法之順序。 圖2C係解說本發明之一較佳實施例,因此被完在缺 乏一第一先驅動物質100之條件下的一整合式現場淸潔或 -—-______ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) &lt;請先閱讀背面之注意事項再填寫本頁)511135 A7 _ — a __B7__ 5. Description of the invention (lh is other suitable device equipped with a suitable impedance matching device 150 and is attached to the plasma source chamber Π0. Microwave energy can be more efficiently delivered to ionized electrons And obtained the results that have improved the density of the ion 177 and free ion group 176. This is especially true for the generation of atomic hydrogen, .176. Both the stupid ion 177 and the hydrogen atom 176 are transported to the deposition The chamber ι80. The two are also guided at the surface of the substrate 181 through a series of orifices 175 defined on the distribution lotus canopy 171 as shown in FIG. 1. The processing pressure of the deposition chamber 180 Can be maintained in the range of 102 to 1 (T7 Torr, optimally in the range of Loi-icr4 Torr. The showerhead 171 series includes a series or array of orifices 175, and ions 177 and free radicals 176 is transported through the orifice to the substrate 181 and the main processing chamber 180 is isolated from the plasma source chamber as explained in the Mil AU) application. The argon ion 177 will help Good for removal of oxides, carbonaceous matter, and other contamination. Low The impact of the amount of ions 177 promotes the surface reaction between the atomic hydrogen and the oxides (and other pollutants) to form a gas by-product, which can then be easily removed by the pumping 184. The substrate 181 is biased to The energy of the impact ion Π7 is defined. A direct current (DC) or radio frequency (ie, 400KHz, 2MHz, 13.56MHz, etc.) power system is used to bias the substrate support 182. Optimally, the substrate The wiper table 182 is an electrostatic chuck (ESC) to provide effective bias voltage coupling to the substrate 181. A typical substrate 181 bias voltage (V in Figures 2A and 2C; 1,242,282) can The range is -10V to -250V, but is preferably in the range of -10V to -100V, and more preferably in the range of -10V to -50V. Moreover, any of the bias voltage ____14 ---- this paper Standards are applicable to China National Standard (CNS) A4 specifications (210 X 297 mm) (Please read the precautions on the back before filling this page) • ------- Order --------- Line 丨· 511135 A7 _ B7_______ V. Description of the invention &lt; 1) The size and operating cycle can be modulated. The ratio 値 of the argon 130 to the feedback gas of the chamber 110 is basically selected to be less than or equal to 1 'and optimally less than or equal to 0.5. Both the lower argon ion 177 flow rate and the lower argon ion 177 energy can reduce unnecessary facets 515 in the geomorphic corners due to sputtering (see FIG. 3B). The substrate 181 is preferably maintained at less than It is equal to 350 ° C, but the substrate is more preferably maintained at or below 200 ° C, so that the substrate is compatible with very low-K materials. The low energy ion 177 impact system enables the substrate to perform effective cleaning / surface treatment at low substrate 181 temperatures. The cleaning / surface treatment can also be performed in the absence of argon 177 by not allowing the argon feedback gas 130 to flow. However, this may result in a lower decomposition ratio and thus reduce the production efficiency of atomic hydrogen 176. Moreover, the power and thus the removal efficiency of oxides and other contaminants can be reduced due to the lack of the low energy ion 177 impact. Once the oxide, carbon-containing impurities, or other surface contaminants have been removed, the first precursor material 100 is introduced and subsequent thin film deposition is performed using, for example, the MII-ALD application using the disclosed techniques to accomplish this. FIG. 2A discloses a typical sequential modulation of the ion-inductive atomic layer deposition (MII-ALD) process sequence, which includes an integrated field cleaning step completed in the absence of the first precursor material 100. The cleaning step ends at T206, after which the deposition begins. The dashed lines 243, 245 indicate that the bias voltage does not necessarily need to be synchronized with the exposure of the second precursor material 212, 214, but that the bias voltage can be maintained at a constant 値 242 until when it needs to be changed to a Different, V2 244 hours. This site preview _-— -_ 15 __ This paper size is applicable to China National Standard (CNS) A4 (210 X 297 public love) (Please read the precautions on the back before filling this page) · Order ------ --- Line-- · 511135 A7 ------- B7 ____ V. Description of the invention ([^) 淸 Jie Department followed the sequential MII-ALD process. The first and second precursors 202 '214 are sequentially introduced at each deposition cycle. The second precursor material 214 (i.e., hydrogen atom 176) exposure system is consistent with the ion exposure 234 (i.e., Ar + 177) application system and a substrate bias V2 244 application system. The size of the substrate bias | Π | 242 during the cleaning process is typically selected to be lower than the substrate bias | during the deposition process. The size of 244 is to prevent the formation of landforms due to 177 argon ion sputtering. The purpose of the facet 315, and the splashing is performed during the cleaning cycle as disclosed in FIG. 3B. The energy of the argon ion 177 is determined by the bias voltage applied to the substrate 181. A typical substrate bias voltage V2 244 during deposition is in the range of -20V to -1000V but is preferably in the range of -25V to -500V. And more preferably in a range from -50V to -350V in performing the deposition. A modulated DC or RF bias voltage of 185 (ie, 400 KHz, 2 MHz, 13.56 MHz, etc.) can be used. The duration of the cleaning pulse ΊΠ 212 is substantially less than or equal to 180 seconds', preferably from _5 seconds to less than or equal to TΘ12 and less than or equal to 60 seconds. The required film thickness is obtained by repeating the deposition cycle a desired number of times. This second precursor substance exposure duration, T2 214, may or may not be equal to or equal to 212. The variation of the method disclosed in FIG. 2A is illustrated in FIG. 2B and wherein the ion exposure is initiated after the exposure of the second precursor substance. FIG. 2B depicts a sequence of a modified ALD method for periodic exposure combining the substrate 181 to the ion 177. FIG. 2C illustrates a preferred embodiment of the present invention, so it is an integrated on-site cleaning or -------______ which is completed in the absence of a first-driven substance 100. This paper size is applicable to Chinese National Standards (CNS) A4 size (210 X 297 mm) &lt; Please read the notes on the back before filling this page)

511135 A7 ___B7 _ 五、發明說明((ff)511135 A7 ___B7 _ 5. Description of the invention ((ff)

V 是現場處理步驟之後係緊接著後續的非依序地或連續地 MII-ALD。該淸潔步驟終上在To 254且之後沈積就開始。 在進行該沈積週期中,並未依序地引入先驅動物質100、 110,而取代之爲該基底181係同時地被曝光至一第一 252 及第二262反應物(即,光驅物質)及經歷被調制離子177 曝光。在圖2C中,該沈積係經由撞擊離子177能量(最佳 地經由該施加基底181偏壓之控制)之調制在一固定的電漿 源160功率而被觸發啓動“開”及“關”。該所需之薄膜 厚度係經由該基底181的曝光至被調制離子能量脈衝週期 的適當數目而藉此獲得。就如前面所述的在淸潔進行中之 該基底偏壓|Π|282的大小係典型地被選爲低於進行沈積時 之基底偏壓Ν284的大小。在淸潔進行中之離子流量27〇 ,即Fi 272,係典型地被選爲低於在進行沈積時之該離子 流量,即F2 274,以達到防止在該淸潔週期時之因爲濺鍍( 即,氬離子177)緣故所造成的地貌之刻面315的目的。離 子流量或是能量調制係一般地自HHz改變至20MHz。而 且,一機械蓋子可以被用來週期性地關閉該離子源,以提 供尙有另一方式去改變至該基底之該離子流量。該離子流 量270能夠藉由增加或減少使用於離子177生成之該回饋 氣體130(即,氬)的流速而被調整。舉例而言,一流至該電 漿源室Π0內之較低回饋氣體130的流速將會導致在一給 定電漿源160功率亦能夠被增加或是被減少來改變該離子 流量270,且源功率愈高則造成愈大的離子流量270。該電 漿源160功率可以更進而被改變在其頻率,大小,運作周 __π._____ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閲讀背面之注意事項再填寫本頁)V is a non-sequential or continuous MII-ALD followed by a field processing step. The cleaning step ends at To 254 and thereafter the deposition begins. During the deposition cycle, the first driving substance 100, 110 was not introduced in sequence, but instead the substrate 181 was simultaneously exposed to a first 252 and a second 262 reactant (ie, the optical drive substance) and Undergo exposure to modulated ion 177. In Fig. 2C, the deposition is triggered by turning on and off by modulation of the energy of the impinging ion 177 (optimally controlled by the bias applied by the substrate 181) at a fixed plasma source 160 power. The required film thickness is obtained by exposing the substrate 181 to an appropriate number of pulse periods of the modulated ion energy. As described earlier, the magnitude of the substrate bias | Π | 282 during the cleaning process is typically selected to be lower than the magnitude of the substrate bias N284 during deposition. The ion flux during the cleaning process is 27, i.e., Fi 272, which is typically selected to be lower than the ion flux during the deposition process, i.e., F2 274, in order to prevent spattering during the cleaning process ( That is, the purpose of the landform facet 315 caused by argon ion 177). The ion flux or energy modulation is generally changed from HHz to 20MHz. Moreover, a mechanical lid can be used to periodically shut off the ion source to provide another way to change the ion flux to the substrate. The ion flow rate 270 can be adjusted by increasing or decreasing the flow rate of the feedback gas 130 (i.e., argon) used for the generation of ions 177. For example, the lower flow rate of the feedback gas 130 to the plasma source chamber Π0 will cause the power of a given plasma source 160 to be increased or decreased to change the ion flux 270, and the source Higher power results in greater ion flux 270. The power of the plasma source 160 can be further changed in its frequency, size, and operating cycle __π ._____ This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back first (Fill in this page again)

511135 A7 ____B7 __ 五、發明說明(if) 期,或是上述之任何組合。 該後續沈積之其他變化例及實施例係被敘述在該共同 申請中之MII-ALD應用中且爲了簡潔起見在此時將不再詳 細地重複之。 基本上,在進行該第一沈積週期之前,該現場或淸潔 係被完成一次。但是,多重淸潔週期亦能夠被使用在進行 每一前面一或多個沈積週期之前。而一個例子是在進行多 重層(即,TaNx/Ta,或是Ti/TiN等)或是多重薄膜疊層(即 ,TaNx/Ta/Cu或是Ti/TiN/W,等)之沈積中進行該淸潔步 驟。同樣地,一沈積順序能夠包含任何被配置各處之淸潔 步驟之數目,就算是對於一單一薄膜材質之沈積亦是如此 〇 在本發明之一實施例中,該現場式預淸潔製程能夠被 用來除去使用在銅導電化中之單一或是一雙重鑲嵌式結構( 即,槽溝,通孔·,或是在通孔上之重疊槽溝,等)的高縱橫 比之底部上銅氧化物。該基底同時曝光至原子氫氣176及 低能量氬離子177將會導致經由0H副產物的形成而速度 受限之銅氧化物的去除。且該副產物然後能夠容易地被抽 氣184排除掉。 圖3A解說了在預淸潔之含有一被氧化300銅底層305 的一尚縱橫比通孔。圖3B揭露一高縱橫比通孔其揭示該 被濺鍍銅氧化物300之側壁面沈積320且係在該通孔的底 部及該通孔角落315的梯狀處被除去,而該再沈積乃係因 過量的氬離子Π7濺鍍(其解說與在習知技術中的問題相關 _18___ __ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公¥〉 ^ ~' (請先閱讀背面之注意事項再填寫本頁)511135 A7 ____B7 __ V. The period of invention description (if), or any combination of the above. Other variations and examples of this subsequent deposition are described in the MII-ALD application in this common application and will not be repeated in detail at this time for the sake of brevity. Basically, the field or cleaning system is completed once before the first deposition cycle is performed. However, multiple cleaning cycles can also be used before each preceding one or more deposition cycles are performed. One example is in the deposition of multiple layers (ie, TaNx / Ta, or Ti / TiN, etc.) or multiple thin film stacks (ie, TaNx / Ta / Cu or Ti / TiN / W, etc.) The cleaning step. Similarly, a deposition sequence can include any number of cleaning steps configured everywhere, even for deposition of a single thin film material. In one embodiment of the present invention, the on-site pre-cleaning process can Used to remove copper on the bottom of high aspect ratios of single or dual damascene structures used in copper conduction (ie, trenches, vias, or overlapping trenches in vias, etc.) Oxide. Simultaneous exposure of the substrate to atomic hydrogen 176 and low-energy argon 177 will result in the removal of copper oxides whose speed is limited by the formation of 0H by-products. And this by-product can then be easily removed by suction 184. FIG. 3A illustrates a still aspect ratio via that contains an oxidized 300 copper bottom layer 305 in a pre-cleaned state. FIG. 3B exposes a high aspect ratio via, which reveals that the side wall surface of the sputtered copper oxide 300 is deposited 320 and is removed at the bottom of the via and the stepped corner of the via corner 315, and the redeposition is Due to excessive argon ion π7 sputtering (the explanation is related to the problems in the conventional technology _18___ __ This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 public ¥> ^ ~ '(Please read first (Notes on the back then fill out this page)

511135 A7 ___ Β7 __ 五、發明說明il) 之課題),圖3C已揭露一高縱橫化通孔其揭示本發明且因 而該銅氧化物300已被去除而沒有側壁再沈積320及沒有 負面地在該通孔角落處315之斜削。此一相同的製程亦能 夠除去在進行通孔之蝕刻中(不論是沿著該通孔側邊或是其 底部)而所遺留下的含碳之雜質。經由一適當的含有先驅的 質(即,TaCU ’ TaBr5 ’等)钽之引入而形成—屏障層(即, Ta,TaNx,等)之後續沈積能夠經由MII-ALD方法來完成 。該相同的原子氫氣176現在係被用來做爲還原劑以形成 金屬的鉅及副產物(即,氯化氫或是溴化氫),該副產物然 後可以很快地被抽氣184排除。 以現場式預淸潔步驟在進行一屏障疊層(即,TaNx/Ta) 中係被重複且係使用下列的順序: (1) 反應性預淸潔;緊接著 (2) TaNx沈積;緊接著 (3) 反應性預猜潔;緊接著 (4) 鉅沈積; 或是在一後續材質比如該銅種子層之沈積前係使用下 列之順序: (1) 反應性預淸潔;緊接著 (2) 屏障層沈積;緊接著 (3) 反應性預淸潔;緊接著 (4) 銅種子層沈積。 在上述之二個範例中,該淸潔及沈積的順序能夠被完 成在同一製程室180內。然而,在該第二個範例中,在該 ____19 ___ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) n He n n n m n 一: e n n n n -ϋ n in I 一 511135 A7 _B7___ _ 五、發明說明(【1) 銅種子層沈積之前的該反應性預淸潔步驟以及該銅種子層 沈積能夠被完成在一單獨MII-ALD室中且該MII-ALD室 係被整合在一可真空輸送該基底之裝置中而使得步驟1及 2能夠完成在該第一整合式的淸潔/沈積400內而步驟3及 4能夠使用如在圖4A中所示的整合性裝置之第二整合式淸 潔/沈積室410內。由於該沈積步驟係立即地接著該現場式 反應性預淸潔步驟,沒有氧化物或是其他雜質能夠形成在 該已完成淸潔之基底界面上。此一便可得到已改善之電氣 特性,可靠度,附著力,表面形貌,晶體結構,及該沈積 薄膜之結晶的方向。這些優點在使用如在圖4B中所揭示 之習知技術的整合性裝置係無法得到的,其中在圖4B中 該淸潔室475係與該屏障450及該種子層455室二者相分 隔的。每一基底的輸送可得到將該基底曝光至背景環境氣 體(甚而在減少大氣壓力下)之結果,又該氣體將負面地影 響到後續薄膜的沈櫝且因而負面地影響最終的元件功能。 而且,該整個系統的生產量係被所需要的基底輸送而減少 。此外,系統複雜度係因爲需要一單獨的預淸潔室而被大 量地增加。 雖然上面所給的範例係關於銅導電化,但是一類似的 整合性現場淸潔步驟能夠被用來除去在高縱橫比地貌之底 部處任何污染物,比如鋁及氧化物,接著爲線性材質比如 鈦,氮化鈦,等之現場沈積其係使用經由MII-ALD(請看圖 1)之一適當含有先驅物質(即,四氯化鈦等)的鈦,原子氫 176,及被調制離子177曝光。 ______20___ 本紙張尺度適用中國國家標準(CNS)A4規格(210_&gt;&lt; 297公釐) -- (請先閱讀背面之注意事項再填寫本頁)511135 A7 ___ B7 __ V. The subject of the description of the invention il)), FIG. 3C has revealed a high vertical and horizontal through hole which reveals the present invention and thus the copper oxide 300 has been removed without side wall redeposition 320 and has not The corner of the through hole is 315 beveled. This same process can also remove carbon-containing impurities left in the etching of a via (either along the side of the via or the bottom of the via). The subsequent deposition of a barrier layer (ie, Ta, TaNx, etc.) formed by the introduction of a suitable precursor-containing material (ie, TaCU 'TaBr5', etc.) tantalum can be accomplished by the MII-ALD method. This same atomic hydrogen 176 is now used as a reducing agent to form macro and by-products of the metal (i.e., hydrogen chloride or hydrogen bromide), which can then be quickly removed by pumping 184. The on-site pre-cleaning step was repeated in performing a barrier stack (ie, TaNx / Ta) and the following sequence was used: (1) reactive pre-cleaning; then (2) TaNx deposition; then (3) Responsive pre-cleaning; Immediately after (4) Giant deposition; Or use the following sequence before the deposition of a subsequent material such as the copper seed layer: (1) Reactive pre-cleaning; Immediately (2 ) Barrier layer deposition; followed by (3) reactive precleaning; followed by (4) copper seed layer deposition. In the above two examples, the sequence of the cleaning and sinking can be completed in the same process chamber 180. However, in this second example, in this ____19 ___ this paper size applies the Chinese National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) n He nnnmn A: ennnn -ϋ n in I A 511135 A7 _B7___ _ 5. Description of the invention ([1) The reactive pre-cleaning step before the copper seed layer deposition and the copper seed layer deposition can be completed in a separate MII-ALD chamber In addition, the MII-ALD chamber is integrated into a device capable of vacuum conveying the substrate, so that steps 1 and 2 can be completed in the first integrated cleaning / deposition 400 and steps 3 and 4 can be used as in Inside the second integrated cleaning / deposition chamber 410 of the integrated device shown in FIG. 4A. Since the deposition step is immediately followed by the in-situ reactive pre-cleaning step, no oxide or other impurities can be formed on the cleaned substrate interface. This can result in improved electrical characteristics, reliability, adhesion, surface morphology, crystal structure, and crystal orientation of the deposited film. These advantages are not available in an integrated device using a conventional technology as disclosed in FIG. 4B, where the clean room 475 is separated from the barrier 450 and the seed layer 455 room in FIG. 4B. . The transport of each substrate can have the result that the substrate is exposed to the background ambient gas (even under reduced atmospheric pressure), which in turn will negatively affect the sinking of subsequent films and thus negatively affect the final component function. Moreover, the throughput of the entire system is reduced by the required substrate transport. In addition, system complexity is greatly increased because of the need for a separate pre-cleaning room. Although the example given above is about copper conductivity, a similar integrated field cleaning step can be used to remove any contaminants such as aluminum and oxides at the bottom of high aspect ratio landforms, followed by linear materials such as In-situ deposition of titanium, titanium nitride, etc. is performed using one of MII-ALD (see FIG. 1) titanium, which contains a precursor substance (ie, titanium tetrachloride, etc.), atomic hydrogen 176, and modulated ion 177. exposure. ______20___ This paper size applies Chinese National Standard (CNS) A4 specification (210_ &gt; &lt; 297mm)-(Please read the precautions on the back before filling this page)

511135 A7 五、發明說明(f) 本發明之第一實施例係有關於在進行該後續的上方薄 膜(即,一屏障層)之沈積前該已圖案化低K地貌(即,高縱 橫比通孔及槽溝之現場式表面處理。原子氫氣176在除去 物結合鍵物質及披覆末塡滿表面結合處方面係有效的。在 此一例中鹵素並未被使用到。如作爲一範例,原子氫氣 176將會吸收鬆散介面的氟以形成氟化氫,其然後可容易 地被抽氣184排除。氟能夠破壞大部份的金屬,尤其是含 有金屬或是金屬化物之鉅,在被氟化材質比如FSG的情況 下,此將是特別有用的。如另一範例,有機矽化物(含碳摻 雜之二氧化矽)之低K材質係使用甲基(即,CH3)群以減少 標準二氧化矽之介電常數。然而,表面CHx群可能是弱性 結合鍵及/或佔有未塡滿結合鍵。原子氫氣176能夠經由氫 結合鍵的形式而塡滿這些結合鍵處,或是藉由形成CHx而 除去弱結合鍵物質,且該CHx能接著再容易地被抽氣184 排除。弱性結合鍵介面的物質將該即將沈積的上方膜(即, 一屏障層)附著至該介電質的附著力予以惡化;且該附著力 惡化將導致屏障層裂開,在電鍍進行中之銅空洞,及在進 行CMP之脫層化。原子氫氣176能夠除去弱性結合鍵表面 物質/或含有碳,氟,及氫(g卩,被氫化的碳,被氟化的碳 ’ PTFE,或鐵氟龍)之其他型式低κ膜的保護未塡滿表面 結合鍵點。 此外’低K材質容易地將吸收水氣(即,〇H物質), 該水氣會有害地增加材質的有效介電常數,及因此介於該 介電材質的圍繞之導電地貌間的電容亦會增加。甚且,表 -----2J______ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) 訂· 線丨-- 511135 A7 五、發明說明( 面OH群會導致不良的介面附著力。原子氫氣176能藉由 其與OH介面物質反應以形成水(H20)而改善附著力,該水 蒸氣接著能被抽氣184排出。一旦該低κ膜已經被處理, 則經由MII-ALD及一適當光驅物質(即,五氯化鉅其爲一 有屏障材質之钽)之現場式沈積步驟立即接著進行,該沈積 係在同一處理室180,400內中完成。由於被圖案化低κ 介電材質地貌之表面處理係爲現場式地完成,故後續的沈 積屏障材質比起習知技術而言則將具有較優良的介面特性( 即,附著力,導電率,可靠度等)。 此一敘述作做爲解說用但並未受限於此;更進一步的 修正對於本行業者而言,經看過此一揭露及所附的申請專 利範菌後變得顯而易知。 (請先閱讀背面之注意事項再填寫本頁)511135 A7 V. Description of the invention (f) The first embodiment of the present invention relates to the patterned low-K topography (i.e., high aspect ratio pass) before the subsequent deposition of the upper film (i.e., a barrier layer) is performed. On-site surface treatment of holes and grooves. Atomic hydrogen 176 is effective in removing bonded material and covering the surface of the surface. In this example, halogen is not used. As an example, the atom Hydrogen 176 will absorb loose interface fluorine to form hydrogen fluoride, which can then be easily removed by pumping 184. Fluorine can destroy most metals, especially giants containing metal or metal compounds. In fluorinated materials such as This is particularly useful in the case of FSG. As another example, the low-K material of organic silicides (carbon-doped silicon dioxide) uses methyl (ie, CH3) groups to reduce standard silicon dioxide The dielectric constant of the surface. However, the surface CHx group may be a weak bond and / or occupy an unfilled bond. The atomic hydrogen 176 can fill these bonds through the form of hydrogen bonds, or by forming CHx While removing weak knots Bonding substance, and the CHx can then be easily removed by pumping 184. Substances that bind weakly to the bonding interface deteriorate the adhesion of the upper film (ie, a barrier layer) to be deposited to the dielectric; And the deterioration of the adhesion will lead to the cracking of the barrier layer, copper voids during electroplating, and delamination during CMP. Atomic hydrogen 176 can remove weak bonding surface materials and / or contain carbon, fluorine, and hydrogen ( g 卩, hydrogenated carbon, fluorinated carbon 'PTFE, or Teflon) other types of low kappa membrane protection do not fill the surface bonding points. In addition, the low-K material will easily absorb moisture (ie 〇H substance), the water and gas will harmfully increase the effective dielectric constant of the material, and therefore the capacitance between the conductive material surrounding the dielectric material will also increase the capacitance. Moreover, Table ----- 2J______ This paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the precautions on the back before filling this page) Order · Line 丨-511135 A7 V. Description of the invention Poor interface adhesion. Atomic hydrogen 176 can It reacts with the OH interface substance to form water (H20) to improve adhesion, and the water vapor can then be exhausted by air extraction 184. Once the low kappa membrane has been processed, it is passed through MII-ALD and an appropriate optical drive substance (i.e., Giant pentachloride is a barrier material of tantalum). The on-site deposition step is immediately performed. The deposition is completed in the same processing chamber 180, 400. Because of the surface treatment system of the patterned low-k dielectric material landform In order to complete it on-site, subsequent deposition barrier materials will have better interface characteristics (ie, adhesion, conductivity, reliability, etc.) than conventional techniques. This description is used as an illustration but It is not limited to this; further amendments will become apparent to those skilled in the industry after seeing this disclosure and the attached patent application. (Please read the notes on the back before filling this page)

---- 訂----I -線丨- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)---- Order ---- I -line 丨-This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

511135 A8B8C8D8 六、申請專利範圍 1.一種順序方法,其乃爲在一抽真空室中之一基底及 沈積至該基底的一後續原子層薄膜之整合式及現場式修正 且該沈積係開始有初始的修正步驟,該方法係包括: 引入至少一第一離子室生回饋氣體至該室內; 自該離子產生回饋氣體產一電漿以形成離子; 將該基底曝光至該離子; 調制該離子; 將該基底與該調制離子起反應以自該基底除去任何污 染物以及產生一已修正基底;以及 接著該初始修正步驟,以在該室中完成一薄膜之原子 層沈積至該已修正基底上且該修正步驟係包括: 引入一第一反應氣體進入該室內; 吸附至少該第一反應氣體之一單層至該已修正基底上 自該室內抽出任何過量之第一反應氣體; 引入至少一額外的離子產生回饋氣體進入該室內,且 該額外離子產生回饋氣體可以係和該第一離子產生回饋氣 體相同; 自該額外離子產生回饋氣體產生一第二電漿以形成額 外離子; 將該已修正基底曝光至該額外離子; 調制該額外離子;及 將該第一反應氣體已吸附單層與該調制額外離子起反 應以沈積該薄膜。 1 本紙張尺度適用中國國家標準(CNS)A4规格(21〇 X 297公爱) •I I, ! (請先閲讀背面之注意事項再填寫本頁) 、言 511135 ei D8 六、申請專利範圍 2·如申請專利範圍第1項所述之順序方法,其中該初 始修正步驟爲淸潔步驟。 3·如申請專利範圍第1項所述之順序方法,其中該修 正步驟係表面處理步驟。 4. 如申請專利範圍第1項所述之順序方法,其中該初 始修正步驟額外地包括引入至少一游離基產生回饋氣體進 入該室內及自該游離基產生回饋氣體產生一電漿以形成游 離基。 5. 如申請專利範圍第1項所述之順序方法,其中該原 子層沈積步驟係額外地包括引入至少一游離基產生回饋氣 體.進入該室內及自該游離基產生回饋氣體產生一電漿以形 成游離基。 6. 如申請專利範圍第1項所述之順序方法,其中該污· 染物係包括自然生成氧化物,金屬氧化物,雜粒污染物, 及含碳的雜質。_ 7·如申請專利範圍第1項所述之順序方法,其中該離 子的調制係被調制在一選由調制一離子流及調制一離子能 量所組成之群的方式。 8·如申請專利範圍第1項所述之順序方法,其更進而 包括電性地偏壓該基底至一負電壓。 9·如申請專利範圍第8項所述之順序方法,其中該電 性偏壓係藉由一射頻功率供應器所感應出。 10·如申請專利範圍第8項所述之順序方法,其中在進 行該初始淸潔步驟之該電性偏壓的大小係較低於在進行該 _2____ t紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐〉 &quot; — 〜 &quot;&quot;**&quot;*&quot;&quot;&quot; -------------Ilf — (請先閱讀背面之注意事項再填寫本頁) 、\aj 線屬 511135 A8B8C8D8 六、申請專利範圍 原子層之沈積步驟時的電性偏壓之大小。 (請先閲讀背面之注意事項再塡寫本頁) 11·如申請專利範圍第1項所述之順序方法,其中該方 法係對一薄膜沈積層重複著。 12·如申請專利範圍第1項所述之順序方法,其中緊接 著該初始修正步驟爲一屏障材質薄膜之沈積。 13.如申請專利範圍第1項所述之順序方法,其中緊接 著該初始修正步驟係沈積一銅種子層。 H·—種順序方法,其乃爲在一抽真空室中之一基底及 沈積至該基底的一後續原子層薄膜之整合式及現場式修正 且該沈積係開始有初始的修正步驟,該方法係包括: .引入至少一第一游離基產生回饋氣體至該室內; 自該游離基產生回饋氣體產一電漿以形成游離基; 將該基底曝光至該游離基; 將該基底與該調制游離基起反應以自該基底除去任何 污染物以及產生一已修正基底;以及 接著該初始修正步驟係完成一薄膜之原子層沈積至位 在該室內之該已修正基底上,該沈積係包括: 引入一第一反應物氣體進入該室內; 吸附至少該第一反應物氣體之一單層至該已修正基底 上; 自該室內抽出任何過量之該第一反應物氣體; 引入至少一額外的游離基產生回饋氣體進入該室內, 且該額外游離基產生回饋氣體可以係和該第一游離基產生 回饋氣體相同的; 3 紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) &quot; 511135 A8B8C8D8 六、申請專利範圍 自該額外游離基產生回饋氣體產生一第二電漿以形成 額外游離基; 將該已修正基底曝光至該額外游離基;以及 將該第一反應物氣體之被吸數吸附單層與該額外游離 基起反應以沈積該薄膜。 15. 如申請專利範圍第14項所述之順序方法,其中該 初始修正步驟爲淸潔步驟。 16. 如申請專利範圍第14項所述之順序方法,其中該 修正步驟係表面處理步驟。 17. 如申請專利範圍第14項所述之順序方法,其中該 原子層沈積步驟係額外地包括引入至少一離子產生回饋氣 體進入該室內及自該離子產生回饋氣體產生一電漿以形成 離子。 18. 如申請專利範圍第14項所述之順序方法,其中該 污染物係包括自然生成氧化物,金屬氧化物,雜粒污染物 ,及含碳的雜質。 19. 如申請專利範圍第14項所述之順序方法,其中該 方法係對每一薄膜沈積層重複著。 20. 如申請專利範圍第14項所述之順序方法,其中緊 接著該初始修正步驟爲沈積一屏障材質膜。 21. 如申請專利範圍第14項所述之順序方法,其中緊 接著該初始修正步驟爲沈積一銅種子層。 22. —種將一膜之原子層沈積至一基底上之單一模組系 統,其係包括: 4 ^氏張尺£1£用中國國家標準(CNS)A4規格(210 X 297公箸] &quot; 一 ................#. — (請先閲讀背面之注意事項再填寫本頁) 、l5Jf 線屬 511135 A8 B8 C8 D8 六、申請專利範圍 一主要室,其包含一用於產生一電漿之電漿產生室, 該主要室亦包含一用於淸潔該基底並且沈積該膜至該基底 上之整合淸潔及沈積室; 該電漿產生室係被耦合以容納至少一回饋氣體以形成 該電漿;以及 該整合性淸潔及沈積室係被耦合以容納至少一先驅物 質氣體。 I ! I r !# ! (請先閲讀背面之注意事項再填寫本頁) 5 線痛 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)511135 A8B8C8D8 6. Application scope 1. A sequential method, which is an integrated and in-situ correction of a substrate in a vacuum chamber and a subsequent atomic layer film deposited on the substrate, and the deposition system begins to have an initial The correction step includes: introducing at least one first ion chamber to generate feedback gas into the chamber; generating a plasma from the ion to generate feedback gas to form ions; exposing the substrate to the ions; modulating the ions; The substrate reacts with the modulation ion to remove any contaminants from the substrate and produce a modified substrate; and then the initial modification step to complete the deposition of an atomic layer of a thin film on the modified substrate in the chamber and the modification The steps include: introducing a first reaction gas into the chamber; adsorbing at least a single layer of the first reaction gas onto the modified substrate to extract any excess first reaction gas from the chamber; introducing at least one additional ion to produce The feedback gas enters the chamber, and the additional ion-generating feedback gas can be related to the first ion product. The feedback gas is the same; the feedback gas is generated from the additional ions to generate a second plasma to form additional ions; the modified substrate is exposed to the additional ions; the additional ions are modulated; and the first reaction gas has adsorbed a single layer and The modulated extra ions react to deposit the film. 1 This paper size applies to China National Standard (CNS) A4 specification (21〇X 297 public love) • II,! (Please read the precautions on the back before filling out this page), language 511135 ei D8 VI. Patent application scope 2 · The sequential method as described in the first scope of the patent application, wherein the initial correction step is a cleaning step. 3. The sequential method according to item 1 of the scope of patent application, wherein the correction step is a surface treatment step. 4. The sequential method as described in item 1 of the patent application scope, wherein the initial correction step additionally includes introducing at least one free radical generating feedback gas into the chamber and generating a plasma from the free radical generating feedback gas to form a free radical . 5. The sequential method as described in item 1 of the patent application scope, wherein the atomic layer deposition step additionally includes introducing at least one free radical to generate a feedback gas. Entering the chamber and generating a plasma from the free radical to generate a plasma to Free radicals are formed. 6. The sequential method as described in item 1 of the scope of patent application, wherein the pollutants and dyes include naturally occurring oxides, metal oxides, particulate pollutants, and carbon-containing impurities. _7. The sequential method as described in item 1 of the scope of patent application, wherein the modulation of the ions is modulated in a manner selected from the group consisting of modulating an ion current and modulating an ion energy. 8. The sequential method as described in item 1 of the scope of patent application, which further comprises electrically biasing the substrate to a negative voltage. 9. The sequential method as described in item 8 of the patent application scope, wherein the electrical bias is sensed by a radio frequency power supply. 10. The sequential method as described in item 8 of the scope of patent application, wherein the magnitude of the electrical bias voltage during the initial cleaning step is lower than the size of the _2____ t paper. Chinese National Standards (CNS) A4 specifications (210 X 297 mm) &quot; — ~ &quot; &quot; ** &quot; * &quot; &quot; &quot; ------------- Ilf — (Please read the note on the back first Please fill in this page for more details), \ aj line belongs to 511135 A8B8C8D8 VI. The magnitude of the electrical bias during the patent application of the atomic layer deposition step. (Please read the precautions on the back before writing this page) 11. · If you apply The sequential method described in item 1 of the patent scope, wherein the method is repeated for a thin film deposition layer. 12. The sequential method described in item 1 of the patent scope, wherein the initial correction step is a barrier material film 13. The sequential method as described in item 1 of the scope of the patent application, wherein a copper seed layer is deposited immediately after the initial correction step. H. A sequential method, which is one of a vacuum chamber Substrate and a subsequent atomic layer film deposited on the substrate Integrated and in-situ correction and the deposition system begins with initial correction steps, the method includes: introducing at least one first radical to generate a feedback gas into the chamber; generating a feedback gas from the radical to generate a plasma to Forming a radical; exposing the substrate to the radical; reacting the substrate with the modulated radical to remove any contaminants from the substrate and produce a modified substrate; and then the initial modification step is to complete the atoms of a thin film Layer deposition on the modified substrate in the chamber, the deposition system includes: introducing a first reactant gas into the chamber; adsorbing at least one single layer of the first reactant gas onto the modified substrate; since Any excess of the first reactant gas is pumped out of the chamber; introducing at least one additional free radical generating feedback gas into the chamber, and the additional free radical generating feedback gas may be the same as the first free radical generating feedback gas; 3 Paper size applies to China National Standard (CNS) A4 (210 X 297 mm) &quot; 511135 A8B8C8D8 VI. Application The patent scope generates a second plasma from the additional free radicals to generate a second plasma to form additional free radicals; exposing the modified substrate to the additional free radicals; and an adsorbed monolayer of the first reactant gas with the adsorbed number and The additional radicals react to deposit the film. 15. The sequential method as described in item 14 of the scope of patent application, wherein the initial correction step is a cleaning step. 16. The sequential method as described in area 14 of patent application The correction step is a surface treatment step. 17. The sequential method as described in item 14 of the patent application scope, wherein the atomic layer deposition step additionally includes introducing at least one ion-producing feedback gas into the chamber and generating from the ion. The feedback gas generates a plasma to form ions. 18. The sequential method as described in item 14 of the scope of patent application, wherein the pollutants include naturally occurring oxides, metal oxides, particulate pollutants, and carbon-containing impurities. 19. The sequential method as described in claim 14 of the scope of the patent application, wherein the method is repeated for each thin film deposition layer. 20. The sequential method as described in item 14 of the scope of patent application, wherein the initial correction step is followed by depositing a barrier material film. 21. The sequential method as described in item 14 of the scope of patent application, wherein the initial correction step is followed by depositing a copper seed layer. 22. —A single module system for depositing the atomic layer of a film on a substrate, which includes: 4 square feet £ 1 £ using China National Standard (CNS) A4 (210 X 297 cm) &quot; ...... #. — (Please read the notes on the back before filling this page), l5Jf line belongs to 511135 A8 B8 C8 D8 VI. Application scope Chamber, which includes a plasma generation chamber for generating a plasma, the main chamber also includes an integrated cleaning and sedimentation chamber for cleaning the substrate and depositing the film on the substrate; the plasma generation chamber Is coupled to contain at least one feedback gas to form the plasma; and the integrated sanitary and sedimentation chamber is coupled to contain at least one precursor substance gas. I! I r! #! (Please read the notes on the back first (Fill in this page again) 5 Wire pain This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm)
TW90128452A 2000-12-06 2001-11-16 Method for integrated in-situ cleaning and subsequent atomic layer deposition within a single processing chamber TW511135B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI424084B (en) * 2006-01-19 2014-01-21 Asm Inc High temperature ald inlet manifold
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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9051641B2 (en) 2001-07-25 2015-06-09 Applied Materials, Inc. Cobalt deposition on barrier surfaces
GB2411767B (en) * 2002-12-20 2006-11-01 Agere Systems Inc Structure and method for bonding to copper interconnect structures
WO2004113585A2 (en) * 2003-06-18 2004-12-29 Applied Materials, Inc. Atomic layer deposition of barrier materials
US20060231207A1 (en) * 2005-03-31 2006-10-19 Rebinsky Douglas A System and method for surface treatment
US20070119370A1 (en) 2005-11-04 2007-05-31 Paul Ma Apparatus and process for plasma-enhanced atomic layer deposition
US20100062149A1 (en) 2008-09-08 2010-03-11 Applied Materials, Inc. Method for tuning a deposition rate during an atomic layer deposition process

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5702530A (en) * 1995-06-23 1997-12-30 Applied Materials, Inc. Distributed microwave plasma reactor for semiconductor processing
US5916365A (en) * 1996-08-16 1999-06-29 Sherman; Arthur Sequential chemical vapor deposition
US5834371A (en) * 1997-01-31 1998-11-10 Tokyo Electron Limited Method and apparatus for preparing and metallizing high aspect ratio silicon semiconductor device contacts to reduce the resistivity thereof
US6110836A (en) * 1999-04-22 2000-08-29 Applied Materials, Inc. Reactive plasma etch cleaning of high aspect ratio openings

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI424084B (en) * 2006-01-19 2014-01-21 Asm Inc High temperature ald inlet manifold
TWI613744B (en) * 2012-03-30 2018-02-01 應用材料股份有限公司 Substrate processing system having susceptorless substrate support with enhanced substrate heating control

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