TW508727B - Method to form shallow trench isolation structure - Google Patents

Abstract

The present invention discloses a method to form shallow trench isolation (STI) structure. Firstly, define and etch to form the first pad oxide layer and a stop layer on the substrate, so as to form the trench and embed the first oxide layer in the trench. Then remove the stop layer, so that part of the first oxide layer is protruded out of the surface of the first pad oxide layer. Form a second oxide layer on this part of the protruded first oxide layer and the first pad oxide layer, whose thickness ranges from 1 to 500 nm. Then perform dry etch to the second oxide layer to form plural sidewall oxide layers on the side surface of the first oxide layer. At the same time, the etching depth can be controlled by interferometer endpoint (IEP). Finally, remove the sidewall oxide layer, part of the protruded first oxide layer and the first pad oxide layer to expose the surface of the substrate, so as to complete the shallow trench isolation structure.

Description

508727 V. Description of the invention α) Field of the invention: The present invention relates to a semiconductor process, in particular to a method for forming a shallow trench isolation structure to prevent the oxide layer adjacent to the trench from forming a divot. Related technical notes:

The legacy semiconductor integrated circuit (1C) size is declining and the high-concentration sound continues to develop. Component shrinkage and component isolation technology have become important research directions in the manufacturing process ^. Generally speaking, the element isolation technology refers to the formation of a thick insulating layer between the element regions, that is, field oxide (F0X) °, which is the size of today's Changli regions. However, the embedded insulation layer will cause the element to form shallow trenches for further study. The subsequent etching and clearing of the dimples will form a shallow trench on a substrate 10 and a termination layer as a mask to etch the inner surface of the trench. Examples of grooves 15

Shallow Trench Isolation (STI) technology is used to reduce component isolation. Trench isolation technology forms trenches in a semiconductor substrate to isolate these components. The trench isolation technology will damage the upper surface of the insulating layer when the insulating layer is embedded in the trench and then undergo a washing step, especially near the upper corner of the trench. This defect characteristic changes to degrade the quality of the device. To understand the above problems step by step, please refer to Figures 1a to 1C to explain the method of groove isolation structure. First, Yan Qing refers to Figure 1a.

′ For example, a silicon substrate, a patterned pad of oxygen, such as a silicon nitride layer, is sequentially formed, and a plurality of trenches 15 are formed by the patterned stop layer 1 2 = bottom 10. Next, a thin oxide layer 16 is formed here. Then, embed the insulating layer] "emulsion layer".

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Next, "Refer to Figure 1b" to remove the patterned termination layer 14 by wet etching to expose the surface of the patterned pad oxide layer 2 and make the embedded insulating layer 18 partially protruding from the pad oxide layer. 12 surface. Finally, referring to Fig. 1c, the insulating layer 18 protruding from the surface of the pad oxide layer 12 is also removed by wet etching. However, in this conventional trench isolation technology, when this wet etching step and subsequent cleaning steps are performed, it is easy to form a divot in the insulating layer 18 in the corner above the trench near the substrate 10, which is indicated in the figure. A. When a component (not shown), such as a transistor, is formed adjacent to the insulating layer 18, these depressions may cause the threshold voltage of the transistor to decrease or the interface leakage current to increase. Therefore, it is necessary to eliminate these depressions formed in the upper corners of the trenches in order to strengthen the isolation capability of the shallow trench isolation structure and thereby improve the quality of the components. Yes, here, the present invention provides a method for forming a shallow trench isolation structure, which prevents the formation of a side wall oxide layer on the oxygen side wall of the field protruding from the pad oxide layer after removing the termination layer to prevent subsequent etching. And the cleaning step damages the field oxide layer to form a depression, so that the quality of the device is summarized: 1. The purpose of the present invention is to provide a formation method to prevent the threshold voltage change of the oxygen element adjacent to the upper corner of the trench and the leakage current. increase.

Shallow trench isolation structure is formed by the formation of a recessed layer. Another object of the present invention is to provide a shallow trench isolation structure to prevent damage to the device region between the trenches. According to the foregoing, the present invention provides a method for forming a shallow trench isolation junction.

508727 V. Description of the invention (3) The method is suitable for a substrate in sequence, including the following steps, in the trench and the stop layering layer to expose the surface of the stop layer and make the first oxide layer partly protrude. The first oxide layer and the oxide layer; the second oxide layer on the side surface of the first oxide layer and the partially protruding substrate surface are etched to complete a shallow thickness of 1 to 500 nm (60 nm (nm A brief description of the range of),) method to control the etching of the second oxidation pattern: In order to make the above-mentioned preferred embodiments of the present invention, a first pad oxide layer and a termination layer are formed: define the etching substrate to form at least A first oxide layer is formed on a trench; the first oxygen is removed; the stop layer is removed to expose the first pad oxide layer protruding from the surface of the first pad oxide layer; a second oxide layer is formed on the first pad oxide layer exposed by i Layer to expose the first pad oxide layer and form a plurality of side wall oxide layers in a convex manner; and remove the side first oxide layer and the first pad oxide layer to expose the trench isolation structure. Among them, the range of the second acoustic nanometer) and the preferred thickness is 20 to> In addition, 'the depth of the Ep layer is detected by the endpoint of the interferometer (the Ep layer's etching depth. Purpose, features and advantages can be more clearly understood, and cooperate with all The drawings are for detailed description. As shown in Figs. 1a to 1c, the conventional shape #, cold, and conventional method are used to form a shallow trench isolation structure. Isolation == shows the implementation according to the present invention. Example — Explanation of Symbols] 10, 20 ~ substrate, ~ 塾 gasification ® · m termination layer;

508727

16 to thin oxide layer; 22 to first pad oxide layer; 28 to first oxide layer; 18 to insulating layer; 26 to second pad oxide layer; 30 to second oxide layer; A to recess. ^ 30a ~ sidewall oxide layer; detailed description of the preferred embodiment Trench: = TTI) to round. : With reference to Figure 2a, a-substrate 20 is provided, for example, a stone crystal. Oxide is sequentially formed on the substrate 20-a -thorium oxide layer, such as a luminometer, and a termination layer, such as a nitride nitride (SiN) layer. This radon oxygen increases the adhesion of the silicon nitride layer with i :, 蕤 = and does not easily fall off the substrate 20. The lithographic etch technique is used to form a patterned final film i I 1 λ 1 on the substrate 2 °. The first pad oxide layer 22 is patterned and the patterned stop layer 24 is used to etch the substrate 2 0 to form a plurality of grooves. Slot 2 5. Please refer to Figure 2b to form a second pad oxide layer 26 on the inside surface of the second trench 25 by dry oxidation method. Then, the chemical vapor deposition method (chemical vap〇) r dep0siti ON, for example, high density plasma chemical vapor deposition (high density pas maCVD, HD PC VD) forms a first oxide layer 28 on the surface of the patterned termination layer 24 and the trench 25, such as a A dense silicon oxide layer. In this embodiment, the second pad oxide layer 26 is used to protect the inner surface of the trench 25 from damage during the HDPCVD process. Next, chemical mechanical polishing is used. (CMP) method or wet-etching method to remove the first oxide layer 28 until the surface of the patterned stop layer 24 is exposed.

0503-6828TWF; TSMC2001-0756; spin.ptd Page 8 508727

V. Description of the invention (5) Next, please refer to FIG. 2C, using phosphoric acid to remove the patterned termination layer 24. The surface of the oxide layer 22 is formed by chromium and the first oxide layer μ partially protrudes from the first pad. The surface of the oxide layer 22. Here, the purpose of leaving the first pad oxide layer 22 is to protect the substrate 20 below it from being damaged in subsequent processes. Then, 'a second oxide layer 30 is formed by chemical vapor deposition (CVD) on the exposed first pad, the surface of the chemical layer 22, and the surface of the partially protruding first oxide layer 28. The thickness is 1 to 50. 〇 Nanometer (nm) range. Next, referring to FIG. 2D, the second oxide layer 30 is anisotropically etched by dry etching to expose the first pad oxide layer 22 and a plurality of sidewall oxides are formed on the side surface of the partially protruding first oxide layer 28. Layer 30a. In this embodiment, during the above-mentioned dry etching process, an interferometer endpoint detection method (interferometer endpoint (IEP)) is used to precisely control the etching depth to avoid over etch, thereby preventing the occurrence of overetching. The element area between the grooves causes damage. / Finally, referring to FIG. 2e, the side wall oxidation sound 30a, the partially protruding first oxide layer 28 and the first pad oxide layer are removed by wet etching to expose the surface of the substrate 20. Subsequently, a cleaning step is performed to complete the shallow trench isolation structure. Due to the money-engraving system—isotropicity #etching, in the conventional shallow trench isolation structure, the oxide layer adjacent to the upper corner of the trench will have a divot, as described earlier. After the cleaning step, the depression will be more obvious and affect the electrical characteristics of the components, such as the components (not shown) formed between the trenches, such as transistors, the voltage of the cabinet or the junction leakage current will increase. However, in this embodiment, since there is a side wall oxide layer 30 & as the sacrificial layer ', when the first oxide layer 28 protruding above is partially wet,

0503-6828TWF; TSMC2001-0756; spin.ptd

Observation 727 V. Description of the invention (6) The lateral direction can be relaxed. As mentioned above, using a thickness in the range of 1 to 500 can effectively increase the laminar oxide flow at the corners according to the invention. Although the present invention is limited to the present invention, within the scope of God and Shen, we shall proceed with the application of Shen Wet # to prevent the problem of depression. For example, the second oxide layer 30 of the side wall oxide layer 30a is formed, and its nm range. However, a preferred thickness of 20 to 60 nm prevents the above-mentioned depression of the first oxide layer 28. Therefore, the method of forming a shallow trench structure can prevent the formation of a recess above the adjacent trench, which can cause changes in the threshold voltage of the device and the leakage of the junction. "Departing from the hair c and retouching, the scope of protection of the present invention is defined by the patent scope.

Claims (1)

6. The scope of the patent application is -1 *-one formed in sequence. The above-mentioned substrate in the form of two steps includes the following steps: a first oxide layer is formed in the groove and the termination of removal of Ji ϋ g ；; To: ίίί: Γ: To expose the surface of the above-mentioned termination layer, the first-oxygen exhibition 3 is to exit the surface of the first pad oxide layer and make the = 1 part protrude from the surface of the first pad oxide layer; On the layer = the protruding first oxide layer and the above-mentioned first pad oxygen, a second oxide layer is formed; the above part! Ϊ ϊ :: layer to expose the above-mentioned pad-oxide layer and the upper and lower layers. A plurality of sidewall oxide layers are formed on the side surface of the chemical layer; in order to remove the above-mentioned sidewall oxide layer and the first-upper-pad oxide layer protruding from the part to expose the chemical layer and the isolation structure. The method of forming a shallow trench is as follows: the method for forming a shallow trench isolation and adhesion described in item 1 of the patent scope, wherein the termination layer is a silicon nitride layer. ... The method of forming a shallow trench isolation social structure described in item 1 of the 3m-benefit range of the structure, wherein the step of forming a second pad oxide layer on the surface of the upper set is further included after forming the above-mentioned trench. Inside the repeated trench 4. The method of forming a shallow trench isolation society as described in the first item of the scope of the patent application ', wherein a high-density plasma chemical vapor deposition method is used to form an oxide layer. Take the above No.5. Forming a shallow trench isolation selective structure as described in item 1 of the scope of patent application 0503-6828TWF; TSMC2001-0756; spin.ptd page 11 ^ VJO / Z / A method in which the + R 9 chemical mechanical polishing method is used to remove the first oxide layer. b · The method of forming a shallow trench isolation structure as described in the ancient soil of the application # 皋Nano Fan Method range. The preferred thickness of the second oxide layer in the formation of the shallow trench isolation structure 8 described in item 1 of the patent range is 20 to 60 nanometers, and as described in the first range of the patent. In the formation of the shallow trench isolation junction described in item 8, the dry-etching method is used to form the above-mentioned sidewall oxide layer. The method is to form the shallow trench isolation junction described in item 1 of the scope of interest. <Nevor, remove the above-mentioned side wall oxide screen, the protruding first oxide layer, and the middle oxide layer by wet etching. The first pad has an oxide layer. The method of forming a shallow trench isolation junction as described in item 8 of the "Fang Shenshang", wherein hunting is controlled by the interferometer end-point detection method. &Lt; ^ 鍅 刻 的 ‘ 0503-6828TWF; TSMC2001-0756; spin.ptd Page 12