TW494629B - Low noise output buffer - Google Patents

Abstract

A kind of low noise output buffer with the capability of reducing and switching noise, outputting noise vibration and maintaining DC current is disclosed in the present invention. The invention provides a transient-state driving circuit and a steady-state driving circuit, in which these two driving circuits are supplied with a buffer power source and an internal circuit power source, respectively. Both pull-up transistor and pull-down transistor are provided inside each transistor. By designing a pre-driving implement and a single steady-state circuit, a high level can be switched to a low level or a low level can be switched to a high level at the output buffer such that noise is switched and isolated on the buffer power source when a large noise is generated, and noise is switched when only small noise is generated on the internal circuit power source. The present invention also provides a Schmidt circuit that is capable of turning off the transient-state driving circuit to decrease output signal vibration; and the steady-state driving circuit provides the capability of supplying DC current required for maintaining steady-state of signal.

Description

494629 4834twf.doc / 008 ___B7_ V. Description of the Invention The invention relates to an output buffer, and in particular, to a low noise that reduces the ability to switch noise at the same time, output signal vibration, and provides the ability to maintain DC current. Output buffer. Simultaneous switching noise (SSN) is the main source of noise in a local-speed digital circuit. And the driving circuit of the output terminal becomes the main source of SSN because of the large current flowing through the parasitic inductances such as bounding wires, leadframe and pins during state transition. Please refer to Figure 1, which is a schematic diagram of parasitic inductance generated after chip packaging. The power of the driving circuit 70 is connected to the pads via wires through the pins. At this time, the pin parasitic inductance 10 and the pad / lead parasitic inductance 20 are generated. Similarly, the driving circuit 70 also generates pin parasitic inductances 50 and 30 and pad / wire parasitic inductances 60 and 40 between the ground point (Gnd) and the load (CJ terminal). The SSN has the following effects: (1) When the simultaneous switching output (simultaneous switching output) increases, the maximum SSN bouncing voltage between power / ground (VDD / Gnd) also increases. The increase of the bounce voltage will also delay the output voltage to reach a steady state Time and affect the speed of the digital circuit. Please refer to Figures 2a and 2b. After statistics, it can be seen that the time delay will increase when the number of switching outputs increases. The SSN will increase when the number of switching outputs increases. This It means that when the slew rate of the current increases (the SSN will increase), the time delay will also increase. And everyone knows that in order to get high-speed 3 paper standards on the drive circuit, China National Standard (CNS) A4 is applied Specifications (210x 297 mm) ------------ 丨 · Installation (please read the precautions on the back before filling this page) Order --------- line «Ministry of Economy Wisdom Printed by the Property Agency Staff Consumer Cooperative 494629 A7 B7 834twf.doc / 008 i. Description of the invention (>) Implementation effect, usually the MOS transistor on the output buffer is designed to have a larger channel width to increase its drive current capability. However, a larger drive current The ability will sense a large SSN and increase the delay time, and may lead to poor performance or malfunction. (2) Please refer to Figure 3, which is a schematic diagram of the interference generated by the S SN. Assume that the active driver circuit 90 has the same VDD / Gnd as the static driver circuit 100. When the active driver circuit 90 operates, SSN will be generated on the VDD / Gnd line, which will be affected by the VDD / Gnd line. The static driving circuit 100. It is assumed that the internal circuit 80 provides a high level (H) to the static driving circuit 100, and its output is fixed at a low level (L). At this time, the internal circuit 80 sets the low level to a high level When the bit (L to H) signal is transmitted to n driving circuits 90, n driving circuits 90 simultaneously generate H to L signals. At this time, n discharging currents (iDiseharge) are generated and flow to the internal ground terminal 95 at the same time. by There is a parasitic inductance between the internal ground terminal 90 and the external Gnd. The n iDiseharge (nx iDisehargJ will generate spike noise between the internal ground terminal 95 and the external Gnd, and at this time, the static driving circuit 1 〇 The output is at L, but this surge noise will interfere with the static driving circuit 100 through the internal ground terminal 95, and the receiver 11 may receive the surge noise and cause malfunction. Please refer to Fig. 4, which shows a conventional output buffer for reducing SSN. The output buffer 160 includes a static driving device 120, which is connected to a static VDD / static GND (Quiet Vdd / GND) power supply, and a noise driver. 4 This paper size is applicable to China National Standard (CNS) A4 (210 x 297 mm) ( (Please read the notes on the back before filling out this page)

[Package -------- Order --------- line I Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the Employee Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by 494629 V. Description of the Invention (> ) The mobile device 1 30 is said to be connected to a noise VDD / noise GND (Noisy Vdd / GND) power supply. The static driving device 120 includes a static pull-up transistor 122 and a static puii-down transistor 124, and the first NOR 141 and the second NOR 142 are pre-drivers. The noise driving device 130 includes a noise push-up transistor 132 and a noise push-down transistor 134 and uses the third NOR 143 and the fourth NOR 144 as pre-drivers, and the first feedback NOT 150 and the second feedback NOT 152 is to return the signal at the output end. Assume that in the steady state, the input terminal 112 is H and the output terminal 114 is also H. At this time, the input of the first NOR 141 is L and the output of L is Η. The static push-up transistor 122 is turned on to provide Η to the output terminal. 114. The input of the second NOR 142 is Η and the Η output is L, and the static push-down transistor 124 is turned off. The input of the third NOR 143 is L and the output of Η is L, and the noise push-up transistor 132 is turned off. The input of the fourth NOR M4 is L and the output of L is L, and the noise push-down transistor 132 is turned off. At this time, only the static push-up transistor 122 of the static driving circuit 120 provides Η to the output terminal 114 ◦ When the state of the input terminal 112 changes from Η to L, it can be divided into two steps: (1) The state of the output terminal 114 is in Η 尙Before being changed, since the input terminal 112 is already L, at this time, the input of the first NOR 141 is Η and the output is L, and the static push-up transistor 122 is turned off. The input of the second NOR 142 is Η and the output of L is L, and the static push-down transistor 124 is turned off. The input of the third NOR 143 is Η and the Η output is L, and the noise push-up transistor 132 is turned off. The input of the fourth NOR 144 is L and the output of L is Η, 5 paper sizes are applicable to China National Standard (CNS) A4 (210 x 297 mm) ------------- ^^ pack ---- (Please read the precautions on the back before filling this page) Order --------- Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 494629 4834twf.doc / 008 i-_B7__ i. Invention Explanation u) Noise push-down transistor 134 is turned on to provide L to output terminal 114. That is, before the state transition, the noise driving circuit 130 is turned on by the noise driving circuit 130, and L is provided to the output terminal 114. At this time, SSN occurs on the noise GND power. (2) After the state of the output 114 is changed from the noise push-down transistor 134 to L, the first feedback NOT 150 and the second feedback NOT 152 are transmitted. At this time, the input of the first NOR 141 is Η and Η. Is L, the static push-up transistor 122 is turned off. The input of the second NOR 142 is L and the output is Η. The static push-down transistor 124 is turned on to provide L to the output terminal 114. The input of the third NOR 143 is Η and the output of L is L, and the noise booster transistor 132 is turned off. The input of the fourth NOR 144 is Η and the output of L is L, and the noise push-down transistor 134 is turned off. That is, when the state transition is steady, the static push-down transistor 124 of the static driving circuit 120 is turned on, and L is provided to the output terminal 114. At this time, the SSN of the static GND power supply will be greatly reduced, which will not affect the internal circuit. Similarly, the state of the input terminal 112 is switched from L to Η. Before the output terminal 114 尙 is switched to Η, the static driving circuit 120 is turned off, the noise driving circuit 130 is turned on, and it is subject to a large SSN at noise VDD / noise GND. power supply. When the output terminal 114 is switched to Η, the noise driving circuit 130 is turned off and the static driving circuit 120 is turned on. At this time, the static VDD / static GND power will have a smaller SSN. However, the conventional output buffer 160 has the following disadvantages: (1) The output buffer 160 is operated by two independent power supplies. The output terminal Π4 uses a power supply in the previous stage of state transition. The state of the paper 6 is applicable to Chinese national standards. (CNS) A4 size (210 X 297 mm) (Please read the precautions on the back before filling this page) ¥ 衣

Order --------- Line I Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 494629 5. After the description of the invention (rod), another power source was used, which wasted too much power. (2) When the output terminal 114 is switched from Η to L or from L to Η, for the first feedback NOT 150, the trigger level for the noise driving circuit 130 to be turned off and the static driving circuit 120 to be turned on (trigger The voltages are all the same, so that the noise driving circuit 130 cannot effectively set the opening and closing time, thereby reducing the speed of the output signal, and even causing signal errors. (3) When the noise drive circuit 130 is turned off and the static drive circuit 120 is turned on, the static push-up transistor or the static push-down transistor in the static drive circuit 120 cannot turn on its slew rate. Decreasing the output signal speed may even cause the DC current capability to be too small to generate signal errors, but the conversion rate is too fast and will increase the SSN. Therefore, the buffer SSN will still be large for the static VDD / static GND power supply. some. The present invention provides a low-noise output buffer, which provides an independent power supply and the other power supply is replaced by an internal circuit power supply to reduce the number of independent power supplies of the output buffer. The invention provides a low-noise output buffer, which includes a pivot circuit to provide two trigger level voltages to turn off the push-up transistor and the push-down transistor, respectively, to speed up the output buffer and allow the output signal The correct level can be reached within the expected time without signal errors.

The present invention provides a low-noise output buffer. After designing the pre-driver and monostable circuit, the SSN 7 generated by the internal circuit power supply (please read the precautions on the back before filling this page)

-Packing -------- Order --------- Line I This paper size applies to China National Standard (CNS) A4 (210 x 297 mm) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs System 494629 5. The invention description (hand) will be less than the SSN generated by the conventional output buffer on the static VDD / static GND power supply. The present invention provides a low-noise output buffer, which is briefly described as follows: a data input endpoint and a data output endpoint. The pre-driver includes a first reverse gate and a second reverse gate. The first reverse gate input terminal and the second reverse gate input terminal are coupled to the data input terminal. Steady-state drive circuit includes a steady-state push-up transistor and a steady-state push-up transistor. The source of the steady-state push-up transistor is coupled to the first high voltage in the power supply of the internal circuit. Connected to the steady state push transistor drain, the steady state transistor drain is coupled to the data output terminal, the steady state source is coupled to the first low voltage in the internal circuit power supply, steady state The push-up transistor gate is coupled to the first anti-gate output terminal, and the steady-state transistor is coupled to the second anti-gate output terminal in a steady state. The monostable device includes a Schmitt circuit, an AND gate, and an OR gate. The Schmitt input terminal is coupled to a data output terminal to return a signal of the data output terminal. The input terminals are coupled to the data input terminal and the pivot circuit output terminal. Transient driving circuit, including transient push-up transistor and transient push-down transistor, the source of the transient push-up transistor is coupled to the second highest voltage in the buffer power source, and the drain of the transient push-up transistor is coupled Connected to the transistor drain in the transient state, the transistor drain is coupled to the data output terminal in the transient state, and the source of the transistor is coupled to the second low voltage in the buffer power source in the transient state. The push-up transistor gate is coupled to the inverting gate output terminal, and the transient transistor gate is coupled to the inverting or gate output terminal in a transient state. The present invention provides a low-noise output buffer, which is briefly described as follows: It has an input endpoint and an output endpoint. The pre-driver is coupled to the paper. 8 This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page)

Installation——I order --------- line i outside 4629 i. Description of the invention (9) The data input endpoint is used to convert the signal of the data input endpoint to @out. The steady-state driving circuit uses the internal circuit power supply to operate. The steady-state, dynamic-field driving circuit is coupled to the pre-driver to transform the same signal as the input terminal signal to the data output terminal. The monostable device includes a normally high output terminal and a normally low output terminal, and the monostable device is coupled to the data input terminal and the data output terminal, and is used to generate the signal according to the signals of the data input terminal and the data output terminal. A short low level is at the normally high output or a short high level is at the normally low output. The transient driving circuit uses a buffer power supply to operate. The transient driving circuit is coupled to the normally high output and the normally low output, and the transient state is turned on or off according to the normally high output and the normally low output. Drive circuit. In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible, the following describes the preferred embodiments in detail with the accompanying drawings as follows: Brief description of the drawings: FIG. 1 Figure 2 shows the parasitic inductance generated after chip packaging. Figure 2a shows the relationship between the delay time and the number of switching outputs. Figure 2b shows the SSN and the number of switching outputs. Figure 3 shows the diagram of interference generated by SSN; Figure 4 shows the output buffer of conventionally reduced S SN; Figure 5 shows the transient state 9 paper sizes of the transistor gate on the drive circuit are in accordance with China National Standard (CNS) A4 (210 x 297 mm) (Please read the precautions on the back before filling this page)

& clothing -------- Order --------- Line I Printed by the Employees 'Cooperatives of the Intellectual Property Bureau of the Ministry of Economy 494629 4834twf.doc / 008 A7 B7 Printed by the Employees' Cooperatives of the Ministry of Economics and Intellectual Property Fifth, the description of the invention (3) Simulation diagram of monostable circuit; Figure 6 shows the simulation of the pre-driver of the transistor gate on the steady-state drive circuit; Figure 7 shows the pivotal figure The characteristic curve of the circuit; FIG. 8 shows the circuit diagram of the low noise output buffer according to the present invention; and FIG. 9 shows the circuit diagram of the coupling of two low noise output buffers according to the present invention. Description of symbols: 10, 30, 50-pin parasitic inductance 20, 40, 60 pad / lead parasitic inductance 70 drive circuit 80 internal circuit 90 action drive circuit 100 static drive circuit 110 receiver 11 2 input terminal 114 output terminal 120 static drive device 122 Static push-up transistor 124 Static push-down transistor 130 Noise drive device 132 Noise push-up transistor 134 Noise push-down transistor 10 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) ) Please read the back

I I

1T i I line 494629 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (1) 141 First NOR 142 Second NOR 143 Third NOR 144 Fourth NOR 150 First feedback NOT 152 Second round Grant NOT 154 NOT 160 Output buffer 200, 300 Low noise output buffer 210 Pre-driver 212 First back gate 214 Second back gate 220, 320 Steady-state drive circuits 222, 322 Steady-state push-up transistors 224, 324 stabilize In the current state, the push-on body 230, 330 transient drive circuits 232, 332 temporarily push up the transistor 234, 334. In the transient state, push the transistor 240, 340. The monostable circuit 242 is opposite to the gate 244, or the gate 2 4 6 pivot. Mitte circuit 250 data input terminal 260 data output terminal (please read the precautions on the back before filling this page) -install -------- order ----- This paper size applies to Chinese national standards ( CNS) A4 specification (210 X 297 mm) 494629 A7 B7 4834twf.doc / 008 V. Description of the invention (strict) Example First, the present invention includes a steady-state drive circuit and a temporary drive circuit in the design of the drive circuit. It is connected to the steady-state driving circuit by the internal circuit power supply, and is coupled to the transient state by the buffer power supply. Driving circuits, and both driving circuits include a pull-up transistor and a pull-down transistor, and the source of the push-up transistor is connected to the local voltage terminal of each power supply ( VDD) 'The drain of the push-up transistor is coupled to the drain of the push-down transistor, and the source of the push-down transistor is coupled to the low voltage terminal (Gnd) of each power source. The drain terminals of the transistors in the two driving circuits are connected to become data output terminals. A monostable circuit and a pre-driver are designed to control the gates of the four transistors in the two driving circuits to control the opening or closing of the driving circuit, so that a large SSN will be generated on the buffer power and a small SSN will be Generated on internal circuit power. Please refer to Figure 5, which shows a simulation diagram of the monostable circuit of the transistor gate on the transient drive circuit. The data in the table in Figure 5 represent the results of 10 output buffers connected to the same power supply at the same time. Because the SSN on the buffer power VDD is not the point, only the output delay time (Tro) is considered in the transient drive circuit 230. The data in the table represents that when the gate size of NAND 242 is 3L, it is pushed up The transistor gate voltage drop time (Tfia) is 1.12ns, the SSN of the buffer power supply VDD is 1.96V, and the output delay time (Tro) is 4.12ns. The shortest output delay time Tro can be obtained through the simulation results. That is, when the optimal NAND 242 gate size is L, the push-up transistor gate voltage drop time (Tfia) is 1.46ns. Applicable Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the precautions on the back before filling out this page} | Zhuang Yi ----------- Order --------- Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs M4629 A7 B7 4834twf.doc / 008 5. Invention Description ((() The SSN of the power supply VDD is 1.53V, and the output delay time (Tro) is 4.00ns. (Please first (Please read the notes on the back and fill in this page) Please refer to Figure 6, which shows the simulation of the pre-driver of the transistor gate on the steady-state drive circuit. The data in the table on Figure 6 represents the simultaneous 10 output buffers are coupled to the same power source. Since the smallest SSN on the steady-state driving circuit 220 is the focus of consideration, only the SSN is considered on the steady-state driving circuit 220, and the information in the table On behalf of, when the size of the anti-gate 212 is 5L, The fall time (Tfid) is 0.85ns, and the SSN of the internal circuit power supply VDD is L31V. Through simulation results, the smallest SSN can be obtained, that is, when the size of the best reverse gate 212 is k, it pushes up the gate voltage of the transistor The fall time (Tfid) is 3.14ns, and the SSN of the internal circuit power supply VDD is 0.41. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs π It can be understood from the results of Figures 5 and 6 that when the data output endpoint 260 status is changed from When switching to Η, once the push-up transistor on the transient drive circuit 230 and the push-up transistor on the steady-state drive circuit 220 are turned on at the same time, the output signal speed can be accelerated; The voltage drop time of the pole voltage is shorter than the voltage drop time of the push-up transistor on the steady-state drive circuit 220, so the push-up transistor of the transient drive circuit 230 is turned on earlier, so there is a larger SSN on the buffer power supply VDD. Generated, and the push-up transistor of the steady-state driving circuit 220 is turned on later, so a smaller SSN is generated on the internal circuit power supply VDD. Similarly, after design, when the data output terminal 260 state Η When switching to L, the transient drive circuit 230 push-down transistor and the steady-state drive circuit 220 push-down transistor are turned on at the same time, so it can speed up the output 13 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 x297 mm) 494629 4834twf.doc / 008 ____B7____ S. Description of the invention (factory output signal speed; secondly, because the transient drive circuit 230 pushes down the transistor gate voltage rise time is more stable than the steady state drive circuit 220 pushes down the transistor gate The rise time of the pole voltage is short, so the push-down transistor of the transient drive circuit 230 is turned on earlier, so a larger SSN is generated on the buffer power Gnd, and the push-down transistor of the steady-state drive circuit 220 is later. After turning on, a small SSN is generated on the internal circuit power Gnd. In the process of state transition, the two driving circuits are turned on at the same time, which can provide a larger driving current to speed up the switching speed. However, when the state transition is completed, if the two driving circuits are still turned on, a large output signal ringing will occur. In the present invention, a Schmitt circuit is used to monitor the data output endpoint. When the data output endpoint approaches the state transition completion, the transient drive circuit 230 is closed to reduce the output signal vibration. The characteristics of the Schmitt circuit are shown in Figure 7. When the input voltage is greater than V +, the output is at a low level, and when the input voltage is less than V ·, the output is at a high level. So the Schmitt circuit has two trigger levels. Please refer to FIG. 8, which is a circuit diagram of a low noise output buffer according to the present invention. Its structure is as follows: a data input endpoint 250 and a data output endpoint 260. The pre-driver 210 includes a first reverse gate 212 and a second reverse gate 214. An input terminal of the first reverse gate 212 and an input terminal of the second reverse gate 214 are coupled to the data input terminal 250. The steady-state driving circuit 220 includes a steady-state push-up transistor 222 and a steady-state push-up transistor 224. The source of the steady-state push-up transistor 222 is coupled to the first high voltage (internal circuit power supply VDD) in the internal circuit power supply. , The steady-state push-up transistor 222 drain is coupled to the steady-state push-transistor ------------- € clothing (Please read the precautions on the back before filling this page) Order- ------- Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, this paper is printed in accordance with the Chinese National Standard (CNS) A4 (210 X 297 mm). 2. Description of the invention ((today) Body 2 2 4 Drain 'pushes down the transistor 2 2 4 Drain is connected to the data output terminal 260. In steady state, the source of the push transistor 224 is coupled to the internal circuit power supply. One of the first * low voltage (internal circuit power Gnd), the gate of the push-up transistor 222 is coupled to the output of the first reverse gate 212 in steady state, and the gate of the push-up transistor 224 is coupled to the second inverter in the steady state. Gate 214 output. The monostable device 240 includes a pivot circuit 246, a reverse gate 242 and a reverse OR gate 244. The input of the pivot circuit 246 is coupled to The output terminals of the material, the inputs of the inverse gate 242 and the inverse OR gate 244 are coupled to the data input terminal 250 and the output of the pivot circuit 246. The transient driving circuit 230 includes a transient push-up transistor 232 and a transient state. The transistor 234 is pushed down, the source of the transistor 232 is temporarily coupled to the second highest voltage in the buffer power supply (buffer power VDD), and the drain of the transistor 232 is coupled to the transient push-down The drain of the transistor 234 is coupled to the data output terminal 260 in the transient state, and the source of the transistor 234 is coupled to the second low voltage in the buffer source (the buffer source Gnd in the transient state). ), The transient push-up transistor 232 gate is coupled to the inverse gate 242 output (normally high output), and the transient push transistor 234 gate is coupled to the inverse OR gate 234 output (normally low state) (Output terminal). The operation is as follows: Assume that the data input terminal 250 and the data output terminal 260 are in a steady state under the steady state. At this time, the first anti-gate 212 in the driver 210 outputs L and the second anti-gate 214. Output L, in the steady state of the steady-state drive circuit 220, the push transistor 224 is turned off, and the steady-state push-up transistor 222 is turned on It is supplied to the data output end point 260. The inverse of the monostable drive circuit 240 and the size of this paper are applicable to China National Standard (CNS) A4 (210 x 297 mm) (Please read the precautions on the back before filling (This page) Order -------- Line «Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 494629 V. Description of the invention (w) The input terminals of gate 242 and anti-OR gate 244 are provided by the Schmitt circuit 246 Η provided by the data input terminal 25, inverse 及 gate 242 output 反, inverse NOR gate 2 4 4 output L, the transient drive transistor 232 in the transient drive circuit 230 and the transient push transistor 234 closed. When the state of the data input endpoint 260 changes from Η to L, it can be divided into two steps: (1) Before the state of the data output endpoint 260 is not changed, since the data input endpoint 250 is already L, at this time, The output of the first back gate 212 and the second back gate 214 in the pre-driver 2 1 0 is Η, the steady-state push-up transistor 222 of the steady-state driving circuit 22 0 is closed, and the steady-state push-up transistor 224 is turned on. Provide information Output terminal 260 discharges the current path. At the same time, the input terminals of the inverting gate 2U and the inverting gate of the monostable circuit 240 are the L provided by the pivot circuit 246 and the L provided by the data input terminal 250, the output of the inverting gate 242, and the inverting gate 244. Output Η, the transient push-up transistor 232 in the transient drive circuit 230 is turned off, and the transient push-up transistor 234 is turned on in the transient state, providing another discharge current path of the data output terminal 260. Due to the aforementioned design, the transient transistor 2 3 4 in the transient driving circuit 230 turns on faster than the steady state driving transistor 224 in the steady-state driving circuit 220. Therefore, most of the SSNs occur. On the buffer power supply Gnd, the SSN of the internal power supply circuit Gnd is greatly reduced, so that the SSN of the power supply circuit power Gnd is below the allowable range. (2) When the state of the data output terminal 260 drops from Η to V · voltage, the pivot circuit 246 outputs Η. At this time, the state of the steady-state driving circuit 220 does not change, and the push transistor 224 is continuously turned on in the steady state. And the monostable circuit 16 paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 public love) ------------ € clothing (Please read the precautions on the back before filling in this Page) Order --------- Line · A7 B7 4834twf.doc / 008 V. Description of the invention 24 The input terminals of the anti-gate 242 and anti-or gate 244 are provided by the Schmitt circuit 246. The L provided by the input terminal 250 is reversed to the output of the gate 242, and the output of the negative OR gate 244 is output L. The transient push-up transistor 232 and the transient push-up transistor 234 in the transient driving circuit 230 are closed, so when the data output terminal Immediately before the point 260 reaches the voltage level of L, the transient transistor 224 in the transient driving circuit 230 is turned off to reduce the output signal vibration when the data output terminal 260 reaches L. When the data input terminal 250 and the data output terminal 260 are at L, at this time, the first back gate 212 in the driver 210 outputs Η, and the second back gate 214 outputs Η. The steady state drive circuit 220 pushes up the power. The crystal 222 is turned off, and the push transistor 224 is turned on in a steady state to provide L to the data output terminal 260. The inputs of the inverting gate 242 and the inverting gate 244 of the monostable driving circuit 240 are the 提供 provided by the pivot circuit 246 and the L provided by the data input terminal 250, the output of the inverting gate 242, and the output of the inverting gate 244. L. The transient push-up transistor 232 and the transient push-up transistor 234 in the transient driving circuit 23 are turned off. When the state of the data input endpoint 260 changes from L to Η, it can be divided & --- J_tL ((0 When the state of the data input endpoint 260 is not changed before L 尙 '' Since the data input endpoint 250 is already H, this At the time, the output of the first back gate 212 and the second back gate 214 in the pre-driver 210 is L '. Steady-state drive circuit 22. The steady-state push transistor 224 is turned off, and the steady-state push-up transistor 222 is turned on. Provide information. Output terminal 260 charging current path. Applicable to Chinese paper (CNS) A4 specification (210 X 297 meals) with this paper size. ----------- Clothing (Please read the precautions on the back before filling (This page) Order --------- line; Printed by the Intellectual Property Bureau Employee Consumer Cooperatives, Ministry of Economy 4629 A7 B7 W __ _I_ Printed by the Intellectual Property Bureau Employee Consumer Cooperatives, Ministry of Economy 834twf.doc / 008, Invention Description (/ ㈠, the input of the inverting gate 242 and the inverting gate 244 of the monostable circuit 240 is provided by the pivot circuit 246 and the data input terminal 250, and the inverting gate 242 outputs L, the inverse OR The gate 244 outputs L, and the transient transistor 234 in the transient driving circuit 230 is turned off, and the transient transistor 232 is pushed upward To provide another charging current path for the data output terminal 260. Due to the aforementioned design, the turn-on of the transient push-up transistor 232 in the transient drive circuit 230 is turned on than the steady-state push-up transistor 222 in the steady-state drive circuit 220 It is turned on fast, so most of the SSN occurs on the buffer power VDD, and the SSN of the internal power circuit power VDD is greatly reduced, so that the SSN of the power circuit power VDD is below the allowable range. (2) When the data output endpoint 260 When the state rises from L to V + voltage, the Schmitt circuit 246 outputs L. At this time, the state of the steady-state driving circuit 220 is unchanged, and the steady-state push-up transistor 222 is continuously turned on. The input terminal of the AND gate 244 is provided by the L provided by the pivot circuit 246 and the data input terminal 250, the output of the inverter 242 is output, and the output of the inverter 244 is L. The push transistor 232 and the push transistor 234 are turned off in the transient state, so when the data output terminal 260 is about to reach the voltage level of Η, the transient push-up transistor 232 in the transient drive circuit 230 is turned off to reduce the data. When output terminal 260 reaches time The output signal vibrates. Please refer to FIG. 9, which is a circuit diagram illustrating the coupling of two low-noise output buffers according to the present invention. The main purpose of FIG. 9 is to explain the two low-noise output buffers. Coupling of 200 and 300 For the buffer -------------------- ^ --------- ^ (Please read the precautions on the back before filling (This page) 0 This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 public love) 494629 A7 B7 4834twf.doc / 008 V. Description of the invention (q) The relationship between the power supply and the internal circuit power supply. The transient driving circuits 230 and 330 are respectively coupled to the buffer power vDD / Gnd, and the steady-state driving circuits 210 and 310 are respectively coupled to the internal circuit power vDD / Gnd. Assume that the data output and point 2 60 are L 'and the data output terminal 3 60 is Η, and the transient driving circuits 230 and 330 are both closed. When the state of the data output terminal 260 of the output low noise buffer 200 changes from L to Η, a large SSN is generated on the internal circuit power supply VDD, but since the transient driving circuit 330 of the low noise buffer 300 is turned off, so Does not affect the signal at data output endpoint 360. An advantage of the present invention is to provide a low-noise output buffer that provides one buffer power supply and the other power supply is replaced by an internal circuit power supply to reduce the number of independent power supplies of the output buffer. The advantage of the present invention is to provide a low-noise output buffer, which includes a pivot circuit to provide two trigger level voltages to turn off the transient push-up transistor and the transient push-down transistor, respectively, to speed up the output buffer. Speed and does not cause signal errors. The advantage of the present invention is to provide a low-noise output buffer. After designing the pre-driver and monostable circuit, the SSN generated by the internal circuit power supply will be less than the conventional output buffer generated by the static VDD / static GND power supply. SSN. In summary, although the present invention has been disclosed in the preferred embodiment as above, it is not intended to limit the present invention. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Retouching, so the scope of protection of the present invention shall be defined by the scope of the attached patent application. 19 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) ------------ Clothing (Read the precautions on the back before filling in this page) Order --------- Line j Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 494629 4834twf.doc / 008 V. Description of Invention (^) Prevail. A7 B7 ----------- (Please read the notes on the back before filling out this page) Order --------- line_a printed copy of the employee consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Paper size applies to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

494629 A8 B8 4834twf.doc / 008 Six employees of the Intellectual Property Bureau of the Ministry of Economic Affairs printed the application for patent coverage 1. A low-noise output buffer, coupled to a buffer power supply and an internal circuit power supply, the low-noise output The buffer includes: a data input endpoint; a data output endpoint; a pre-driver including a first reverse gate and a second reverse gate, the first reverse gate having a first input terminal and a first An output terminal, the second reverse gate has a second input terminal and a second output terminal, the first input terminal and the second input terminal are coupled to the data input terminal; a steady-state driving circuit includes a Steady-state push-up transistor and a steady-state push-up transistor, the steady-state push-up transistor has a steady-state push-up transistor source, a steady-state push-up transistor drain, and a steady-state push-up transistor Gate, the steady-state push-transistor has a steady-state push-transistor source, a steady-state push-transistor drain, and a steady-state push-transistor gate, and the steady-state push-up transistor source One of the first high voltages coupled to the internal circuit power supply Voltage, the steady-state push-up transistor drain is coupled to the steady-state push-transistor drain, the steady-state push-transistor drain is coupled to the data output terminal, and the steady-state push-transistor source Is coupled to a first low voltage in the internal circuit power supply, the steady-state push-up transistor gate is connected to the first output terminal, and the steady-state push-up transistor gate is coupled to the second output A monostable device comprising a pivotal circuit, a reverse sum gate and a reverse OR gate, the pivotal circuit comprising a pivotal input terminal and a pivotal output terminal, The pivot Miter input terminal is coupled to the data output terminal to return the signal of the data output terminal. The inverse gate has two inverting gate inputs and one inverting gate output terminal. The inverse OR gate has The size of this paper applies to the Chinese National Standard (CNS) A4 (210 X 297 mm) 494629 Six printed by the Intellectual Property Bureau Staff Consumer Cooperatives of the Ministry of Economic Affairs A8 B8 4834twf.doc / 008 Inverting OR gate output, one of the inverting gate inputs is coupled to the Material input terminal, the other anti-gate input terminal is coupled to the pivot output terminal, one of the anti-or gate input terminals is coupled to the data input terminal, and the other anti-or gate input terminal is coupled To the Schmitt output terminal; and a transient drive circuit including a transient push-up transistor and a transient push-down transistor, the transient push-up transistor having a source of a transient push-up transistor, A transient push-up transistor drain and a transient push-up transistor gate. The transient push-up transistor has a transient push-source source, a transient push-source drain, and a transient push-up transistor. The transistor gate is pushed in a state, the source of the transient push-up transistor is coupled to a second high voltage in the power supply of the buffer, and the drain of the transient push-up transistor is coupled to the transient state. Crystal drain, the push transistor drain is coupled to the data output terminal in the transient state, and the source of the push transistor is coupled to a second low voltage in the buffer power source in the transient state. The push transistor gate is coupled to the inverse gate output terminal, and the push transistor gate is coupled to the inverse OR gate output in the transient state. 2. The low-noise output buffer according to item 1 of the scope of patent application, wherein the opening time of the first reverse gate is longer than the opening time of the reverse gate. 3. The low-noise output buffer according to item 1 of the patent application scope, wherein the opening time of the second reverse gate is longer than the opening time of the reverse OR gate. 4. The low-noise output buffer described in item 1 of the scope of the patent application, wherein the pivot circuit is a bistable circuit, and the feedback is 22 X. The Chinese paper standard (CNS) A4 applies. Specifications (210 X 297 mm) 494629 A8 B8 4834twf.doc / 008 VI. Patent application scope When the input terminal voltage is greater than one V + voltage, the feedback output terminal voltage changes from a round level to a low level. When the voltage at the feedback input terminal is less than a voltage V, the voltage at the feedback output terminal changes from the low level to the high level. 5. A low noise output buffer coupled to an internal circuit power supply and a buffer power supply. The low noise output buffer includes: a data input endpoint; a data output endpoint; a pre-driver, the The pre-driver is coupled to the data input terminal to convert the signal from the data input terminal and send it out respectively; a 'steady-state drive circuit ^ The stable-state drive circuit uses the internal circuit power of §11 to operate. A steady-state driving circuit is coupled to the pre-driver to transform the same signal as the input terminal signal to the data output terminal; a monostable device, the monostable device includes a normally high output terminal and a constant A low-state output terminal, and the monostable device is coupled to the data input terminal and the data output terminal, and is configured to generate a short low level in accordance with the signals of the data input terminal and the data output terminal; The normally high state output terminal and a short high level are at the normally low state output terminal, one of which is selected; and a transient driving circuit, the steady state driving circuit uses the buffer power to operate, the State driver circuit is coupled to the normally high state output of the normally low-state output terminal, and based on the very high-state output terminal and the normally low-state output terminal for selectively opening and closing the transient driving circuit. 6. The low-noise output buffer as described in item 5 of the scope of patent application 23 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) ------------ clothing (Please read the precautions on the back before filling out this page) Order --------- Line turn_ Printed by the Consumer Consumption Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 494629 4834twf.doc / 008 A8 B8 C8 D8 Intellectual Property of the Ministry of Economic Affairs Printed by the Consumer Cooperative of the Bureau of the People's Republic of China 6. The patent application scope device, wherein the pre-driver includes a first reverse gate and a second reverse gate, the first reverse gate has a first input terminal and a first output terminal, the first The two inverters have a second input terminal and a second output terminal, and the first input terminal and the second input terminal are coupled to the data input terminal. 7. The low-noise output buffer as described in item 5 of the patent application scope, wherein the steady-state driving circuit includes a steady-state push-up transistor and a steady-state push-up transistor, and the steady-state push-up transistor It has a steady-state push-up transistor source, a steady-state push-up transistor drain, and a steady-state push-up transistor gate. The steady-state push-up transistor has a steady-state push-up transistor source, a A steady state push-up transistor drain and a steady state push-up transistor gate, the steady-state push-up transistor source is coupled to a first high voltage in the internal circuit power supply, and the steady-state push-up transistor The drain electrode is coupled to the drain transistor drain in the steady state, the drain transistor drain is coupled to the data output terminal in the steady state, and the source of the push transistor is coupled to the internal circuit power source in the steady state. One of the first low voltages, the steady-state push-up transistor is coupled to the first output terminal, and the steady-state push-up transistor is coupled to the second output terminal. 8. The low-noise output buffer according to item 5 of the scope of patent application, wherein the monostable device includes a pivot circuit, a reverse sum gate and a reverse OR gate. The pivot circuit includes a pivot Miter input terminal and a pivot Miter output terminal, the pivot Miter input terminal is coupled to the data output terminal to return the signal status of the data output terminal 'the reverse and wide has a' reverse and gate input ' Terminal and the normally high output terminal, the inverse OR gate has two inverting OR gate inputs and the normally low output terminal, one of the inverting gate inputs is connected to the data input terminal, and the other inverting gate is connected to the data input terminal. And the brake input terminal is coupled to the pivot 24 (please read the precautions on the back before filling this page) ·.--The paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 494629 A8 B8 4834twf.doc / 008 Evil six, patent application scope special output terminal, one of the inverse OR gate input terminal is coupled to the data input terminal, the other inverse OR gate input terminal is coupled to the pivot Mitte Output. (Please read the precautions on the back before filling this page) 9. The low-noise output buffer described in item 8 of the scope of patent application, where the pivot circuit is a bistable circuit, and the feedback input When the terminal voltage is greater than a V + voltage, the feedback output terminal voltage is changed from a high level to a low level. When the feedback input terminal voltage is less than a V · voltage, the feedback output terminal voltage is changed by the low standard. The bit becomes the high level. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 10. The low-noise output buffer described in item 5 of the scope of patent application, wherein the transient drive circuit includes a transient push-up transistor and a transient push-down Transistor. The transient push-up transistor has a transient push-up transistor source, a transient push-up transistor drain, and a transient push-up transistor gate. The transient push-up transistor has a Transient push-source transistor source, a transient push-source transistor drain and a transient push-source transistor gate, the transient push-up transistor source is coupled to one of the buffer power sources. High voltage, the transient push-up transistor drain is coupled to the transient push-source transistor, the transient push-source drain is coupled to the data output terminal, and the transient push-crystal is The source is coupled to a second low voltage in the power source of the buffer, the transient push-up transistor gate is coupled to the inverting gate output terminal, and the transient transistor gate is coupled to the inverting transistor in the transient state. OR gate output. 11. The low-noise output buffer according to item 5 of the scope of patent application, wherein the opening time of the first reverse gate is longer than the opening time of the reverse gate. 12. The low-noise output buffer as described in item 5 of the scope of patent application, wherein the opening time of the second anti-gate is longer than the opening time of the anti-or gate. 25 This paper size applies to China National Standard (CNS) A4 specification ( 210 X 297 mm) 494629 4834twf.doc / 008 6. The scope of patent application is long. A8 B8 C8 D8 ------------ (Please read the notes on the back before filling out this page) Order --------- line 411 ^ — Consumption by Employees of Intellectual Property Bureau, Ministry of Economic Affairs The paper size printed by the cooperative applies the Chinese National Standard (CNS) A4 (210 X 297 mm)