490825 五、發明說明（1) 【發明領域】 本發明係有關於一種電子封裝構造，其特 使用於密集快閃記憶體（compact flash mem〇 之， 封裝構造。 y ^又電子 【先前技術】 目前電腦裝置（computing devices )的儲存裝置 據很小的空間’如硬碟或輸出入裝置。為了擴展可^ 手提性或其它電腦的相容能力，製造商係發展出”即^式: (plug-in )的周邊卡以印刷電路板加以外部包裝的开彡= 出現，該裝置係稱之為” PCMCIA (Personal com^te/4 Memory Card International Associati〇n)” 形態之介面 裝置。 〜 該PCMCIA形態之裝置可被用來做為表現軟體、駐留記憶 於硬體内或在一位置的硬體驅動效能，該卡可被用來做^ 如快閃έ己憶體（f lash memory )、便捷區域網路、頁碼裝 置及傳真數據機。特別是快閃記憶卡係為可攜式地可^ 人電細亦或手提電腦連結成為一快速儲存裝置。 目刖較常為使用之記憶裝置為一種採用萬用序列連接埠 (uniVersal serial bus)做為連外介面之密集快閃記憶 ^ (=〇mpact flash mem〇ry card)，該密集快閃記憶卡 ，供π即〜插即用（plug and play )，，的能力、低耗能、可 攜性及高儲存密度，該密集快閃記憶卡適用於數位用途， 如數位相機、數位音樂之儲存及秀它可讀寫之數位資料。 由上述可知，快閃記憶體係提供利用於可攜式的裝置，因 第4頁 P〇l-〇42.ptd 五、發明說明（2) ，f儲存能力則顯得特別 在數位相機中要提升其儲，J疋在—固定空間内如 法增加記憶體佔據的體積，： ：相機設計使然，無 憶體容量，使記憶晶片：华=?在相同空間内提升記 的—種挑戰。 集積度k w ’而成為晶片封裝廠 :參照第1圖揭示—習用快閃 其主要#合右一 Pd沾丨兩h 卜心电子封裝構造， P刷電路板1 0及數個記恃 ?己憶體元件20具有數個外引腳21，盆士= ’该母 (Qfp)、引腳在晶片上方為四邊平面封裝 裝構造，該數個記情轉_ / )或八匕具有外引腳之封 .^ 歎個。己&體兀件20係利用表面黏接枯t r490825 V. Description of the invention (1) [Field of the invention] The present invention relates to an electronic packaging structure, which is particularly used in compact flash memory (compact flash mem0, packaging structure. Y ^ Electronics [Previous Technology] Currently Computer devices (computing devices) have a small amount of storage space, such as hard disks or input / output devices. In order to expand the portability of portable or other computers, manufacturers have developed the "i.e .: plug- The peripheral card in) is opened with a printed circuit board and an outer package = this device is an interface device called "PCMCIA (Personal com ^ te / 4 Memory Card International Associatión)". ~ This PCMCIA form The device can be used as performance software, memory residing in hardware or hardware-driven performance at a location. The card can be used as a flash memory, such as flash memory, convenient area Network, page number device and fax modem. Especially the flash memory card is portable and can be connected to a personal computer or a laptop computer as a fast storage device. The most commonly used memory device is It is a dense flash memory using a uniVersal serial bus as an external interface ^ (= 〇mpact flash mem〇ry card). This dense flash memory card is for π plug-and-play (Plug and play), the ability, low power consumption, portability, and high storage density. The dense flash memory card is suitable for digital applications, such as digital cameras, digital music storage, and digital data that it can read and write. From the above, it can be known that the flash memory system provides a portable device, because page 4 P01-〇42.ptd V. Description of the invention (2), f storage capacity seems to be improved especially in digital cameras Its storage, J 疋 can increase the volume occupied by the memory in a fixed space in the same way:: As a result of the design of the camera, the memory chip has no memory capacity, so that the memory chip: Hua =? A challenge to improve the memory in the same space. kw 'and become a chip packaging factory: with reference to Figure 1 reveals-the conventional fast flash its main #combined with a Pd 丨 two h Buxin electronic packaging structure, P brush the circuit board 10 and several memory? memory components 20 has several outer pins 21, Penshi = 'The mother (Qfp ), The pin is a four-sided flat package structure above the chip, the number of love turns _ /) or the eight dagger has the outer pin seal. ^ Sigh. Ji & body 20 is using surface bonding dry tr
)黏接於該印刷電路板10之上及下=技：SMT 體裝置。 叨战為一快閃記憶 、凊參照第2圖揭示另一習用快閃記憶卡之電子 ^其主要包含有一印刷電路板10及數個記憶體元们〇， :母-記憶體元件20利用晶片設於印刷電路板上⑽) Bonded above and below the printed circuit board 10 = technology: SMT body device. The battle is a flash memory, and referring to FIG. 2 reveals another conventional flash memory card electronics. It mainly includes a printed circuit board 10 and a number of memory cells. The mother-memory element 20 uses a chip. On a printed circuit board
Uip On Board)的方法連接於該印刷電路板1〇之上 表面，其係先將記憶體元件20之晶片23直接黏接於該印刷— 電路板1 0並加以打線25，再利用點膠形成該記憶體元件 2 0 ° 然而，上述習用快閃記憶體裝置構造之記憶體容量擴充 不易’SMT製程及COB製程二者無法交互運用而取其優點， 特別是COB製程中需增加被動元件或主動元件於該裝置構 造時，將無法以SMT製程加以達成。 € 此外，上述習用快閃記憶體裝置構造佔據大量之體積，Uip On Board) method is used to connect to the upper surface of the printed circuit board 10, which is to directly adhere the chip 23 of the memory element 20 to the printed-circuit board 10 and wire 25, and then use glue to form The memory element is 20 °. However, the expansion of the memory capacity of the conventional flash memory device structure is not easy. The SMT process and the COB process cannot be used interchangeably to take advantage of them, especially in the COB process, passive elements or active elements need to be added. When the device is constructed, it cannot be achieved by the SMT process. € In addition, the above conventional flash memory device structure takes up a lot of volume,
490825 五、發明說明（3) 在一有限空間中無法提升記憶體晶Η 容量。 片之集積度以增加記憶 有鑑於此’有需要提供一種雷早壯 用於SMT製程及COB IU呈，並且可接^構★ ’以便同時適 【發明概要】 杈升日日片之集積度。 本發明之主要目的在於提供一 效減小記憶體裝置之體積。 '裳構造’其可有 本發明巧要目的在於提供一種 照需要擴充其它晶片。 衣構过 ^』依 人為達二本Γ提供—種電子封裝構造，其包 含· 一印刷電路板，其設有葙赵彳 .、 構造，其設於該印刷電路板之·曰及複t個：-封裝 根據本發明另一觀點之電％ 凹：二位置。 % 構造係趣製程形成於該印刷電路板上，該中第二裝封裝 造係以SMT製权黏接於該印刷電路板上。 、 根據本發明之電子封裝構造’由於該第一封裝構造嗖於 :亥印：電路板之凹槽内’該第二封裝構造設於該印刷電路 板上相對於该凹槽的上方，4吏同樣面積之 加記憶體元件之集積度以增加其記憶容量。此外； 可依記憶體容量需^以⑽製程將複數 本發月 ;於該印刷電路板上，I要增加記憶體容量或加入Λ主 動兀件或被動兀件時，可利用謝製程將半導體元件加入 该印刷電路板上，使本發明可選擇性地採用樹或⑽製程490825 V. Description of the invention (3) The capacity of the memory crystal cannot be increased in a limited space. Film accumulation to increase memory. In view of this, there is a need to provide a thunder early strong for SMT process and COB IU presentation, and can be connected to the structure ★ ”at the same time. [Summary of the invention] The accumulation degree of the rising sun film. The main object of the present invention is to provide an effective reduction in the size of a memory device. "Shang structure" may have the present invention. The purpose of the present invention is to provide a method for expanding other chips as needed.衣架 过 ^ 』Provides an electronic packaging structure according to the author's design. It includes a printed circuit board, which is provided with a zhao zhao, a structure, which is provided on the printed circuit board, and a plurality of t: -Encapsulating electricity according to another aspect of the invention. Concave: two positions. % The structural system is formed on the printed circuit board. The second packaging package is bonded to the printed circuit board with SMT control. 2. The electronic package structure according to the present invention, 'because the first package structure is located in: a groove in a circuit board', the second package structure is provided on the printed circuit board with respect to the groove, Add the memory area of the same area to increase the memory capacity. In addition, according to the memory capacity required, multiple copies may be issued in a process of ⑽; on the printed circuit board, when the memory capacity is to be increased or active components or passive components are added, the semiconductor device may be used by the Xie process. The addition of the printed circuit board enables the present invention to selectively use a tree or a sampan process.
P01-042.ptd 第6頁 490825 五、發明說明（4) 且其二者間不會相互衝突。 【發明說明】 第3圖揭示根據本發明較佳具體實施例電子 直幻人去 4衣稱造’ 3有—印刷電路板100，其設有複數個凹槽no; 個第—=裝構造200，其設於該印刷電路板1〇〇之凹栌 :相2數個第二封裝構造3〇°，其設於該印刷電路^板100 及該第Γ凹槽110上方之位置，其中該第—封裳構造2⑽ • —封裝構造μ 〇為記憶體。該複數個第一封驻描、止 i:二 於該印刷電路板100之凹槽110内，該印刷電 =著 =110設有數個第-焊塾120，先將裸晶片㈣ i'iLH印刷電路板100之凹槽110内並加以打線22。 電!·生連接该稞晶片21〇及該第一焊塾12〇，再以點膠 成‘言= Slng )、模塑（molding )或其它習用的方式形 構造200。而該複數個第二封裝構造3〇。設有 印刷電路板100之上表面的凹槽μ 第-封劈#接if塾130 ’其利用表面黏接技術（SMT) 黏接於該印刷電路板100之第二焊塾130 用四凹槽110上方的位置，該第二封裝構造300為採 邊平面封裝（QFP )、引腳在晶片上方立它 具有外引腳的封裝構造。豆中令第 " 過=110頂面或不接觸該第二封裝構造◦之底部。 = S 構造2〇0及該第二封褒構造30〇可為 PKOMS’ EPROMS， EEPROMS或其它快閃記憶體。 第7頁 P01-042.ptd 五、發明說明（5) 將知:+由於本發明可同時採用_娜二種製程 Ξ 4ΐ; Γ造2°°、3°°與該印刷電路板1。。連 ^ ^ ^ ϊ ί ^ ^ ^^200 -cob ^ ^ 右w I i @ &為—記憶體裝置H垆 充兄憶體容量，或需要增加主動元 置右：要擴 ΐ" ί ί ： ； ：；ΜΤ 7Λ" #^ 需要辦α 士 -丄 擴充口己憶體谷量，或 而要牦加主動兀件及被動元件時， 飞 ⑽製程將電子元件加入該印刷電路HtMT製程前以 選擇性地採用SMT或COB製程且且-者 ，使本發明可 此外，請比較第卜2及3圖所示一者由HI相/衝突。 一封裝構造2 0 0設於該印刷電 由於根據本發明之第 發明較習用之記憶體裝置構電造路在板= 度，使本發明可提升記憶容量。間具有較佳之集積 請再參照第4圖所示，根據本發明之 中该第一封裝構造2〇〇或該第二、、 件，且另包含-連接埠400電性f構以300之—為轉fe® 之複數個第三焊塾140而成為路板1〇°上 r 1 , 在杲快閃吕己憶卡（c o m n a r t flash memory card )。該第= 。下、compact 制元件，藉此將該連接槔4〇〇與該控一可電性連接於該控 痒400另一端係用以與一主第機7裳構造200、3〇〇，該連接 設備連結，該密集快閃記情卡y)(未1會7F)或其它 隐卡較佳以一殼體500加以包覆 490825P01-042.ptd Page 6 490825 V. Description of the Invention (4) and the two will not conflict with each other. [Explanation of the invention] FIG. 3 shows that according to a preferred embodiment of the present invention, the electronic direct magic person is made of 4 clothes, and is made of 3 printed circuit boards 100, which are provided with a plurality of grooves no; It is provided in the recess of the printed circuit board 100: two second package structures 30 °, which is provided above the printed circuit board 100 and the first groove 110, where the first -Fengshang Structure 2⑽ •-Package structure μ 〇 is memory. The plurality of first seals and stops i: two are in the recess 110 of the printed circuit board 100, and the printed circuit is provided with a plurality of-soldering pads 120, and the bare wafer 裸 i'iLH is printed first Wires 22 are formed in the recesses 110 of the circuit board 100. Electrically connect the wafer 21 and the first solder pad 120, and then dispense the wafer 200 into a shape of 200, molding, molding, or other conventional methods. The plurality of second package structures 30. The grooves on the upper surface of the printed circuit board 100 are provided μ 第-封 裂 # 接 if 塾 130 'It uses surface bonding technology (SMT) to adhere to the second solder pad 130 of the printed circuit board 100 with four grooves At a position above 110, the second package structure 300 is a marginal flat package (QFP), and the pins have a package structure with external pins standing above the wafer. Dou Zhongling " Over = 110 top surface or not touching the bottom of the second package structure. = S structure 200 and the second sealing structure 30 may be PKOMS ’EPROMS, EEPROMS or other flash memory. Page 7 P01-042.ptd V. Description of the invention (5) It will be known that: + As the present invention can adopt two kinds of processes at the same time Ξ 4ΐ; Γ makes 2 °°, 3 °° and the printed circuit board 1. . Even ^ ^ ^ ϊ ί ^ ^ ^^ 200 -cob ^ ^ right w I i @ & is-the memory device H 垆 to fill the memory capacity of the brother, or you need to increase the active unit to the right: to expand " ί ί: ;: ＭΤ 7Λ "# ^ Need to do α 丄-丄 to expand the mouth memory volume, or if you need to add active components and passive components, Fei Fang process to add electronic components to the printed circuit HtMT process to select The SMT or COB process is used by nature, and-which makes the invention possible. In addition, please compare the one shown in Figures 2 and 3 by HI phase / conflict. A package structure 200 is provided in the printed circuit board. Since the conventional memory device according to the first invention of the present invention constructs electrical circuits on the board, the invention can improve the memory capacity. Please refer to FIG. 4 for a better integration. According to the present invention, the first package structure is 200 or the second and third components, and further includes-the port 400 is electrically configured to 300- In order to transfer a plurality of third welding pads 140 of fe® to become r 1 on the board 10 °, a flash flash memory card (comnart flash memory card) is used. The first =. The compact control element is used to connect the connection 槔 400 and the control unit electrically to the other end of the control unit 400 for constructing 200, 300 with a main machine 7 and the connection device. Link, the dense flash memory card y) (not a meeting 7F) or other hidden cards are preferably covered with a case 500 490825
490825 圖式簡單說明 【圖示說明】 第2圖 〇 第3圖 第4圖 第1圖：為習用快閃記 為另一 f f二之電子封裝構造之側視圖。 圖 两力 &用快閃$格上丄工 ]。己隐卡之電子封裝構造之側視 為本發明電子封裝 為本發明快閃記之剖視圖。 J ‘隐卡之剖視圆。 圖號說明】 20 25 記憶體元件 線 21 外弓1 110 凹槽 120 140 • *=j 第三焊墊 %〆 210 晶片 220 310 外引腳 線 腳 焊墊490825 Brief description of the drawings [Illustration] Figure 2 〇 Figure 3 Figure 4 Figure 1: Side view of the electronic package structure for conventional flash memory. Figure Two Forces & Working with Flash $ Grid]. The side view of the electronic package structure of the hidden card is a cross-sectional view of the electronic package of the present invention and a flash memory of the present invention. J ‘Hidden card cross section circle. [Illustration of drawing number] 20 25 Memory element line 21 Outer arch 1 110 Groove 120 140 • * = j Third pad% 〆 210 Chip 220 310 Outer lead Line Foot pad
II 23 晶片 1 〇 〇印刷電路板 1 3 0第二焊塾 2 0 0第一封裝構 3 0 0第二封裝構 4 0 0 連接璋 50 0殼體II 23 Wafer 1 〇 〇 Printed circuit board 1 3 0 Second solder joint 2 0 0 First package structure 3 0 0 Second package structure 4 0 0 Connection unit 50 0 Housing
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