TW488083B - Manufacture method of P type nitride semiconductor using post-growth doping method of II group dopant in a nitride semiconductor - Google Patents

Manufacture method of P type nitride semiconductor using post-growth doping method of II group dopant in a nitride semiconductor Download PDF

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TW488083B
TW488083B TW88108223A TW88108223A TW488083B TW 488083 B TW488083 B TW 488083B TW 88108223 A TW88108223 A TW 88108223A TW 88108223 A TW88108223 A TW 88108223A TW 488083 B TW488083 B TW 488083B
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layer
nitride semiconductor
nitride
dopant
manufacturing
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TW88108223A
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Chinese (zh)
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Ying-Jie Yang
Jia-Liang Yan
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Ying-Jie Yang
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Abstract

This invention provides a manufacture method of P type nitride semiconductor using post-growth doping method to dope II group dopant element into gallium nitride compound semiconductor after epitaxial growth and then carry out drive-in and annealing processes. The method is described as following: (a) forming a P type dopant diffusion layer by vapor deposition, sputtering or epitaxial process of II group dopant onto a nitride semiconductor surface; (b) performing a diffusion process on the nitride semiconductor with the P type dopant diffusion layer at a temperature greater than 500 DEG C to enable dopant diffusing into the nitride semiconductor; (c) removing the P type dopant diffusion layer on the surface of the nitride semiconductor by etching after the completion of the diffusion process; (d) depositing a silicon nitride layer or an oxide layer as a protection layer on the nitride semiconductor and performing a dopant drive-in (secondary diffusion) at a temperature greater than 500 DEG C and material annealing to form the P type nitride semiconductor. In addition, an insulation layer of silicon nitride, oxide or aluminum nitride can be formed on the nitride semiconductor surface by vapor deposition, sputtering or epitaxial process before the formation of the dopant diffusion layer in step (a) according to the required concentration of the II group dopant element.

Description

經 濟 部 智 慧 財 產 局 消 費 合 ft 社 印 製 488083 A7 _____B7 五、發明説明(/ ) 【本發明之領域】 本發明係關於一種P型氮化物半導體之製造方法,尤 指一種適用於發光二極體之P型氮化物半導體之製造方 法。 【本發明之背景】 近年來,P型氮化鎵化合物丨丨Z _ V族半導體因其能階帶 可適用於藍光二極體,因而引起廣大注意與研究,如 us53〇6662揭示以金屬有機氣相沈積(m〇cvd)之方法 於氮化鎵化合物半導體長晶時摻雜„族摻質元素(如鎂或鋅〕 於氮化鎵化合物半導體,再進行退火以活化搀雜π族雜質 兀素及氮化鎵化合物製成Ρ型氮化鎵化合物半導體;然先前 Ρ型鼠化鎵化合物半導體製造方法之技術,均為於氮化鎵 化合物III-V族半導體蟲晶時,尤其是使用羞晶方法時, 同時加入11族摻質元素(如鎂或鋅),隨後再進行退火,但 此方法由元疋在成長氮化鎵化合物磊晶半導體時加入摻 質,當加入鬲濃度摻質時,會影響氮化鎵磊晶成長,材料, 品質良率較不易控制;因此,亟需一種不會影響氮化鎵磊 晶成長,材料品質良率易控制之Ρ型氮化鎵化合物半導體 製造方法。 鈇月人爰因於此,本於積極發明之精神,虽思一種可 以解決上述問題之「Ρ型氮化物半導體製造方法」,幾經 研艽貫驗終至冗成此項嘉惠世人之發明。 【本發明之概述】 本紙張尺度適用中國國家標準) μ規格(21〇χ297含釐 (請先閲讀背面之注意事項再填寫本頁) 訂 -TOOUOJ) -TOOUOJ) 制 --—. 五、發明説明(> 、土本發明之主要目的係在提供—種p型氮化物半導體之 万法,俾能製造較高摻質濃度之p型氮化物半道噌。 用擴散方法摻雜_#f元素(如鍰或鋅)於氮 ^ :,故可製得較成長時加入P型摻質源所得之氮 化物半導體具較高摻質源濃度之P型氮化物半導體。以使 用本I明擴散方法接雜鎮而得之p型氮化物半導體為例, 鎮於氮化鎵化合物半導體中之濃度可以達到5X10^ cm-3 以其表面與塊材之電阻値較低,用以製成之元件如發 光_極體,雷射二極體之元件電阻與工作電壓較低,功率 消耗較少,元件工作壽命可以增長。 制土本發明又次要目的係在提供一種p型氮化物半導體之 ^造万法’俾能於製造p型氮化物半導體時不需在氮化鎵 磊晶成長時加入摻質源(H族摻質元素),而不會影響氮 化鎵磊晶成長,成長條件較佳,材料品質良率較易控制◦ 本發明係在提供一種p型氮化物半導體之製造方法, 係利用成長後摻雜(post_gr〇wth d〇ping)之方法,於氮 化鎵化合物半導體磊晶成長後摻雜II族摻質元素(如鎂或 鋅),亚於其後進行驅入(drive-in)與退火以製成p型氮化 物半導體。 本發明為一種P型氮化物半導體之製造方法,其係依照 以下之步驟完成:(a)先在氮化物半導體以蒸鍍、濺鍍或磊 晶方法(如MOCVD或MBE等)於表面鍍上π族摻質形成 一ρ型摻質擴散層;(b)於ρ型摻質擴散層形成後,將含ρ型 摻質擴散層之氮化物半導體於高於5 〇〇。〇之溫度下進行擴 (請先閱讀背面之注意事項再填寫本頁) ’訂 4 經濟部智慧財產局員工消費合作社印製 488083 A7Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and printed by ft. 488083 A7 _____B7 V. Description of the Invention (/) [Field of the Invention] The present invention relates to a method for manufacturing a P-type nitride semiconductor, especially a light emitting diode A method for manufacturing a P-type nitride semiconductor. [Background of the present invention] In recent years, P-type gallium nitride compounds 丨 丨 Z _ Group V semiconductors can be applied to blue light diodes because of their energy bands, so they have attracted widespread attention and research. The method of vapor deposition (mocvd) is doped with a group dopant element (such as magnesium or zinc) into the gallium nitride compound semiconductor during the growth of the gallium nitride compound semiconductor, and then annealed to activate the doped π group impurity. Elements and gallium nitride compounds are used to make P-type gallium nitride compound semiconductors; however, the previous manufacturing methods of P-type gallium compound semiconductors are all used in gallium nitride compound III-V semiconductor worm crystals, especially when using worm crystals. In the crystallization method, a group 11 dopant element (such as magnesium or zinc) is added at the same time, and then annealing is performed. However, in this method, dopants are added when growing gallium nitride compound epitaxial semiconductors. Will affect the growth of gallium nitride epitaxy, and the material and quality yield are not easy to control; therefore, there is an urgent need for a P-type gallium nitride compound semiconductor that does not affect the growth of gallium nitride epitaxy and is easy to control the quality of the material. Because of this, the Yueyue people, based on the spirit of active invention, think about a "P-type nitride semiconductor manufacturing method" that can solve the above problems. Invention. [Outline of the invention] The paper size is applicable to Chinese national standards. Μ specifications (21〇χ297 inclusive (please read the notes on the back before filling this page) Order -TOOUOJ) -TOOUOJ) System ---. 5 Description of the invention (>) The main purpose of the present invention is to provide a method of p-type nitride semiconductors, which can produce p-type nitride half-channels with a higher dopant concentration. Doping by diffusion method_ #f element (such as hafnium or zinc) in nitrogen ^ :, so it can be made into a P-type nitride semiconductor with a higher dopant source concentration than a nitride semiconductor obtained by adding a P-type dopant source during growth. As an example, the p-type nitride semiconductor obtained by adding a diffusion method to a doped town is used. The concentration in the gallium nitride compound semiconductor can reach 5X10 ^ cm-3, and its surface and block resistance 値 is low. Components such as light-emitting diodes, laser diodes With the lower operating voltage, less power consumption, and the operating life of the device can be increased. The second purpose of the present invention is to provide a p-type nitride semiconductor manufacturing method, which can be used to manufacture p-type nitride semiconductors. It is not necessary to add a dopant source (group H dopant element) during gallium nitride epitaxial growth, without affecting the growth of gallium nitride epitaxial growth. The growth conditions are better, and the material quality yield is easier to control. Provided is a method for manufacturing a p-type nitride semiconductor, which is doped with post-grown doping (post-grown doping). After the epitaxial growth of a gallium nitride compound semiconductor, a group II dopant element such as magnesium or zinc is doped. ), Followed by drive-in and annealing to make a p-type nitride semiconductor. The present invention is a method for manufacturing a P-type nitride semiconductor, which is completed according to the following steps: (a) First, a nitride semiconductor is plated on the surface by evaporation, sputtering, or epitaxy (such as MOCVD or MBE). The π group dopant forms a p-type doped diffusion layer; (b) After the p-type doped diffusion layer is formed, the nitride semiconductor containing the p-type doped diffusion layer is higher than 500. Expansion at a temperature of 〇 (Please read the notes on the back before filling out this page) ‘Order 4 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 488083 A7

五、發明説明(彡) 散,使摻質擴散進入氮化物半道 十寸月豆層,(C)於摻質擴散進入 P : +#後,再以1虫刻方式移除氮化物半導體之表面 p型接質擴散層;⑷然後在氮化物半導體上沈積一層氮化 矽或虱化物〈保1曼層,後於高於500 °c以上之溫度下加熱 以進行摻質之驅入(二次擴 、月又;只柯杆又退火以形成p型 氮化物半導體。 本發明尚可視氮化物半導體摻雜之⑴矣搀質元素所需 《濃度選擇性地以蒸鍍、_或蟲晶方法,於步驟⑷換暂 擴散層形成之前,先於氮化物半導體表面形成一層氮化 I氧化物或氮化銘之隔離層,可以藉此隔離㈣制⑽ 摻質元素,於高熱擴散時進人氮化物半導體之速度及濃 度0 本發明製造方法所使用之氮化物半導體為一般為以氮 化鎵為基礎之氮化鎵系列化合物半導體,其可以是 GaxAl,_xN或GayIn1-yN之氮化鎵化合物半導體,其中 且0‘ygl〇 經濟部智慧財產局員工消費合作社印製 本喬明I造方法所使用足P型摻質可為習用之丨丨族摻質 元素或其化合物,諸如鈹、鈣、鳃、鋇、鎂、鋅或其氧化 物等。較佳者如鎂或氧化鎂。 本叙明之製造方法係先在氮化物半導體表面形成之P 型摻質擴散層,P型摻質擴散層可為摻質元素層或摻質元 素氧化物層◦若以摻質元素之氧化物層為摻質擴散層,係 於氮化物半導體上鍍上一層II族摻質元素之氧化物層作為 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) 488083 A7 五、發明説明(4 ) 摻質擴散層,鍍層方式係以蒸鑛或錢 佳之^匕物層為以氧化鎂層作為擴散層又。万式完成。而較 右在孔化嫁化合物半導體表面形成之 _刪元素層,其可以下列步驟實二:T層 弟1八圖,係先於氮化物半導體上沈積-層厚;;/大本人案〈 5 000埃之氧切、氮切或氮化銘做隔離層二)'再 於卜4層(J〇)上鍍上—層II族摻質元素( ;=元素層(4°)之上錄上-覆蓋層(5。): = ;二:保,族摻質元素層(4。)於—^^ 万&lt; 刀月辛或外政。而其中覆蓋層可 陶竟薄膜。 〜重至屬、耐火材料或V. Description of the invention (彡) Scatter, so that the dopant diffuses into the ten-inch moon bean layer of the nitride, (C) After the dopant diffuses into P: + #, remove the nitride semiconductor P-type junction diffusion layer on the surface; ⑷ Then deposit a layer of silicon nitride or lice compound on the nitride semiconductor, and then heat it at a temperature higher than 500 ° C to drive the dopant (2 The second expansion, the moon again; only the ko rod is annealed again to form a p-type nitride semiconductor. In the present invention, the concentration of the plutonium element doped by the nitride semiconductor can be selectively selected by evaporation, _ or worm crystal method. Before the formation of the temporary diffusion layer, a layer of nitrided nitride oxide or nitrided nitride is formed on the surface of the nitride semiconductor, which can be used to isolate the plutonium dopant element and enter nitrogen during high thermal diffusion. Speed and concentration of the compound semiconductor 0 The nitride semiconductor used in the manufacturing method of the present invention is a gallium nitride series compound semiconductor generally based on gallium nitride, which may be a gallium nitride compound semiconductor of GaxAl, _xN or GayIn1-yN , Where 0'ygl The P-type dopant used in the printed method of Qiaoming I made by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs may be a conventional group of dopant elements or compounds thereof, such as beryllium, calcium, gill, barium, magnesium, zinc, or their Oxide, etc. Preferred is magnesium or magnesium oxide. The manufacturing method described in this description is a P-type dopant diffusion layer formed on the surface of a nitride semiconductor first. The P-type dopant diffusion layer may be a dopant element layer or a dopant element. Oxide layer ◦If doped element oxide layer is used as dopant diffusion layer, a layer II doped element oxide layer is plated on the nitride semiconductor as the paper standard applicable to Chinese National Standard (CNS) A4 (210X 297mm) 488083 A7 V. Description of the invention (4) The dopant diffusion layer, the plating method is based on the ore layer of steam ore or Qian Jiazhi, and the magnesium oxide layer is used as the diffusion layer. Wan type is completed. The _deletion element layer formed on the surface of the pore-forming compound semiconductor can be implemented in the following steps: Figure 18 of the T layer, which is deposited on the nitride semiconductor before the layer thickness;; / Large case <5 000 Angstroms Oxygen, Nitrogen, or Nitrided Insulation Layer ) 'On the 4th layer (J0) and then plating-layer II group dopant element (; = on the element layer (4 °) recorded on-cover layer (5.): =; two: security, family doping The element layer (4.) in — ^ ^ Wan & Dao Yuexin or foreign affairs. And the cover layer can be made of thin film. ~ Heavy to genus, refractory or

其中覆蓋層…)中之貴重金屬較 =較佳佩,陶機較佳可為氧切、氮化J 本發明鍍層之方法可為蒸鍍方法(如 MOCVD或MBE等)或熟悉此料藝者習用之鍍層之方 法0 。本發明之步驟(b) Η族接質元素之擴散需於大於5〇〇 C或更高之溫度進行,較佳於6〇〇 乂至丨丨⑽^之溫度範 圍進行擴散。II族摻質元素之擴散可於氮氣流中進行擴 散,亦可於眞空中(壓力約為10-0Torr)進行擴散。、 本發明〈步騾(c )蝕刻移除氮化鎵化合物半導體表面摻 、擴散層《万法可為習知之乾式蝕刻或濕式蝕刻◦甚至在 有前述之隔離層(30 )及覆蓋層(5〇)之情形τ,亦可以 Μ氏張h適财緖準(CNS ) Α4規格(2Η)χϋ^ (請先閲讀背面之注意事項再填寫本頁) 、a' # 經濟部智慧財產局員工消費合作社印製 A7 五、發明説明(5 =知之乾式敍刻或濕式蚀刻方法移除摻質擴散層 一、、隔離層(30 )及覆蓋層(50)。較佳為以酸或 ρ入:蝕刻私除虱化物半導體表面各層。如以氫氟酸蝕刻 ^除氣切’以王水移除鎂及金等。 妒^明^步驟⑷係待蚀刻移除氮化物半導體表面摻質 :〇 :、1巧芩知、本案之第1 B圖,先在氮化物半導體 訂 上沈積一層氮化矽層或氧化物保護層(6〇),以於 2績=加熱驅人與退火過程中防止摻雜於tub物半導體内 :摻貝几素分解或外散。其後將此含保護層之氮化物 、&quot;、大I 5 0 0 c以上之溫度下加熱進行驅入與退火以 、♦邮氮化物半導體内族換質元素,形成p型氮化物半 導體。驅入與退火較佳於600 °C至1100〇c之溫度中進 行。氧化物保護層(60 )較佳為氧化矽^ 由於本發明之製造方法新顆,能提供產業上利用,且 確有增進功效,故依法申請發明專利。 【圖式簡單説明】 經濟部智慧財產局員工消費合作社印製 第1 A圖及第1 B圖係本創作之結構示意圖,第1 A圖為本創 作&lt;擴散樣品結構示意圖’第1B圖為本創作之驅入與退火 樣品結構示意圖。 第2圖係本創作以SIMS測量實施例―”氮化鎵所得之表 示鎂濃度與深度之關係圖。 圖號説明 本紙張尺度適用中國國家襟準(CNS ) A4規格(2ι〇χ^^慶) (1 0)基板 (20)氮化物 (30)隔離層 (4〇) [I族摻質擴散層(5〇)覆蓋層(6〇)保護層 【較佳具體實施例之詳細説明】 為能讓f審查委員能更瞭解本發明之技術内容,特 舉p型虱化物4導體擴散製程較佳具體實施例説明如下。 實施例一 在氮化鎵表面上用眞空蒸鍍機於樣品表面上連續蒸鍵 5 000埃之鎂及1 000埃之金。將此樣品放入900 «C —高π 爐中加熱Μ、時,以讓鎂擴散進人樣品中。將加熱純^ 之樣品自高溫爐中取出,用王水將金與鎂蝕刻掉。將蝕刻 清洗好之氮化鎵表面上沈積—層氮切,將此樣品置入 950 C泥遇氮氣之高溫壚中加熱以進行钱之堪人與材料之 退火3〇分鐘,形成1&gt;型氮化鎵。以SIMS測量本實施例製: 所得之p型氮化鎵,可知鎂濃度高達lxl〇2,cm.3,請參照 本案之第2圖。 ’ 實施例二 在氮化鎵表面上用氣相沈積系統沈積一層5〇〇埃之氮化 珍薄膜,然後用眞空蒸鍍機於樣品表面上連續蒸鍍埃 之鎂及1 0 0 0埃之金◦將此樣品放入溫度800 〇c,且有氮 氣泥逋之高溫爐中加熱30分鐘,以讓鎂擴散進入樣品中。 將加熱擴散後之樣品,用王水將金與鎂蝕刻掉,再用氫氟 酸將氮化矽蝕刻掉。將蝕刻清洗好之氮化鎵表面上沈積一 五、發明説明(7) ,氮化矽,將此樣品置入900 °C流通氮氣之高溫爐中加熱 乂進仃鎂之驅入與材料之退火9 0分鐘,形成p型氮化鎵。 於氮化鎵之表面上用電子蒸鍍機蒸鍍一層5 〇〇〇埃之氧 2鎂:將此樣品放入溫度8 00 °。,且_氮氣流通之高溫壚 加煞2小時,以讓鎂擴散進入樣品中◦將加熱擴散後之 ,品、,用鹽酸將氧化鎂㈣掉,而後在此㈣清洗後之樣 :上沈積一層氮化矽,然後放入95 0 °C流通氮氣之高溫燐 中加熱以進行鎂之驅入與材料之退火3〇分鐘,形 化鎵。 土乳 訂 一综上所陳,本發明無論就目的、手段及功效,在在均顯 不其迥異於習知技術之特徵,為「p型氮化鎵化合物半導 體之製造方法」之一大突破,懇冑#審查委員明察,; 日賜准專利,俾嘉惠社會,實感德便。惟應注意的是,上 述諸多實施例僅係為了便於説明而舉例而已,本發明所主 張之權利範圍自應以中請專利範圍所述為準,而非僅限於 上述貫施例。 巧氏張尺度適用中_ 2丨G x 29瓦Among them, the precious metal in the cover layer is better. The ceramic machine can be oxygen cut and nitridation. The coating method of the present invention can be a vapor deposition method (such as MOCVD or MBE) or a person familiar with this material art. Conventional plating method 0. The step (b) of the present invention requires that the diffusion of the Group VIII cementing element is performed at a temperature greater than 500 C or higher, and preferably performed at a temperature ranging from 600 乂 to 丨 丨 ⑽ ^. Diffusion of group II dopant elements can be performed in a nitrogen stream or in the air (at a pressure of about 10-0 Torr). According to the present invention, step (c) etching removes the doped and diffused layer on the surface of the gallium nitride compound semiconductor. "Wanfa can be the conventional dry etching or wet etching. Even when there is the aforementioned isolation layer (30) and cover layer ( 5〇) In the case of τ, it is also possible to use M's Zhang H. Financial Standard (CNS) Α4 Specification (2Η) χϋ ^ (Please read the precautions on the back before filling this page), a '# Employees of Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the Consumer Cooperative A7 V. Description of the invention (5 = Known dry etch or wet etching method to remove the dopant diffusion layer 1. Isolation layer (30) and cover layer (50). It is preferred to use acid or ρ : Etching all layers on the surface of the lice compound semiconductor. For example, etching with hydrofluoric acid ^ degassing 'removing magnesium and gold with aqua regia, etc. Envy ^ Ming ^ Step ⑷ is the nitride semiconductor surface dopant to be removed by etching: 〇 :, 1 How to know, Figure 1 B of this case, first deposit a silicon nitride layer or an oxide protective layer (60) on the nitride semiconductor, in order to prevent 2 during the heating process and annealing. Doped in tubing semiconductor: doped chitosan is decomposed or scattered. This protective nitride &Quot;, heating and driving at a temperature of greater than 5 0 0 c to drive and anneal to form a p-type nitride semiconductor by replacing elements within the nitride semiconductor group. The driving and annealing are preferably at 600 ° C It is carried out at a temperature of up to 1100 ° C. The oxide protective layer (60) is preferably silicon oxide. ^ Because the new manufacturing method of the present invention can provide industrial use, and indeed has enhanced efficacy, it applies for an invention patent according to law. Brief description of the drawings] Figures 1A and 1B printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs are the structural diagrams of this creation, and Figure 1A is the creation &lt; Schematic diagram of the diffusion sample structure 'and Figure 1B is this Schematic diagram of the drive-in and annealing samples of the creation. Figure 2 shows the relationship between the concentration of magnesium and the depth obtained from the example of SIMS measurement of "gallium nitride". The drawing number indicates that this paper scale is applicable to the Chinese National Standard (CNS) ) A4 size (2〇χ ^^ 庆) (1 0) substrate (20) nitride (30) isolation layer (4〇) [group I dopant diffusion layer (50) cover layer (60) protective layer [ Detailed description of the preferred embodiment] To better understand the technical content of the present invention, the preferred specific embodiment of the p-type lice compound 4 conductor diffusion process is described as follows. Example 1 Using a vacuum evaporation machine on the surface of gallium nitride to continuously vapor-bond 5,000 bonds on the sample surface Angstrom magnesium and 1 000 angstrom gold. Put this sample in a 900 «C — high π furnace to heat M to let the magnesium diffuse into the human sample. Take the heated pure sample from the high temperature furnace and use The aqua regia etched away the gold and magnesium. The etched and cleaned gallium nitride surface was deposited with a layer of nitrogen cutting, and this sample was heated in a 950 C mud-nitrogen high temperature radon to anneal money and materials. In 30 minutes, 1 &gt; -type gallium nitride was formed. Measured in this example by SIMS: The obtained p-type gallium nitride shows that the magnesium concentration is as high as lxl02, cm.3, please refer to Figure 2 of this case. '' Example 2 A 500 angstrom nitride film was deposited on the surface of gallium nitride using a vapor deposition system, and then a magnesium alloy and 100 angstroms of aluminum were continuously evaporated on the surface of the sample by a vacuum evaporation machine. Gold ◦ This sample was placed in a high temperature furnace with a temperature of 800 ° C and nitrogen mud for 30 minutes to allow the magnesium to diffuse into the sample. After heating and diffusing the sample, gold and magnesium were etched away with aqua regia, and then silicon nitride was etched away with hydrofluoric acid. Deposit the etched and cleaned gallium nitride surface on the surface of one or five, description of the invention (7), silicon nitride, put this sample into a high temperature furnace with nitrogen flowing at 900 ° C to heat the drive of magnesium and annealing of the material 90 minutes, p-type gallium nitride was formed. A layer of 5,000 angstroms of oxygen 2 magnesium was deposited on the surface of gallium nitride with an electronic vapor deposition machine: this sample was placed at a temperature of 800 °. , And _ high temperature nitrogen flow for 2 hours to allow magnesium to diffuse into the sample ◦ after heating and diffusion, the magnesium oxide is washed out with hydrochloric acid, and then washed after this: as a layer deposited The silicon nitride was then heated in a high temperature ray of nitrogen flowing at 95 ° C. to drive the magnesium and anneal the material for 30 minutes to form gallium. According to the summary of the soil milk, the present invention, regardless of the purpose, means and efficacy, shows characteristics that are different from those of the conventional technology, and it is a major breakthrough in "manufacturing method of p-type gallium nitride compound semiconductor". , 谦 胄 # Examining committee members are well aware of the fact that the grant of quasi-patent, which will benefit the society, has a sense of virtue. It should be noted that the above-mentioned embodiments are merely examples for the convenience of description, and the scope of the rights claimed in the present invention should be based on the scope of the patent application, rather than being limited to the foregoing embodiments. Qiao's Zhang scale suitable for _ 2 丨 G x 29 watts

Claims (1)

申請專利範圍 I 一種Ρ型氮化物半導體之製造方法,其中係包括. ⑷在氮化物半導體表面以蒸鑛、賤鍍或蟲晶法鍍上Η族 摻質形成一摻質擴散層; (b)將得自(a)之含摻f擴散層之氮化物半導體於大於· Q溫度進行擴散,使摻質擴散進人氮化物半導體層; ⑷以蚀刻移除氮化物半導體層表面摻質擴散層;以及θ’ ⑷在得自(〇之氮化物半導體層上沈積—層氮切或氧化 物保m層,其後於大和⑽GC之溫度加熱以進行推質之 驅入與材料之退火以形成p型氮化物半導體。 訂 2·如:請專利範圍第1項所述之製造方法,其中更包括於 摻質擴散層形成之前先於氮化物半導ft表面以蒸鍍、賤 鏟或羞晶方法法形成—層氮切、氧化物或氮化銘之隔 離層,以控制II族摻質進入氮化物半 如申請專絲圍第⑼斤述之製造方法,其中^氮化物 線 半導體為氮化嫁。 4.如申請專利範圍第丄項所述之製造方法,其中該步驟⑷ 之推質擴散層係為厚度不大於5 000埃之氧化鎂層。 5·如申請專利職第1項所述之製造方法,其中該步驟(a) 形成摻質擴散層係先於氮化物上沈積—氧化々、氮化發 或氮化鋁作隔離層,再於隔離層上鍍上一層11族摻質, :後再於Π族摻質層之上鍍上一覆蓋層,其中覆蓋層為 貴重金屬、耐火材料或陶瓷薄膜。 本紙張尺度適用中國國豕揉準(CNS ) A4規格(21〇X2jg公董) A8 Βδ C8 D8 申清專利範圍 6 ·如申請專利範圍第5項所述之製造方法 質為鎂。 7 ·如申請專利範圍第5項所述之製造方法 4羞白、t 〇 8 ·如申請專利範圍第5項所述之製造方法 為名巴。 9 ·如申凊專利範圍第5項所述之製造方法,其中陶究薄膜 為氧化矽、氮化鋁或氮化矽。 1 0 .如申請專利範圍第1項所述之製造方法,其中步騾(b) 係於眞空中進行擴散。 1 1 ·如申請專利範圍第1項所述之製造方法,其中步騾(b) 係於氮氣流中進行擴散。 1 2 .如申請專利範圍第丨項所述之製造方法,其中步驟(b) 係於6 0 0 ΰ C至1 1 0 0。C之溫度中進行擴散。 1 3 .如申請專利範圍第1項所述之製造方法,其中步驟(c ) 係以酸或鹼溶液移除氮化物半導體表面摻質擴散層Q 1 4 .如申請專利範圍第1項所述之製造方法,其中步驟(d) 係於6 0 0。C至1 1 〇 0 ° C之溫度中進行退火。 其中該I I族摻 其中貴重金屬 其中耐火材料 f請先閎讀背面之注意事項再填寫本頁) 辞 -·—訂 經濟部中央標準局員工消費合作社印装Patent application scope I A method for manufacturing a P-type nitride semiconductor, which includes: ⑷ plating a Η group dopant on the surface of the nitride semiconductor by steam ore, base plating or insect crystal method to form a dopant diffusion layer; (b) Diffusing the nitride semiconductor containing the f-doped diffusion layer obtained from (a) at a temperature greater than · Q to diffuse the dopant into the human nitride semiconductor layer; 蚀刻 remove the dopant diffusion layer on the surface of the nitride semiconductor layer by etching; And θ ′ 沉积 is deposited on the nitride semiconductor layer obtained from 〇—a layer of nitrogen cut or oxide layer, and then heated at the temperature of Yamato ⑽GC to drive the mass and anneal the material to form a p-type Nitride semiconductors. Order 2. For example, please refer to the manufacturing method described in item 1 of the patent scope, which further includes a method such as vapor deposition, shovel or shaving before the formation of the doped diffusion layer on the surface of the nitride semiconductor ft. Forming-a layer of nitrogen cut, oxide, or nitride insulative layer to control the group II dopants into the nitride half as described in the application of the manufacturing method of the special wire, where the nitride semiconductor is nitrided. 4. If the scope of patent application The manufacturing method described in the above item, wherein the mass diffusion layer in step ⑷ is a magnesium oxide layer having a thickness of not more than 5,000 angstroms. 5. The manufacturing method according to item 1 of the patent application, wherein the step (a) The dopant diffusion layer is formed by depositing nitride on the nitride-hafnium oxide, nitrided nitride or aluminum nitride as the isolation layer, and then plating a layer 11 dopant on the isolation layer, and then on the Π dopant layer. A cover layer is plated, wherein the cover layer is a precious metal, a refractory material or a ceramic film. The paper size is applicable to China National Standard (CNS) A4 (21 × 2jg) A8 Βδ C8 D8 Patent scope 6 · The manufacturing method described in item 5 of the scope of patent application is magnesium. 7 · The manufacturing method described in item 5 of the scope of patent application 4 is white, t 〇8 · The manufacturing method is described in item 5 of the scope of patent application The method is Mingba. 9 · The manufacturing method as described in item 5 of the patent application scope, wherein the ceramic film is silicon oxide, aluminum nitride, or silicon nitride. 1. As described in item 1 of the patent application scope Manufacturing method, in which step (b) is performed in the air space for diffusion. 1 1 · Rushen The manufacturing method described in item 1 of the patent scope, wherein step (b) is diffusion in a nitrogen stream. 1 2. The manufacturing method described in item 丨 of the patent scope, wherein step (b) is 60 0 ΰ C to 1 1 0 0. The diffusion is performed at a temperature of C. 1 3. The manufacturing method as described in item 1 of the scope of the patent application, wherein step (c) is removing an impurity on the surface of the nitride semiconductor with an acid or alkali solution. Mass diffusion layer Q 1 4. The manufacturing method as described in item 1 of the scope of patent application, wherein step (d) is annealed at a temperature of 600 ° C. to 1 100 ° C. wherein the group II is doped Among the precious metals, refractory material f, please read the precautions on the back before filling out this page.)---Ordered by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8076165B2 (en) 2005-04-01 2011-12-13 Sharp Kabushiki Kaisha Method of manufacturing p-type nitride semiconductor and semiconductor device fabricated by the method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8076165B2 (en) 2005-04-01 2011-12-13 Sharp Kabushiki Kaisha Method of manufacturing p-type nitride semiconductor and semiconductor device fabricated by the method

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