TW483297B - Composition and method for manufacturing integral resistors in printed circuit boards - Google Patents
Composition and method for manufacturing integral resistors in printed circuit boards Download PDFInfo
- Publication number
- TW483297B TW483297B TW88113100A TW88113100A TW483297B TW 483297 B TW483297 B TW 483297B TW 88113100 A TW88113100 A TW 88113100A TW 88113100 A TW88113100 A TW 88113100A TW 483297 B TW483297 B TW 483297B
- Authority
- TW
- Taiwan
- Prior art keywords
- conductive
- layer
- patent application
- item
- copper
- Prior art date
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
Description
483297 A7 B7 五、發明說明( 發明背景 本:請案請求1998年7月7777提出申請之臨時申請案 序唬60/094,746之優先權。 (1)發明篇,|g| 本t明係關於一種電阻複人;•拉 甘±導-材料、… 其包括導電材料與非心:。本發明亦關於包括導電箱層與沉積於導Π广電阻複合材料層之多層箱。此外,本發明係關 n印刷電路版’其包含—絕緣基材與—種包 料與不導電材料之電阻複合材 ;" ^ A ,, M R ^私阻,其中琢電阻k 5材料層係層合於該絕緣基材上。 本技藝之据诫 j減少電子產物之大小、成本及改良其可靠度,對於 牙貝組件替代分立電子組件之需袁 印刷電路版製程之一部分積體組件係 〇 I成。目珂,係使用銅箱產生肢适:,該銅羯鍍有一種電阻大於該銅羯之材料。 先前技藝電阻層之問題在於因製造材料之故,其 薄。由於電阻層很薄,故其易於因在整個製程中之處: 刮痕yf曲所致之龜裂及其他物理危險而受損。例如里 純鎳形成 < 電阻層必須爲約〇 〇〇174微米厚,以達到々 形薄片電阻係數5 〇歐姆。此種電阻薄膜層容易受損 使用鎳磷合金產生較高薄片電阻,係描述於^國目、專 3」808,576號,其專利説明書係以提及的方式併入 貫際上,雖然在特定薄片電阻下·;鎳_材料會提供 厚《電阻層,但其仍製造出被認爲是薄電阻層者,當其 以 以 積 訂 當 由方 第 鎳 I - 4 - G氏張尺度適用;目家鮮(CNSM4規格(21〇Τ^7¥Ι 五、發明說明(2 ) =在造=:々形成生產損失。市售鎳— 太杜+心 阿馬母万形1⑼〇歐姆之有限範圍内。 大數値万:限制。該材料之電阻係數不足以消除 材料之二“ji匕限制本技術之應用。此外,製造該 知必須將電阻層料業。此係部分由於已 致。 q力兒沈積泊又無光澤表面以供黏著所 因此,在更高電阻應用中 散性質之積體電阻。 I、、、而要具有經改艮電與熱逸 本發明之-項目的係 箱中時,可容易地盘電路二“才枓當其摻入層狀 積體被動電阻。、反基材,-合,並經處理產生分立 本1月之另-目的係提出 刷電路版之箔。 具有知體電阻之印 本發明之又一項目吣Λ人研 合物以製造包括積體電:。落:合物與使用該金屬笛組 體電阻對於因電阻材 =ρ刷%路版·^方法’其中該積 抵抗性。^材料曲與㈣所致之變化與降解具有 在又另一目的φ,士& η 以高良率與經改良均勾===與使用該組合物 之方法。 匕括和體電阻 < 印刷電路版 本發明包括一種電阻庐 阻乂合材料,其包括導電材料與不導 本纸張尺度翻帽目家 -5- 297公釐) 483297 第88113100號專利申請案 Α7 中文說明書修正頁(90年12月) & 煩請委員明示和年/-月1所提之 修正本有無 ΐ£νΓ^,Η4,/-^;ίι>Γ^‘ιί:.., 五、發明説明( 4丨日%正ί 補充 電材料。 本發明亦包括多層箔,其包括一個導電金屬層及一層電 阻複合材料。 另一方面,本發明包括一種多層箔,其包括具有閃亮表 面與無光澤表面之銅金屬層,及與銅金屬層表面結合之電 阻共沈積複合材料層,其中該電阻共沈積複合材料層包括 約0.01至約99.9面積%之導電金屬(銅以外),與約0.01至約 99.9面積%選自氧化鋁、氮化硼及其混合物之不導電性材 料粒子。 本發明之又另一方面為一種積體電阻,其包括(a)具有第 一表面與第二表面之絕緣基材層;(b)位於該絕緣基材第 一表面上之積體電阻,其中該積體電阻另外包括一種共沈 積材料(包括導電材料與不導電材料),而且其中該積體電 阻具有第一端與第二端;(c)與該積體電阻第一端結合之 第一導電金屬層,及與該積體電阻第二端結合之第二導電 金屬層。 圖式簡述 圖1 - 8描述使用製自本發明電阻複合材料之箔以製造積 層物方法之步驟,該積層物,包括可用於製造印刷電路版 之積體電阻。 圖9為一種積體電阻之橫截面圖,該積體電阻包括一共 沈積之電阻複合材料層12,包括一種具有眾多不導電粒 子36之導電金屬。 : -6 - 本紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公釐) 裝 483297 A7 B7 第88113100號專利申請案 中文說明書修正頁(90年12月) 五、發明説明(483297 A7 B7 V. Description of the invention (Background of the invention: Please request the priority of the provisional application order 60 / 094,746 filed on 7777, July 1998. (1) The invention, | g | This t is about a kind of Resistor reincarnation; Lagan ± conductor-materials, which include conductive materials and non-cores: The present invention also relates to a multilayer box including a conductive box layer and a conductive compound layer deposited on the conductive layer. In addition, the present invention relates to n Printed circuit board 'which includes-an insulating substrate and-a kind of encapsulating material and a non-conductive material; " ^ A ,, MR ^ private resistance, in which the resistance k 5 material layer is laminated on the insulating base The teaching of this technology is to reduce the size and cost of electronic products and improve their reliability. For the replacement of discrete electronic components by dental components, integrated circuit components are part of the printed circuit board manufacturing process. The use of a copper box to generate limbs: the copper 羯 is plated with a material with a resistance greater than that of the copper 羯. The problem with the prior art resistance layer is that it is thin because of the manufacturing material. Because the resistance layer is thin, it is easy to cause Throughout the process: Scratches Damage caused by cracks and other physical hazards caused by f-curves. For example, the formation of pure nickel < the resistive layer must be about 0.00174 microns thick to achieve a resistivity of 々-shaped sheet of 50 ohms. Such a resistive film layer Easily damaged The use of nickel-phosphorus alloys to generate higher sheet resistance is described in ^ Guomu, Zhuan 3 ″ 808,576, and its patent specification is incorporated into the context in the manner mentioned, although under a particular sheet resistance ·; Nickel material will provide a thick resistive layer, but it is still manufactured as a thin resistive layer. When it is based on the product, nickel I-4-G scale is applicable; Mejia Xian (CNSM4 Specifications (21〇Τ ^ 7 ¥ Ι V. Description of the invention (2) = Production loss in production =: 々. Commercially available nickel-Taidu + Xin Amamuwan shape within a limited range of 1 ohm. Large number 欧姆Thousands: Limitation. The resistivity of the material is not enough to eliminate the second material. "Jiji limits the application of this technology. In addition, the manufacturing of this knowledge must be based on the resistive layer material. This is due in part to the cause. Glossy surface for adhesion. Therefore, it can be dispersed in higher resistance applications. Integral body resistance. I ,, and if you need to change the electrical and thermal insulation in the box of the present invention-the project, you can easily disc circuit two "only when it is incorporated into the layered body passive resistance." The base material, -combined, and processed to produce a separate one in January-the purpose is to propose a printed circuit board foil. Print with a known body resistance. Another item of the present invention is a compound developed by 人 Λ to produce integrated circuits:落: The composition and the use of the metal flute group body resistance to the resistance material = ρ brush% road version · ^ method 'where the product resistance. ^ Material song and ㈣ change and degradation caused by yet another purpose φ, Shi & η with high yield and improved === and the method of using the composition. Dagger and body resistance < Printed circuit version invention includes a resistance-resistance compound material, which includes conductive material and non-conducting paper scale (Homogenea -5- 297 mm) 483297 No. 88113100 Patent Application A7 Correction page of the Chinese manual (December 1990) & Members are kindly requested to indicate whether there is a revised version mentioned in the year / -month 1 ν £ νΓ ^, Η4, /-^; ίι > Γ ^ 'ιί: .., five, Description of the Invention (4 丨 %% supplementary electrical materials. The present invention also includes a multilayer foil including a conductive metal layer and a resistive composite material. On the other hand, the present invention includes a multilayer foil including a shiny surface and A copper metal layer with a matte surface, and a resistive co-deposited composite material layer combined with the surface of the copper metal layer, wherein the resistive co-deposited composite material layer includes about 0.01 to about 99.9 area% of conductive metal (other than copper), and about 0.01 Up to about 99.9 area% of non-conductive material particles selected from alumina, boron nitride, and mixtures thereof. Another aspect of the invention is a bulk resistor including (a) a first surface and a second surface. insulation Material layer; (b) an integrated resistor on the first surface of the insulating substrate, wherein the integrated resistor further comprises a co-deposited material (including a conductive material and a non-conductive material), and wherein the integrated resistor has a first And second terminal; (c) a first conductive metal layer combined with the first end of the integrated resistor, and a second conductive metal layer combined with the second end of the integrated resistor. The steps of a method for manufacturing a laminate using a foil made of the resistive composite material of the present invention are described, the laminate including an integrated resistor that can be used to make a printed circuit board. Figure 9 is a cross-sectional view of an integrated resistor, the integrated resistor The resistor includes a co-deposited resistive composite material layer 12, including a conductive metal with a large number of non-conductive particles 36.: -6-This paper size applies to China National Standard (CNS) A4 specifications (210 X 297 mm). 483297 A7 B7 Revised Page of Chinese Specification for Patent Application No. 88113100 (December 1990) V. Description of Invention (
HIHI
圖式元件符號簡述 10 12 14 16 18 20 22 24 30 32 34 36 代表一導電金屬層; 代表一複合材料層; 代表一絕緣基材; 代表一光敏性抗蝕劑層; 代表一光學工具; 代表一適當光源; 代表一經照射曝光部份; 代表一中間蝕刻光阻圖案; 代表一第二抗姓劑材料層; 代表一導金屬層之一部份; 代表一積體電阻;及 代表一眾多不導電粒子。 具體實例描述 本纸張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 483297 五、發明說明(4 本發明係關於一種包括 至少 經濟部智慧財產局員工消費合作社印製 導電材料之電阻複合材料心::導電材科與至少―種: 狀落、:其包括具有閃亮側面與關於:種經改良之^ 及與孩導電金屬層結合之 /則面 < 導電金屬層 層物、印刷電路版,及其他電料;本發明亦關於, 本發明複合材料製得之積體電阻。i括至少—個使月 已發展一種可用於製造印他電子基材之經改良電阻複人:料:’:包括積體電阻之其 導電材料與一種不導電材料。當被製::合:科包括—種 多個積體電阻之印刷t & 以製造包含一或 使用的。 卩刷%路版〈電阻搭時,該複合材科是; 可使用-種電鍍溶液以f知電沈積方 電阻複合材料之搭’該電鍍溶液包括固 發明 少-種導電金屬離子,其於電鍍時會形成導電金 發明搭材料層之電阻材料層之及/或導電金屬層、 導電金屬,可爲任何能夠傳導電流之金屬、類金屬、合^ 或其組合物。適於作爲本發明電阻共沈積材料中之導^ = 屬或合金之導電金屬實例,包括下列一或多種:銻(Sb)、 砷(As)、鉍(Bi)、鈷(Ce)、鎢(w)、鎂(Mn)、鉛(pb)、鉻 (Cr)、鋅(Zn)、鈀(pd)、磷(P)、硫(s)、碳(c)、起(Ta)、 銘(A1)、鐵(Fe)、鈇(Ti)、絡、銘(pt)、錫(Sn)、線(州)、銀 (Au)與銅(Cu)。該導電金屬與合金亦可選自上述導電材料 之一或多種之合金’或是多層一氣多種上述導電金屬或合 金之層。Brief description of the symbols of the graphic elements 10 12 14 16 18 20 22 24 30 32 34 36 represents a conductive metal layer; represents a composite material layer; represents an insulating substrate; represents a photosensitive resist layer; represents an optical tool; Represents a suitable light source; Represents the exposed part after irradiation; Represents a middle etching photoresist pattern; Represents a second anti-resistant material layer; Represents a part of a conductive metal layer; Represents a bulk resistor; and Represents a number of Non-conductive particles. Specific example description This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 483297 V. Description of the invention (4 The present invention relates to a printed conductive material that includes at least the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. Resistive composite material core :: conductive materials and at least ― species: like, including: having shiny sides and about: a modified ^ and combined with / conductive surface of the conductive metal layer < conductive metal layer , Printed circuit boards, and other electrical materials; the present invention also relates to integrated resistors made from the composite materials of the present invention. Including at least one month, an improved resistor has been developed that can be used to manufacture printed electronic substrates. : Material: ': Conductive material including a bulk resistor and a non-conductive material. When made :: Combined: Section includes a variety of bulk resistors printed t & to manufacture one or use. 卩 刷% Road version (when the resistor is connected, the composite material is used; a kind of plating solution can be used to know the electrodeposition side of the resistance composite material. The plating solution includes a small amount of conductive metal ions, which will be used during plating. The conductive material layer and / or the conductive metal layer and the conductive metal forming the conductive gold invention material layer may be any metal capable of conducting current, metal-like metals, alloys, or combinations thereof. It is suitable as the resistance co-deposited material of the present invention. Examples of conductive metals in the metal alloy or alloy include one or more of the following: antimony (Sb), arsenic (As), bismuth (Bi), cobalt (Ce), tungsten (w), magnesium (Mn), lead (Pb), chromium (Cr), zinc (Zn), palladium (pd), phosphorus (P), sulfur (s), carbon (c), starting (Ta), Ming (A1), iron (Fe), thorium (Ti), network, name (pt), tin (Sn), wire (state), silver (Au), and copper (Cu). The conductive metal and alloy may also be selected from one or more of the above-mentioned conductive materials. Or it is a multi-layered layer of multiple conductive metals or alloys.
「i-1裝 f靖先閱讀背面之注音?事項再填寫本Ic n n · 訂·--- n n n · 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 483297 A7 經濟部智慧財產局員工消費合作社印製 五、發明說明(5 2發明電阻複合材料中之不導電材料,彳爲任何可组導 電金屬結合而得適用共沈積電鍍電阻箔層之不導電材料。 屋:導電材料較佳爲一種可均勻分散於整體電阻箔材料中 之微=子材料。此種微粒子材料包括但不受限於金屬氧化 物、金屬氮化物、陶瓷與其他微粒子不導電材料。更佳的 是,該微粒子不導電材料係選自氮化硼、碳化矽 二:匕:夕二氧化銘、氮化短、滑石、聚乙埽四氟乙晞 (TFE)、%氧樹脂粉末與其混合物。 最佳係自具有pH値爲2至6、溫度自^至^而且包括 、’’勺土約250克/升胺基磺酸鎳與自約丨〇克/升至約%〇克/ 2或以上炙氧化鋁或氮化硼粒子之電解質溶液,共沈積該 私阻共沈積層。該氧化銘與氮化石朋粒子以平均粒 圍自約〇.〇1至約20微米爲佳,小於約1〇微米最佳。可'以巳 厂上:斤形成之共沈積複合材料層,使其具有電阻係數據約 土 ‘峨_歐姆/方形。此通常相當於在該共沈積層中之 不,電材料量,在約0別至約99.9面積%之範園内。 ^私阻複合材料層之有效橫截面面積,係 發:材料製得之積體電阻厚度與電阻之—項重要因 ^ =面面積一詞,係指該電阻材料導電金屬部分之橫截 面面和。因此,本發明之而 99 9%導m古 ’阻材料可具有約0.01%至約 代来八:Λ 截面面積。這相當於約1埃至約3 U未又金屬厚度。 “ 使用電=複合材料以製造積電路版组件,有數個益 & J沈%材料可以製成厚度足以承受製造與使用該材"I-1 installed fjing first read the phonetic on the back? Fill in this Ic nn · order · --- nnn · This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 483297 A7 Ministry of Economic Affairs Printed by the Intellectual Property Bureau's Consumer Cooperatives 5. Invention Description (5 2) The non-conductive material in the resistance composite material is a non-conductive material that can be co-deposited with a resistive foil layer that can be combined with any combination of conductive metals. House: conductive The material is preferably a micro-particle material that can be uniformly dispersed in the overall resistance foil material. Such micro-particle materials include, but are not limited to, metal oxides, metal nitrides, ceramics, and other micro-particle non-conductive materials. More preferably The microparticle non-conductive material is selected from the group consisting of boron nitride and silicon carbide: dagger: oxidized oxide, short nitride, talc, polyethylene tetrafluoride (TFE),% oxygen resin powder and mixture thereof. It has a pH of 2 to 6, a temperature of ^ to ^, and includes, `` soil of about 250 g / L of nickel sulfamate and from about 0 g / L to about% 0 g / 2 or more Electrolytic dissolution of alumina or boron nitride particles The co-deposition layer is co-deposited. The average particle size of the oxide particles and the nitride particles is preferably from about 0.01 to about 20 micrometers, and most preferably less than about 10 micrometers. It can be used on the factory: The co-deposited composite material layer formed by the cathodic layer has the electrical resistance data of about ohm / ohm / square. This is usually equivalent to the amount of electrical material in the co-deposited layer, which ranges from about 0% to about 99.9 area%. ^ Effective cross-sectional area of the layer of private resistance composite material, which is the product of the thickness of the resistive material and the resistance-an important factor ^ = the area of the surface, refers to the conductive metal portion of the resistive material The cross-sections and cross-sections. Therefore, the 99.9% conductive material according to the present invention may have a cross-sectional area of about 0.01% to about 80: Λ. This corresponds to a metal thickness of about 1 Angstrom to about 3 U. "Using electrical = composite materials to manufacture printed circuit board components, there are several materials that can be made thick enough to withstand the manufacture and use of this material
請 先-閱 讀 背 之 注 意 事 項 填響1 寫裝 本衣 頁I w I I 訂 # -8- 五 、發明說明(6 方去期間偶發損壞之電阻層。 一 ,例,可將該複合材料製J有材料 料之電路版組件之製造上包括本發明電阻複合材 7丄 、 k上後仔更鬲均勻性。 下列假設實例暸解使用本發明複人材料π々 薄片之優點。若需要每方形 ;成電阻 可以藉由產生導電材料< 潯片鼠阻係數,其 0.3微米之不導電材料粒‘如平均粒子大小约 米之電阻材料層厚係相當於^^因此,w 此等粒子鍍成每個粒子周 予%阻層。若將 填,目|!並將Μ且古Γ ⑼2微米純鎳並緊密裝 薄片。相對地,僅以純鎳製得之4二:度烏1微米之 〇.〇〇m微米。因此,複:層和具有厚度爲 同電阻薄膜厚度之500倍以上::;阻,厚度爲純鎳相 阻層較不易因物理損壞產生電阻;化/沈殿積材料之電 本發明亦包括多層電阻箱。本發 & 經濟部智慧財產局員工消費合作社印划π 個導電金屬層與一個電阻複合材科層,以‘:::包括-少兩層之複合搭。該多層箱可用於製造:種具有至 刷電路版,該積體電阻可用於阻敕電阻之印 分配、時間常數、過滤器網路等。°正、⑽限制、電壓 此多層箔導電金屬層基本上由至 組成。該導電金屬層中使用之導 ,私金屬或合金 本發明電阻材料之相同導電崎合適於製造 佳係層與被選爲該複合材料.導電惟孩導電金屬較 Y又金屬不同。選擇 -9- i紙張尺度適用f國國家標率(CNS)A4規格(21〇 χ 297公iPlease read the notes on the back first and fill in the notes 1 Write this page I w II Order # -8- 5. Description of the invention (resistance layer occasionally damaged during the 6th party. First, for example, the composite material can be made J The manufacture of circuit board components with materials includes the resistance composite material of the present invention. The uniformity is more uniform. The following hypothetical examples are used to understand the advantages of using the complex material π々 sheet of the present invention. If each square is required; The resistance can be generated by the conductive material < shim resistance coefficient, the non-conductive material particles of 0.3 micron ', such as the average particle size of the thickness of the resistive material layer is equivalent to ^^ Therefore, these particles are plated into each The particles have a% resistance layer. If it is filled, it will be 2 μm and 2 μm pure nickel and tightly packed. In contrast, only 42% made of pure nickel: 1 μm of 1 μm. m. Therefore, the complex layer has a thickness of more than 500 times the thickness of the same resistive film: resistance; the thickness is pure nickel phase. The resistive layer is less likely to generate resistance due to physical damage; Includes Multilayer Resistor Boxes. This Hair & Economy The Intellectual Property Bureau employee consumer cooperative prints π conductive metal layers and a resistive composite material layer with '::: include-comprising at least two layers. This multilayer box can be used to manufacture: The integrated resistor can be used for the resistance distribution, time constant, filter network, etc. of the resistor. The positive, negative limit, and voltage of this multilayer foil conductive metal layer are basically composed of to. The conductive, private Metal or alloy The same conductive layer of the resistance material of the present invention is suitable for the production of a good layer and is selected as the composite material. The conductive but conductive metal is different from the Y and the metal. The -9-i paper scale is applicable to the national standard of the country ( CNS) A4 size (21〇χ 297 Male i
不同導電金屬可使電路版製程更有彈性,包括例如於該兩 層落層合至絕緣基材之後,自該兩層搭選擇性蚀刻導電金 屬而不干擾該共沈積材料層之能力。 、較佳導電金屬層爲係種經表面處理之㈣,其係描來 於美國專利第5,679,203號中,其説明書以提及的方式Z ^ Γ中。枚佳雙層泊係經由將一種包含導電材料(諸如鎳) =微,子不導電材料(諸如氧化銘或氮化硼)之電阻複合材 科:藉共沈積、電沈積在較佳鋼薄膜之經表面處理平滑 或無光澤側上而製成。該電阻複合材料較佳具有度熱導 ^ ’以改良由該複合材料製得之積體電阻之熱逸散特性。 被塗敷於導電金屬層表面之電阻複合材料層 :電f之平滑表面或無光澤表面。不過,將該電阻= 浐:望敷於孩導電结之較平滑表面爲佳。於平滑側 ^开^-種複合材料層,其顯示出比在電沈積銅薄膜之 :先澤側上之複複合材料層更均勾之表面陰極化作用,於 :改艮該複合材料層之微均勾性。再者’因爲平滑、 :廓較淺之故’自該積層物蚀刻不想要電阻區域之時間备 f心此:咸少之钮刻時間亦有助於由本發明產物所製得二 月足弘阻1經改良均勻與密度。 、 電it電箱平滑表面性施加黏著促進處理,以促進該 表面之,著。此黏著促進層可爲該電阻複 二广身。㈣由塗敷化學黏結物質(例如矽燒偶 促;1 二期間塗敷用以改良接觸與流入㈣ Θ中足表面活性物質,以及熟知本技藝者已習知 S 請 先 閱 讀 背 經濟部智慧財產局員工消費合作社印製 之 注 意 事 項Different conductive metals can make the circuit board process more flexible, including, for example, after the two layers are laminated to the insulating substrate, the conductive metal can be selectively etched from the two layers without interfering with the ability of the co-deposited material layer. The preferred conductive metal layer is a kind of surface-treated tincture, which is described in U.S. Patent No. 5,679,203, and the description thereof is in the manner mentioned in Z ^ Γ. Meijia double-layer mooring system is made of a conductive composite material containing conductive materials (such as nickel) = micro, non-conductive materials (such as oxide oxide or boron nitride): by co-deposition, electrodeposition on the better steel film Made by surface treatment on smooth or matte sides. The resistance composite material preferably has a degree of thermal conductivity to improve the heat dissipation characteristics of the integrated resistance made from the composite material. The resistive composite material layer applied on the surface of the conductive metal layer: a smooth surface or a matte surface. However, this resistance = 浐: It is better to apply it to the smoother surface of the conductive junction. On the smooth side, a kind of composite material layer exhibits a more uniform surface cathodic effect than that of the composite material layer on the electrodeposited copper film: Xianze side. On the surface of the composite material layer, Micro uniformity. In addition, 'because of the smoothness and the shallowness of the profile', the time required to etch unwanted resistive areas from the laminate is important: the time of the salty button engraving also contributes to the formation of the february foot from the product of the present invention 1 Improved uniformity and density. The electric surface of the electric box is applied with a smooth surface to promote adhesion to promote the surface. This adhesion promoting layer can double the body of the resistor. ㈣Coating with chemical bonding materials (such as silicon sintering; 1) Coating in two periods to improve contact and inflow㈣ Θ Midfoot surface active substances, and those who are familiar with this art are already familiar with S Please read the intellectual property of the Ministry of Economy Notice printed by the bureau's consumer cooperatives
.1Π _.1Π _
A7 一 " _ B / 五、發明說明(8 ) 製k電應用金屬箔之其他技術,促進黏著性。 、右使用兩層箔時,該導電金屬以銅爲佳。該導電金屬層 〈厚度視其最終用途而定。該電阻共沈積材料層之厚度視 所要積體電阻器電阻而定,其在最終用途中之範圍爲約 〇·1至約12,000歐姆/方形。 、圖係關於使用包括電阻共沈積材料層之兩層络以製 造包括至少一個積體電阻之印刷電路版之方法。如圖^ 中二不,將包括一複合材料層12與一導電金屬層10之兩 層泊,層合至絕緣基材丨4,以致使複合材料層丨2夾在絕 緣基材1 4與導電金屬層1 0之間。絕緣基材1 4可由本技藝 中習知用以製造印刷電路版之任何材料製得,包括但不限 於甲醛與尿表或是甲醛與三聚氰胺之反應產物、環氧型樹 脂、聚醋樹脂、由紛與甲酸反應製得之驗性樹脂、聚石夕氧 類、聚醯胺類、苯二甲酸二烯丙基酯類、苯基矽烷樹脂, 及與陶瓷類,諸如氧化鋁、氧化皱、氮化矽、其混 等。 如圖3所示,將光敏性抗蝕材料16塗敷於導電金屬層 之曝露表面。 經濟部智慧財產局員工消費合作社印製 如圖4 - 5所示,將用以使所要圖型具體化表面之光學工 具1 8置於光敏性抗蝕劑層丨6上,並將此組合曝於一種適 當光源20或是以該光源照射,產生負型光影像,然後以 化學方式使其顯影。於化學顯影期間,該光阻之未缺昭射 部分可溶解於顯影劑中,且因此奋去除,而不溶於顯影劑 4光敏性抗蝕劑材料丨6之經照射曝光部分2 2仍固定在導 -11 - 本纸張尺錢財關家鮮(CNS)A4規格----— 1 严i 9 2 3 8 A7 B7 五、發明說明(9 ) 電金屬層1 0上。 圖6八描述一種包括絕緣基材層14、複合材料層12、導 電金屬層1G與光敏性抗蚀劑材料層之中間產物,並中續 光敏性抗蚀劑材料層已經顯影,t下中間抗蚀劑圖; 24。圖6B中,使中間抗蚀劑圖型成像並顯影 留經顯影抗:材料24中,產生呈經製圖電阻形狀之蛇形 人:使用適當酸蝕刻溶液(諸如氣化銅、氣化 鐵及銅故與硫§父),去除夫辱$ | έ 糸禾又到t顯影光阻材料保護之導 電金屬與電阻金屬層。哕舳釗丄、 野曰4蝕刻步驟產生邵分完成之積體電 阻,如圖7所π,其包括絕唆芙姑 導咖令屬…η 複合材料層12與 等弘至屬層1 0,其中已經以仆與 &道❿人μ a _ 、,工以化子蝕刻去除複合材料層1 2 、導邑至屬層1 0二者之一部公,制/e * 阻2 8。 β 製仔邵分形成之積體電 圖7 Β顯示圖7 Α之中間積層物,並 j領尽物,其中罘二抗蝕劑材料層 3 0係k敷於未經蝕刻導雷今凰爲、 夺兒至屬層之經曝光表面,並顯影 以曝露出對應於積體雷阳户罢、 " …-…山 〈導電金屬層部分32。圖 7 B中所示之中間產物,係細 ^ ^ ^ ^ ^ ^ ^ ^ 糸、♦二由知柷蝕劑材料層3 0選擇性 塗敷於外露導電金屬表面彳 罢、人,-』、 面1 〇上而形成。然後將照相工具 置万;經堃敷抗蚀劑材料居3 以、、L 打層3 〇上,然後曝光或照射。接著 使琢經照射之抗蝕劑材料顯 何村顯衫,而得一種圖型光阻32, ?::,圖型光阻使得與積體電阻結合之部分的部分 心成知體電路<導電金屬部分未經保護。 以種含氣或驗姓刻劑彳纟#· X ρ a DS _ …便3導電金屬層10之未保護區蝕 離,曝露出積體電阻3 4,並力紅 _ 其包括一種經製圖共沈積電阻 -12 (請先閱讀背面之注意事項、寫本頁) 訂· 經濟部智慧財產局員工消費合作社印製 私紙張尺度適用中國國家標準(CNS)A4l^^ 297公釐) 483297 A7 B7 五、發明說明(1〇 g 8所:、:有—和^ ^阻3 4每-端之導電金屬層,如 圖8所…吏用任何適當餘刻溶液自該積 和體電阻34之導電金屬層部分,在銅爲導電全屬之幸!: 具體:r施中’㈣刻溶液係選自過硫酸錄 : 其他市售含氨蚀刻劑。 -虱乳化物與 圖8描述一已完成之電路版積體電阻,包括一絕 曰Μ,其上放置一層呈積體電阻形式之複合材^ 且其上放置一導電金屬層1〇,其中已自 人土由 34之電阻層蝕刻該導電金屬層。 ’“積體電阻 圖9爲一個包括絕緣基材層 不導電粒子36之電阻共沈積層二導電導::與眾多 體電阻橫截面圖。 及導%金屬層丨0之積 或者,可藉下述製造包括本發明積體電阻之泰 :備-積層物,其包括一絕緣基材層與—電:複人材料 :,⑺塗敷、顯影並自該電阻共沈積層去除未經顧影之 形綱軌跡,因此該經顯影光阻材料係呈所 要知“阻形<;(3)自該絕緣基材㈣未 複合材料層;⑷自殘留複合材料層去除該光阻材二二 經濟部智慧財產局員工消費合作社印製 :孩電阻複合材料層之積體電阻部分上塗覆光阻材料並使 八顯影;及(6)以例如電解沈積將—種導電金 電阻複複合材料層之未保護部分上。 飞、、或 實例 此實例描述製造本發明複合搭7以及使用此兩層箱制造 包括積體電阻之印刷電路版之方法。 ㈢’衣仏 -13- 發明說明(11 材料 本技藝中p發々盆 ^ ^ 、和由笔解沈積製造銅箔,此處不需要詳 加描述。習用上伤&、 ^ 你目洛及將銅電沈積於旋轉金屬圓桶上製 造銅、;^。 處理 、在貝例中係使用根據美國專利第5,679,23〇號中所揭示 之万法製成之經處理相戌 钔泊。摘述此,23〇專利,緊鄰該圓桶 t V白側爲係平滑(’丨閃古 π.)側,而另一側具有相對粗糙表面 "、、=澤侧”)。可以處理該銅箱之閃亮側,使銅顆粒沉積 /面上使其粗糖化,及因此促進後續之層黏合著。接 者,根據本發明以jtL 'rb ΠΠ ΤΒ,Α /、口睹與金屬之電阻層包覆改爲良 卜層銅粒子。或者’可㈣共沈積步驟之前,以 ^層/包覆該銅粒子。再者,可省略該銅黏著處理,並 在:泊〈閃党側上直接產生電阻層,此等情況下 於積層時提供充分之黏著性。 Τ 欲共沈積於金屬搭表面上之不導電微粒子,應具有小於 約2嶋之直徑,可分散於共沈積浴中,且對於與所有 後續化學物質(例如蝕刻劑溶液)之反應具有抵抗性”交佳 爲具有鬲介電強度、高鼽傳導卜 ^ 、 门”、、得導性、谷易鑽孔性或是機製性 心粒子’例如氮化删。由於成本、安定性、孔隙度與可用 性:故’乳化鋁爲另一種較佳不導電材料。任一種 可成功地製造電阻層。 Τ 9 ^用—電鍵浴製造該共沈積層7該浴液包含不導電 于、分餘子與沉積該導電金屬或金屬合金之適當落 本紙張尺度_巾關家鮮(CNS)A4祕⑵Ο χ 請 先· 閱 背 面 之 意 事 項 再ί 填1 本衣 頁i 訂 # 經濟部智慧財產局員工消費合作社印製 14-A7 I " _ B / V. Description of the invention (8) Other technologies for making metal foils using k foils to promote adhesion. When two layers of foil are used on the right, the conductive metal is preferably copper. The thickness of the conductive metal layer depends on its end use. The thickness of the resistive co-deposited material layer depends on the resistance of the bulk resistor to be integrated, and it ranges from about 0.1 to about 12,000 ohms / square in the end use. The diagram relates to a method for manufacturing a printed circuit board including at least one integrated resistor using two layers including a layer of resistance co-deposited material. As shown in Fig. ^ 2, two layers including a composite material layer 12 and a conductive metal layer 10 are laminated to the insulating substrate 丨 4, so that the composite material layer 丨 2 is sandwiched between the insulating substrate 14 and conductive Between the metal layers 10. The insulating substrate 14 can be made of any material conventionally used in the art to make printed circuit boards, including but not limited to the reaction products of formaldehyde and urine meter or formaldehyde and melamine, epoxy resin, polyacetate resin, Reactive resins prepared by reacting with formic acid, polyoxysilanes, polyamides, diallyl phthalates, phenylsilane resins, and ceramics, such as alumina, oxidized wrinkles, nitrogen Silicone, its mixtures, etc. As shown in Fig. 3, a photosensitive resist material 16 is applied to the exposed surface of the conductive metal layer. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs as shown in Figure 4-5. The optical tools 18 used to embody the surface of the desired pattern are placed on the photosensitive resist layer 6 and the combination is exposed. A suitable light source 20 is irradiated with or by the light source to generate a negative light image, which is then chemically developed. During the chemical development, the unexposed portion of the photoresist can be dissolved in the developer, and is therefore removed, and the insoluble exposed portion 2 of the photoresist material of the developer 4 is still fixed at 6 Guide-11-Specifications of this paper rule for wealth and wealth (CNS) A4 ---- 1 Yan i 9 2 3 8 A7 B7 V. Description of the invention (9) Electrical metal layer 10. FIG. 6 depicts an intermediate product including an insulating substrate layer 14, a composite material layer 12, a conductive metal layer 1G, and a photosensitive resist material layer, and the intermediate photoresist material layer has been developed. Etching diagram; 24. In FIG. 6B, the intermediate resist pattern is imaged and developed to retain the developed resistance: In the material 24, a serpentine having a patterned resistance shape is produced: using an appropriate acid etching solution such as vaporized copper, vaporized iron, and copper Therefore, the father of sulfur), remove the humiliation $ | 糸 糸 He went to t to develop a conductive metal and resistive metal layer protected by a photoresist material. The four etching steps of Zhao Zhaoye and Ye Yue produced the integral resistance completed by Shao Fen, as shown in Fig. 7, which includes the composite material layer 12 and the isotropic layer 10, among which One of the servants & Taoist people μ a _ has been removed by chemical etching to remove one of the composite material layer 1 2 and the lead layer to the metal layer 10, and the system is / e * resistance 28. Figure 7 of the integrated product formed by the beta system is shown in Figure 7B, and the intermediate layer is shown in Figure 7A. The second layer of the resist material 30 is applied to the unetched lead. After the exposed surface of the layer is exposed, it is developed to expose the conductive metal layer portion 32 corresponding to the integrated Leiyanghu strike. The intermediate product shown in FIG. 7B is a thin ^ ^ ^ ^ ^ ^ ^ ^ ♦, ♦ two etched etchant material layer 30 is selectively applied to the surface of the exposed conductive metal. The surface 10 is formed. Then set the photographic tool; apply the resist material to the layer 3 and layer 3, and then expose or irradiate. Then, the exposed resist material is displayed as a Hecunxian shirt to obtain a patterned photoresistor 32,? ::, the patterned photoresistor makes a part of the integrated circuit of the integrated resistor into a body circuit < The conductive metal parts are not protected. An unprotected area of the conductive metal layer 10 is etched with a gaseous or nicknamed engraving agent 彳 纟 # · X ρ a DS _…, exposing the integrated resistance 34, and the force is red. Deposition resistance -12 (Please read the precautions on the back and write this page first) Order · Printed private paper standard for employees' cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs applies Chinese National Standard (CNS) A4l ^^ 297 mm 483297 A7 B7 5 、 Explanation of the invention (10g 8 places:,: there are-and ^ ^ resistance 3 4 conductive metal layer at each end, as shown in Figure 8 ... using any appropriate time solution from the product and the body resistance 34 of the conductive metal Fortunately, copper is electrically conductive in the layer part !: Specific: R Shizhong 'etched solution is selected from persulfuric acid: other commercially available ammonia-containing etchant.-Lice emulsion and Figure 8 describe a completed circuit A stacked body resistor includes a composite material M, on which a layer of composite material in the form of a stacked body resistor ^ is placed, and a conductive metal layer 10 is placed thereon, wherein the conductive metal layer has been etched from the resistive layer 34 of human soil. "" Integrated resistance Figure 9 is a resistive co-deposition including non-conductive particles 36 of an insulating substrate layer Dielectric Conductivity: Cross-sectional view with a large number of bulk resistors. And the product of percent conductivity metal layer, 0, or, can be manufactured by the following including the bulk resistor of the present invention: prepared-a laminate, which includes an insulating substrate layer AND-Electrics: Furen materials :, coated, developed and removed from the resistive co-deposited layer without considering the shape of the trajectory, so the developed photoresistive material is known as "resistance <; (3 ) Remove the photoresist material from the insulating base material; ⑷Remove the photoresist material from the residual composite material Materials and develop eight; and (6) an unprotected portion of a conductive gold resistance composite composite layer by, for example, electrolytic deposition. Fly, or an example This example describes the manufacture of the composite bridge 7 of the present invention and the use of the two-layer box Method for manufacturing printed circuit board including integrated resistors. ㈢ '衣 仏 -13- Description of the invention (11 materials p hairpin pot ^ ^ in this technology, and copper foil produced by pen solution deposition, need not be described here in detail .Using injury &, ^ your eyes And copper is electrodeposited on a rotating metal drum to produce copper. The treatment is, in the examples, using a treated phase made according to the method disclosed in US Pat. No. 5,679,230. Summarizing this, in the 23 ° patent, the white side of t V next to the barrel is the smooth ('丨 flash ancient π.) Side, and the other side has a relatively rough surface (",, = Ze side"). This can be processed The shiny side of the copper box causes the copper particles to be deposited / coarsely saccharified and thus promotes subsequent layer adhesion. In turn, according to the present invention, the resistance of jtL 'rb ΠΠ ΤΒ, Α, and metal The layer coating is changed to a copper layer with a good thickness. Alternatively, the copper particles may be layered / coated before the co-deposition step. In addition, the copper adhesion treatment can be omitted, and a resistance layer is directly generated on the side of the Porcelain, which in this case provides sufficient adhesion during lamination. Τ Non-conductive fine particles to be co-deposited on the surface of the metal cladding should have a diameter of less than about 2 嶋, be dispersible in the co-deposition bath, and be resistant to reactions with all subsequent chemicals (such as etchant solutions) " Jiaojiao is a kind of material that has high dielectric strength, high conductivity, high conductivity, good conductivity, easy drilling, or mechanical core particles, such as nitride. Due to cost, stability, porosity, and availability: 'emulsified aluminum is another preferred non-conductive material. Either can successfully produce a resistive layer. Τ 9 用 —The co-deposition layer is made with an electric bond bath. 7 The bath contains non-conductive, diluent, and suitable paper for depositing the conductive metal or metal alloy. Dimensions of paper towels (CNS) A4. Χ χ Please read the notice on the back and fill in this first page. Order # Printed by the Consumer Consumption Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 14-
五、發明說明(12 ^ 此丨目;兄中’以得自每升包含9 0克胺基磺酸N i以及 母升包含3 0克平均粒子直徑約〇 · 3微米氧化鋁浴液之共沈 積層處理該銅箔。 該1沈積層之最終薄片電阻係數,係爲所包含不導電粒 :之體積百分比與該金屬沉積物整體厚度之函數。共沈澱 牙貝層中不導兒粒子之面積百分比範圍,可爲約1至約外.9 重I % °其他電性質(諸如功率逸散)亦爲此等參數之函 數。因此,厚度與共沈積比例之廣範圍組合,會產生電阻 產物之廣 < 所要範圍。在一極端中,於該沉積物中實質上 未二有可偵測粒子之金屬或金屬合金層,通常將產生低薄 片私阻係數。在另一極端下,由具有恰好足以提供所需機 械丨生貝人私性貝之金屬/金屬合金所組成之沉積物,通常 :供=高薄片電阻係數。可藉由調整本技藝中習知之電鍍 =流二度、電鍍時間、流動率、該電解浴中所包含之不導 電固體%、浴溫度、pH値與其他電鍍變數控制此等性 質。 在此實例中’藉由下列方法在銅箔載體上形成共沈積 私阻材料。製備具有渡度爲每升去離子水9 0克胺基磺酸 錄之錄私鍍/谷液。於其中添加每升3 q克之具有平均粒子 大j 〇 · 3极米 < 氧化鋁粉末。邊攪動邊將該混合物加熱至 下表1中所不之電鍍溫度。使用胺基磺酸調整電鍍溶液 p Η値。 和銅V自陰極浸於1% H2S〇4(水溶、液)中3 〇秒,然後以去離 子水徹底π洗。將此試樣置於一個已放置入胺基磺酸鹽鎳 請 先 閱 讀 背 面 之 注 意 事 項 經濟部智慧財產局員工消費合作社印製 _______ -15- 本纸張尺_ _家標^7^·)Α4職⑽Χ 29?^--V. Description of the invention (12 ^ This item; Brother Zhong 'is derived from a total of 90 grams of aminosulfonic acid Ni per liter and the mother liter contains 30 grams of alumina bath with an average particle diameter of about 0.3 micrometers. The deposited layer processes the copper foil. The final sheet resistivity of the 1 deposited layer is a function of the volume percentage of non-conductive particles included and the overall thickness of the metal deposit. The area of non-conductive particles in the co-precipitated scallop layer The percentage range can be from about 1 to about 9. 9 weight I% ° Other electrical properties (such as power dissipation) are also a function of these parameters. Therefore, the wide range combination of thickness and co-deposition ratio will produce resistance products. <Wide range. In one extreme, there is essentially no metal or metal alloy layer with detectable particles in the sediment, which usually results in a low flake private resistance coefficient. In the other extreme, it has exactly It is enough to provide the required machinery. The deposit made of metal / metal alloy of raw shellfish is usually: supply = high sheet resistivity. It can be adjusted by electroplating which is known in the art = flow two degrees, plating time, flow Rate, the electrolysis These properties are controlled by the non-conductive solid%, bath temperature, pH 控制 and other plating variables. In this example, a co-deposition private barrier material was formed on a copper foil carrier by the following method. 90 grams of deionized water was added to the plating / valley solution. To this was added 3 q grams per liter of alumina having an average particle size of 0.3 μm and alumina powder. The mixture was stirred while stirring. Heat to the plating temperature not shown in Table 1. Use sulfamic acid to adjust the plating solution p Η 値. And copper V from the cathode immersed in 1% H2S04 (water-soluble, liquid) for 30 seconds, and then deionized water Wash thoroughly. This sample is placed in a nickel sulfamate that has been placed. Please read the precautions on the back first. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. ^ 7 ^ ·) Α4 position ⑽Χ 29? ^-
A7 A7 經濟部智慧財產局員工消費合作社印製A7 A7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs
00
TF B7 、發明說明(13 電:二;電鍍室中。藉外部螺動聚,以每分鐘-極,二;;Γ率,使該溶液循環整個室。接附電錄電 層薄ΐ:=Γ,6·。且,c下電鍍之情況中,發現電阻 屬存片弘阻係數爲每方形992歐姆。 :藉由操控—或多個處理參數, 材料固體含量,或是改變所沈積全:曰加 雷阳伤鉍 ~丄 只% I且至屬·^量,改變薄片 以"::者係藉由等比例提高每平方英…秒數加 於藉由攪動、使用表面活性物質與諸如揭示 ::國專:第4,441,965號(其説明書以提及的方式併入本 ::匕其他技術改變。亦可藉由改變浴條件與組成,測 里尸製仔層《電阻直到達成該電阻爲止,實驗獲得所要之 薄片電阻。藉由改變處理參數,已使用印値在2至6範圍 内I溶液、溫度範園爲20至5〇攝氏度數,在每升恒定3〇 克氧化銘與50 ASF電流密度下,製得具有每方形1〇歐姆 至每方形11,700歐姆薄片電阻係數之共沈積層。通常,發 鍍溶液溫度提高會降低電阻層之薄片電阻係數。此效果 於下表1。 在一替代應用方法中,可將不導電粒子置於與陰極緊密 -16 -度適用中國國家標準(CNS)A4規格(210 x?97公f ) 483297 A7 五、發明說明(14 ) 物理接近處,例如作成電鍍電 酸鎳)與不導電粒 貝(在此貫例中爲胺基磺 該漿液下,以^户中^ 口乳化錯)之裝液。然後在不干擾 然後丄中: = =,於陽極與陰極間之間隙。 共沈積層。一…圍,電鍍電阻金屬層以形成該 鍍該陴極全戈二法中’可藉由將不導電粒子置於用以電 、斤# \ η 銅)用之電解質漿液中與該陰極緊密接 近處,而形成電阻共沈積層,施二接 ,枝狀—在此實例中,使用濃mi Cu與7克游離H,S〇夕贫#…、 又馬母升48克 下黏附外子二 溶液,於每平方英呎50安培 下黏附m約6G秒㈣。然後於去離子水中 黏附粒子心銅箱。接著使用如前 ;户 液,使該電阻層置於黏附粒子上。 μ “般岭 可以包括但不受限於電漿噴霧、眞空沈積、盏電 '尤知與濺鍍足其他方式,製造該共沈積層。 接著,可以黏著促進劑、氧化預防劑、 熟知製造電應用銅落者所習知之Α 3或疋 之任一側。 也處理万法,處理該箱 應用 以微差蝕刻方法製造該電阻元件。在此方法中,係以仰 用方式使該互連用之導電軌跡成像與蚀刻。使用_種^ 除一個導電層但實質上不會影響下層電阻層之蚀刻劑^ 仃弟二個成像與蝕刻步驟。此情沅中,係將兩層羯塗嗖於 邵分熱化之環氧樹脂,,預浸料胚”上,並於足以使該環氧杓 -17 ‘紙張尺度適用中國國家標準(CNS)A41^21G χ 297公£)-_ (請先閱讀背面之注意事項再填寫本頁) »:裝 再填寫士 訂-------------^ 經濟部智慧財產局員工消費合作社印製 483297 A7 五、發明說明(15 ) 脂流動與熟化之熱與壓力下層,形成積層物,該兩層 括個導私金屬層,其具有包括共沈積層之閃亮側。 以所要圖型將抗蝕劑材料塗敷於外側表面上,於 =刻劑中蝕刻該積層物,在此實例中,該酸性蚀: :::化銅或氯化鐵。清潔、沖洗並乾燥所形成經㈣1: 塗敷第二種抗蝕劑材料,保護所要導電 刻。然後將該此積層物置於一種含 膏:: 爲過硫酸銨)中,以自上述丑 /(在此貫例中 ^ L入β 4共/尤和電阻凡件去除高度導泰 ,。去留之抗蚀劑材料,然後沖洗與乾燥該板。% I - 1一万法中’使用機械、電或化學機製方法,機製必 要兀件,形成該電阻元件。 鐵製必 訂 雖然已針對特定較佳具體實施例説明並描述本 :很::顯地熟知本技藝者在閱讀與暸解本説喝二 命效交型與修正。本發明包括所有此種落在下述申;1 = 圍之範疇内之等效變型與修正。 申4專利 # 經 濟 部 智 慧 財 產 局 員 工 消 費 合 作 社 印 製 本紙張尺㈣財關 18-TF B7, description of the invention (13 Electricity: two; in the electroplating room. By external screwing together, the solution is circulated throughout the room at min-pole, two; Γ rate. Attached recording layer is thin: = Γ, 6 ·. Moreover, in the case of electroplating under c, it is found that the resistance coefficient of the chip is 992 ohms per square. By manipulation—or multiple processing parameters, the solid content of the material, or changing the total deposition: It is said that Gao Leiyang hurts bismuth ~ 丄 only% I and the amount of ^ ^, change the sheet to "quot ::: by increasing the ratio per square inch ... seconds by adding the same by stirring, using surface-active substances and such as Revelation :: Guozhuan: No. 4,441,965 (the description of which is incorporated in the mentioned manner :: Dagger and other technical changes. You can also change the bath conditions and composition by measuring the resistance in the body until the resistance is reached So far, the desired sheet resistance has been obtained through experiments. By changing the processing parameters, the Neem solution I in the range of 2 to 6 has been used, the temperature range is 20 to 50 degrees Celsius, and the constant 30 grams per liter is oxidized. With a current density of 50 ASF, a sheet having 10 ohms per square to 11,700 ohms per square Co-deposited layer of resistivity. Generally, increasing the temperature of the plating solution will reduce the resistivity of the sheet of resistive layer. The effect is shown in the following table 1. In an alternative application method, non-conductive particles can be placed close to the cathode -16- Applicable to China National Standard (CNS) A4 specification (210 x? 97 male f) 483297 A7 V. Description of the invention (14) Physical proximity, such as electroplated nickel electroplating) and non-conductive granular shell (in this example: Under the slurry of amine sulfide, the solution is filled with ^ in the household ^ mouth emulsified). Then without interference and then: = =, the gap between the anode and the cathode. Co-deposited layer. A ... In order to form the plating method, the non-conductive particles can be placed in close proximity to the cathode by placing non-conductive particles in an electrolyte slurry used for electricity, copper and copper to form a resistance co-precipitation. Lamination, application, branching—in this example, concentrated mi Cu and 7 grams of free H, S〇XI poor #, and 48 grams of horse mother liters adhered to the exosecond solution at 50 per square foot Adhesion m under ampere is about 6G seconds. Then attach the particle core copper box in deionized water. Then use the same solution as before to place the resistive layer on the adhesion particles. μ “The general ridge can include, but is not limited to, plasma spraying, aerial deposition, and lighting, and other methods are well known for sputtering to manufacture the co-deposited layer. Then, adhesion promoters, oxidation preventive agents, and well-known manufacturing methods can be used. Apply either side of A 3 or 所, which is known to those who use copper. Also deal with the method, the box should be used to make the resistance element by the micro-etching method. In this method, the interconnection is used in a downward manner. Imaging and etching of conductive traces. Use _ species ^ an etchant that removes a conductive layer but does not substantially affect the lower resistance layer ^ two imaging and etching steps. In this case, two layers are coated on top of each other. Shao Fen's heat-cured epoxy resin, prepreg embryo "is sufficient to make this epoxy 杓 -17 'paper size applicable to Chinese National Standard (CNS) A41 ^ 21G χ 297 Kg) -_ (please first Read the notes on the reverse side and fill out this page) »: Pack and fill out the book order ------------- ^ Printed by the Intellectual Property Bureau Staff Consumer Cooperative of the Ministry of Economic Affairs 483297 A7 V. Description of Invention (15) The lower layer of heat and pressure of fat flow and maturation forms a laminate. The two layers include a guide Metal layer, which includes a side having a co-deposited layer of shiny. A resist material is applied on the outer surface in the desired pattern, and the laminate is etched in a photoresist. In this example, the acid etch: ::: copper or ferric chloride. Clean, rinse, and dry the resulting warp 1: Apply a second resist material to protect the desired conductive pattern. Then put this layered material in a paste containing: ammonium persulfate), remove the high lead from the above ugly / (in this example ^ L into β 4 Co / Youhe resistors. Go to stay The resist material is then rinsed and dried. The% I-110,000 method uses mechanical, electrical, or chemical mechanism methods that require the necessary components to form the resistance element. Iron must be ordered although it has been targeted for specific comparisons. The specific embodiments illustrate and describe this: very :: obviously familiar with the art of reading and understanding this book and drinking two life effects and corrections. The invention includes all such fall within the scope of the following application; 1 = within the scope of Equivalent Variations and Amendments. 申 4 Patent # Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs.
Claims (1)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US9474698P | 1998-07-31 | 1998-07-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW483297B true TW483297B (en) | 2002-04-11 |
Family
ID=22246935
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW88113100A TW483297B (en) | 1998-07-31 | 1999-07-31 | Composition and method for manufacturing integral resistors in printed circuit boards |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW483297B (en) |
-
1999
- 1999-07-31 TW TW88113100A patent/TW483297B/en not_active IP Right Cessation
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI274355B (en) | Capacitor structure | |
CN105408525B (en) | Surface treatment copper foil, Copper foil with carrier, the manufacturing method of substrate, resin base material, printing distributing board, copper-cover laminated plate and printing distributing board | |
TW199260B (en) | ||
US7472650B2 (en) | Nickel alloy plated structure | |
JP3977790B2 (en) | Manufacturing method of ultra-thin copper foil with carrier, ultra-thin copper foil manufactured by the manufacturing method, printed wiring board using the ultra-thin copper foil, multilayer printed wiring board, chip-on-film wiring board | |
TWI336356B (en) | ||
TW200850107A (en) | Connection terminal, semiconductor package using the same and method of fabricating for semiconductor package | |
JP2007186797A (en) | Method for producing ultrathin copper foil with carrier, ultrathin copper foil produced by the production method, and printed circuit board, multilayer printed circuit board and wiring board for chip on film using the ultrathin copper foil | |
JP2008536292A (en) | Multilayer structure for forming resistors and capacitors | |
JP2005174828A (en) | Wiring conductor forming composite and manufacturing method for wiring substrate using the same, wiring substrate | |
JPS6032311B2 (en) | Electric conductor and its manufacturing method | |
WO2018131962A1 (en) | Carrier-foil-attached ultra-thin copper foil | |
US4724040A (en) | Method for producing electric circuits on a base boad | |
JP2003526196A (en) | Compositions and methods for manufacturing integrated resistors on printed circuit boards | |
CN110301040A (en) | Extra thin copper foil with carrier foils | |
TW201043111A (en) | Sulfuric acid type copper plating liquid for semi-additive plating and method for making a printed circuit board | |
TW483297B (en) | Composition and method for manufacturing integral resistors in printed circuit boards | |
US5158657A (en) | Circuit substrate and process for its production | |
JP2023103401A (en) | Print circuit board and manufacturing method thereof | |
EP1011111A1 (en) | Resistive metal layers and method for making same | |
JP3912310B2 (en) | Anisotropic conductive film | |
JPS6248089A (en) | Metal core circuit board and manufacture thereof | |
JPS62123935A (en) | Manufacture of printed coil | |
JPS5823954B2 (en) | Teiko Taitsuki Kairo Banzai Ryo | |
JPH0649679A (en) | Formation of fine pattern |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GD4A | Issue of patent certificate for granted invention patent | ||
MM4A | Annulment or lapse of patent due to non-payment of fees |