TW478104B - Nitrogen oxide in-situ steam generation process - Google Patents

Nitrogen oxide in-situ steam generation process Download PDF

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TW478104B
TW478104B TW90107287A TW90107287A TW478104B TW 478104 B TW478104 B TW 478104B TW 90107287 A TW90107287 A TW 90107287A TW 90107287 A TW90107287 A TW 90107287A TW 478104 B TW478104 B TW 478104B
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silicon substrate
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TW90107287A
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Guo-Tai Huang
Jiun-Yuan Wu
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United Microelectronics Corp
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Abstract

An ultra-thin nitrogen oxide layer in-situ steam generation process comprises: mounting a silicon substrate in a reaction chamber; introducing N2O and H2 gases into the reaction chamber which is at a pressure lower than 10 Torr; heating the surface of the silicon substrate to a predetermined temperature of about 800 to 1100 DEG C in order to form a silicon nitride layer on the heated surface of the silicon substrate, in which the silicon nitride layer comprises about 1 to 5 atomic % of nitrogen atoms.

Description

478104 五、發明說明(1) 5 - 1發明領域: 本發明係有關於一種用於半導體元件之介電層形成方 法;特別是有關於一種含氮二氧化矽介電層形成方法。 5 - 2發明背景: 積體電路的趨勢係朝向更高操作性能、更快速度及低 價位發展。相應地,元件尺寸的大小亦隨著積體電路技術 的提昇而逐漸縮小化。此一趨勢的發展使得使用超薄介電 層於半導體元件(如金氧半場效電晶體)製造上成為必要。 碎電在。層重 一介予間電當 於極施之介相 位·閘壓極極為 極薄電没閘係 源層當與的體 及一適極薄晶 極以一源更電 汲並當於及效 雜間。成合場 摻之極形接半 高極電係極氧 一汲極道汲金 括與閘通及的 包極性性極速 體源電電源快 晶此導導的更 電於的一淺及 效位開,更型。 場一隔時、小素 半及材極道更因 氧,底電通得響 金上矽極的獲影 材與閘短於的 底層此更對要 厚度在1 0 0埃以下甚至到供〇· 1 3/z m製程使用1 5埃的超 薄介電層(ultra-thin dielectric layer),通常由高品 質的二氧化矽所形成。此超薄二氧化矽層係供做金氧半場478104 V. Description of the invention (1) 5-1 Field of the invention: The present invention relates to a method for forming a dielectric layer for a semiconductor device; in particular, it relates to a method for forming a nitrogen-containing silicon dioxide dielectric layer. 5-2 Background of the Invention: The trend of integrated circuits is toward higher operating performance, faster speeds, and lower prices. Correspondingly, the size of component sizes has gradually decreased with the advancement of integrated circuit technology. The development of this trend necessitates the use of ultra-thin dielectric layers for the fabrication of semiconductor devices such as metal-oxide-semiconductor half-effect transistors. Broken electricity is here. The layer weight is a medium, and the dielectric phase is applied to the pole. The gate voltage is extremely thin. The source layer is a thin layer, and an appropriate thin crystal electrode is more electrically drawn from a source, and is used in the efficiency. . The coupling field is doped with a polar shape connected to a semi-high-polarity electrical system, an oxygen-drain channel, and a gate electrode. The polarized super-speed body source electric power source fast crystal is more conductive and effective. More type. After a short time in the field, the small element and the material are more oxygen-rich. The bottom layer can pass through the photoresist on the upper silicon electrode and the bottom layer is shorter than the bottom layer. The thickness should be less than 100 angstroms or even 0.1. The 3 / zm process uses an ultra-thin dielectric layer of 15 angstroms, which is usually formed of high-quality silicon dioxide. This ultra-thin silicon dioxide layer is used for metal-oxygen half field

第4頁 478104 五、發明說明(2) 效電晶體之閘極介電層使用,一般稱做閘極氧化層。對於 同一閘氧化層材料而言,當其厚度從幾百埃縮小到數十埃 時,一些量子效應如侧穿透(boron penetration)及熱載 子效應皆會產生。對於超薄閘氧化層而言,硼原子可從經 摻雜的多晶矽閘極穿過閘氧化層進入位於其下方的底材’ 引起嚴重的閘極啟始電壓偏移問題。由於熱載子效應於沒 極附近所產生的熱電子亦極易射入超薄閘氧化層,而破壞 閘氧化層及/或Si-SiO接面。不良的接面構造、南缺陷度 、厚度控制不佳及雜質擴散至閘氧化層等因素亦對超薄閘 氧層造成不利影響。此些因素亦嚴重影響半導體元件的操 作性能。 於超薄閘氧化層摻入氮原子已顯示出可抑制硼穿透並 改善S i -S i 0妁接面構造。摻有氮之超薄氧化層(約1 2〜2 0 埃)的品質控制及其製造方法使得將閘氧化層縮小至可供 0. lum製程使用成為可能。傳統的隨同蒸氣產生(in-si tu steam generation) (ISSG )氧化物具有極佳的氧化物品質 。然而,以傳統的隨同蒸氣產生製程,在溫度約9 0 〇°c下 ,製造厚度約1 5埃的超薄閘氧化層,其反應時間僅需丨〇秒 。傳統的I S S G製程反應極為快速,以致在所形成超薄閑氧 層厚度(小於15埃)的控制上,極為不易。再者,傳統 I S S G製程所製造的閘氧化層為純粹閘氧化層,無法抑制石朋 穿透及熱電子射入閘氧化層中。因此,傳統的丨SSG製程益 法提供適用於0 · 1 3 u m製程或甚至更新一代製程,如 …、 478104 五、發明說明(3) ,厚度約1 2〜2 0埃的超薄閘氧化層。 據此,亟待提供一種一氧化二氮隨同蒸氣產生製程( N 2〇 in - situ steam generation process) ( N20 - ISSG process),其可提供適用於0_ 1 3 um製程,甚至更新一代製 程的超薄閘極介電層。 5 - 3發明目的及概述: 種 本發明之主要目的係提供一種一氧化-氣 ^ —虱隨同蒗盔 生製程(N2〇-ISSG process},以形成超薄的氣化 二、乳產 ISS(;製 ,ultra-thin nitrided gate oxide)。此 閑氧化層 程 使用N 2〇及Η做為反應氣體,以形成一超薄的氮 於一矽底材上。此超薄的氮化閘氧化層含有,化閘氧化層 區域及其與碎底材的接面區域,以致可抑原子於表面 子效應所產生的熱電子射入此閘氧化層。 牙透及熱栽 本發明之另一目的係提供一種一氧化一 ~ 生製程,其係利用Νζ0及Η做為反應氣體^隨同蒸氣產 形成一超薄的氮化閘氧化層。此ΝΑ—ISSG^ 一矽底材上 度下進行’並且其反應速度較傳統的ISSG. ^可在更高溫 因此 空間 此N2〇-ISSG製程較傳統的ISSG製程具有更寬^ %慢。 processwindow)。 見的製裎Page 4 478104 V. Description of the invention (2) The gate dielectric layer of an effect transistor is generally called a gate oxide layer. For the same gate oxide material, when its thickness is reduced from several hundred angstroms to several tens angstroms, some quantum effects such as side penetration (boron penetration) and hot carrier effects will occur. For an ultra-thin gate oxide layer, boron atoms can pass through the gate oxide layer from the doped polycrystalline silicon gate and enter the substrate below it, causing a serious gate-starting voltage shift problem. The hot electrons generated near the anode due to the hot carrier effect are also very easy to shoot into the ultra-thin gate oxide layer, and destroy the gate oxide layer and / or the Si-SiO junction. Factors such as poor junction structure, south defect, poor thickness control, and impurity diffusion to the gate oxide layer also adversely affect the ultra-thin gate oxide layer. These factors also seriously affect the operational performance of semiconductor devices. Incorporation of nitrogen atoms into the ultra-thin gate oxide layer has been shown to inhibit boron penetration and improve the S i -S i 0 妁 junction structure. The lum oxide process is made possible by the quality control of the ultra-thin oxide layer (approximately 12 to 20 angstroms) doped with nitrogen and its manufacturing method. Traditional in-situ steam generation (ISSG) oxides have excellent oxide quality. However, in the traditional accompanying steam generation process, at a temperature of about 900 ° C, an ultra-thin gate oxide layer with a thickness of about 15 Angstroms is manufactured, and the reaction time only takes 丨 0 seconds. The traditional I S S G process is extremely fast, making it extremely difficult to control the thickness of the formed ultra-thin free oxygen layer (less than 15 angstroms). In addition, the gate oxide layer manufactured by the traditional I S S G process is a pure gate oxide layer, and it is impossible to inhibit the penetration of hot stones and the injection of hot electrons into the gate oxide layer. Therefore, the traditional 丨 SSG process benefits method is applicable to 0 · 1 3 um process or even a newer generation process, such as ..., 478104 V. Description of the invention (3), ultra-thin gate oxide layer with a thickness of about 12 to 20 angstroms . Accordingly, there is an urgent need to provide a nitrous oxide along with steam generation process (N 2〇in-situ steam generation process) (N20-ISSG process), which can provide ultra-thin for 0_ 1 3 um process, and even newer generation processes Gate dielectric layer. 5-3 Purpose and summary of the invention: The main purpose of the present invention is to provide a nitric oxide-qi ^-lice accompanied by the N20-ISSG process to form ultra-thin gasification II, dairy ISS ( ;, Ultra-thin nitrided gate oxide). This idle oxidation layer uses N 2 0 and rhenium as reactive gases to form an ultra-thin nitrogen on a silicon substrate. This ultra-thin nitrided gate oxide layer Contains the region of the gate oxide layer and its interface with the broken substrate, so that the hot electrons generated by the atomic surface effect can be suppressed from entering the gate oxide layer. Tooth penetration and hot planting Another object of the present invention is Provided is a process of nitric oxide and oxidation, which uses Νζ0 and Η as reaction gases ^ to form an ultra-thin nitride gate oxide layer along with steam production. This NA-ISSG ^ is performed on a silicon substrate, and its The reaction speed is higher than the traditional ISSG. ^ It can be at a higher temperature, so the space of this N20-ISSG process is wider than the traditional ISSG process. ^% Slower. Processwindow). See the system

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478104 五、發明說明(4) 根據以上所述之目的,本發明提供一種一氧化二氮隨 同蒸氣產生製程(n2o-issg),以形成一超薄的氮化閘氧化 層於此矽底材上,供做閘極介電層使用。此N 20- I SSG製程 包括置放一矽底材於一反應室中,及將含有N 20及Η A混合 氣體送入此反應室内。之後,將石夕底材之表面加熱至一預 定溫度,以形成一氮化二氧化矽層於矽底材經加熱的表面 上。此氮化二氧化矽層含有氮原子於表面區域及其與矽底 材的接面區域,此些氮原子可抑制來自摻雜的多晶矽閘極 的硼穿透及熱載子效應所產生的熱電子射入此氮化閘氧化 層。 本發明之目的及諸多優點藉φ以下具體實施例之詳細 說明,並參照所附圖式,將趨於明瞭。 5 - 4具體實施例之詳細說明: 第一圖為施行本發明之一快速加熱製程反應室(r a p i d thermal process chamber) 1 0 0 之截面示意圖。一單片 晶圓,例如一矽底材1 0 1 ,係放置於此快速加熱製程反 應室1 0 0中之一承載盤上。反應氣體N 20及Η #經由一氣 體入口 1 0 2送入此快速加熱製程反應室1 0 0。殘餘的 氣體係經由一氣體出口 1 0 3抽出。478104 V. Description of the invention (4) According to the above-mentioned purpose, the present invention provides a process for generating nitrous oxide with steam (n2o-issg) to form an ultra-thin nitride gate oxide layer on the silicon substrate. For gate dielectric layer. The N 20- I SSG process includes placing a silicon substrate in a reaction chamber, and sending a mixed gas containing N 20 and ΗA into the reaction chamber. After that, the surface of the Shixi substrate is heated to a predetermined temperature to form a silicon nitride layer on the heated surface of the silicon substrate. This nitrided silicon dioxide layer contains nitrogen atoms in the surface area and the interface area with the silicon substrate. These nitrogen atoms can suppress the heat generated by the penetration of boron from the doped polycrystalline silicon gate and the thermal carrier effect. Electrons are injected into this nitride gate oxide layer. The purpose and many advantages of the present invention will become clearer through the detailed description of the following specific embodiments and with reference to the accompanying drawings. 5-4 Detailed description of specific embodiments: The first figure is a schematic cross-sectional view of a rapid thermal process chamber 1 0 0 in which one of the rapid heating process chambers of the present invention is implemented. A single wafer, such as a silicon substrate 100, is placed on a carrier plate in the rapid heating process reaction chamber 100. The reaction gas N 20 and Η # are sent to the rapid heating process reaction chamber 100 through a gas inlet 10 2. The residual gas system is withdrawn through a gas outlet 103.

478104478104

五、發明說明(5) 隨同具體實 乂 征 I Μ 20-I SSG process )的掣招、、亡 < 匕 驟2 0 0 ’係將具有清潔表面的;】:。在步 0 材 0 加”程反應室1〇 "。在步驟2〇;〇2:於快速 广體係送入屋力低於1 〇托的快速加熱製。2〇及Η之 0之内。此混合氣體主要包含…室:! 率:…%。在步驟2〇2,將石夕底材/"有?轰體比 加熱至溫度約8 〇。〜1 1。。t:。在步驟2 „表面 1 : 1經加熱的表面誘發如下述反應式=3,底 :產生氧原子(0)及一氧化氮 二於”生 1之表面上。然後,如第三圖所示,_ΐί::底材1 〇Xynitride)(Si〇2、Nx)1 〇 4 形成於石夕底夕層( 的表面上,其可供做閘極 〇 1經加熱 …係由-氧化氮"。"由基吏:氧 成:藉此一 n2〇-ISSG製程,在約1〇5〇。」度〇)下所形形成 2 0秒或更長。 戶斤而要的反應時間約 H2 + Μ — H20 +NCT + 0* + 0H* +其它物種(n 以傳統的.ISSG製程形成厚度約工5埃的超薄閘氧化層 ,其反應時間僅為1 0秒。若欲形成超薄閘極介電層(^ 1 5埃)’本發明之NgO-ISSG製程較之傳統的ISSG製程具 有較慢的反應速度。因此,對於形成超薄的閘極介電層而 478104 五、發明說明(6) 言,本發明之N20-ISSG製程較之傳統的ISSG製程可提供更 好的厚度控制。 如第三圖所示,以本發明N20-ISSG製程形成的氮氧化 矽層1 0 4具有氮含量約1〜5 atomic%。因此,此氮氧 化矽層1 0 4在表面區域及與矽底材1 0 1之接面區域具 有氮含量約1〜5 a t 〇 m i c%。此些氮原子可抑制來自摻雜 的多晶矽閘極的硼穿透及熱載子效應所產生的熱電子射入 供做閘介電層使用之氮氧化矽層1 0 4。在氮氧化矽層1 0 4内所含有的1〜5 atomic%氮含量亦可提高此氮氧化 矽層1 0 4之介電常數,進而提高使用此氮氧化矽層1 0 4做為其閘極介電層的金氧半場效電晶體元件的操作性能 在本發明另一較佳具體實施例中,於進行本發明一氧 化二氮隨同蒸氣產生製程(N 20- I SSG pr 〇c e s s)之前,係 在矽底材1 0 1表面上先進行氮化反應(nitridation)。 Ο· 一私/土目麵杳说丨么」* HU奈紹An筮TO園辦士。力舟•驟4 478104 五、發明說明(7) 約5 0 0〜8 0 0 °C溫度及約1〜3托的壓力下,使用Η 2 / Ν傲為反應氣體。在步驟4 0 2 ,包含Ν 20及Η夂混合氣 體係送入壓力低於1 0托的快速加熱製程反應室1 〇 〇之 478104 五、發明說明(8) 根據上文所述,本發明一氧化二氮隨同蒸氣產生製程 (N20-ISSG process)可提供具有良好厚度控制之超薄閘 極介電層($ 1 5埃),如超薄氮氧化矽層。此超薄閘極 介電層可有效地抑制量子效應,如硼穿透及熱載子效應。 本發明之一氧化二氮隨同蒸氣產生製程亦使更高溫度之控 制(高於1 0 0 0 °C )成為可行。因此,本發明一氧化二 氮隨同蒸氣產生製程較之傳統的I SSG製程具有更寬的製程 空間。V. Description of the invention (5) With the implementation of the specific implementation (IM 20-I SSG process), it will have a clean surface;] :. In step 0, the material is added to the reaction chamber 10, and in step 20, the rapid heating system with a housing force of less than 10 Torr is fed into the rapid wide system. Within 20 and 0. This mixed gas mainly contains the… chamber :! Rate:…%. In step 202, the Shixi substrate is heated to a temperature of about 80. ~ 1 1. t: in the step 2 „Surface 1: Induced by heating the surface as shown in the following reaction formula = 3, the bottom: the generation of oxygen atoms (0) and nitric oxide on the surface of“ sheng 1. ”Then, as shown in the third figure, _ΐί: : Substrate 1 〇Xynitride) (Si〇2, Nx) 1 〇4 is formed on the surface of the stone xixi layer (), which can be used as the gate 〇1 after heating ... by -nitrogen oxide ". &Quot; From the official: Oxygenation: Formed in an n2O-ISSG process at about 1050 °° C for 20 seconds or longer. The reaction time required by the household is about H2 + M — H20 + NCT + 0 * + 0H * + other species (n. The traditional .ISSG process forms an ultra-thin gate oxide layer with a thickness of about 5 Angstroms, and the reaction time is only 10 seconds. If an ultra-thin gate dielectric layer is to be formed (^ 15 Angstroms), the NgO-ISSG process of the present invention has a slower response speed than the traditional ISSG process. Therefore, it is necessary to form an ultra-thin gate electrode. Dielectric layer 478104 V. Description of the invention (6) The N20-ISSG process of the present invention can provide better thickness control than the traditional ISSG process. As shown in the third figure, it is formed by the N20-ISSG process of the present invention. The silicon oxynitride layer 104 has a nitrogen content of about 1 to 5 atomic%. Therefore, the silicon oxynitride layer 104 has a nitrogen content of about 1 to 5 in the surface area and the interface area with the silicon substrate 1 0 1. at 〇mic%. These nitrogen atoms can inhibit boron penetration from the doped polycrystalline silicon gate and hot electrons generated by the hot carrier effect from entering the silicon oxynitride layer used as the gate dielectric layer 104. The 1 ~ 5 atomic% nitrogen content contained in the silicon oxynitride layer 104 can also increase the dielectric constant of the silicon oxynitride layer 104. And to improve the operation performance of the gold-oxygen half field effect transistor using the silicon oxynitride layer 104 as its gate dielectric layer. In another preferred embodiment of the present invention, Prior to the steam generation process (N 20- I SSG pr 〇cess), the nitridation reaction was performed on the surface of the silicon substrate 1 0 1. 〇 · 一 私 / 土 面面 说 丨 么 ”* HU Master of An 筮 TO Garden in Nai Shao. Lizhou • Step 4 478104 V. Description of the Invention (7) Use a temperature of about 5 0 ~ 80 0 ° C and a pressure of about 1 ~ 3 Torr. Reaction gas. In step 4 2, the system containing N 20 and krypton mixed gas is sent into the reaction chamber 1 of the rapid heating process with a pressure lower than 10 Torr 478104. 5. Description of the invention (8) According to the above, The nitrous oxide of the present invention along with the steam generation process (N20-ISSG process) can provide an ultra-thin gate dielectric layer ($ 15 Angstrom) with good thickness control, such as an ultra-thin silicon oxynitride layer. This ultra-thin gate The dielectric layer can effectively suppress quantum effects, such as boron penetration and hot carrier effects. Nitrous oxide, one of the present inventions, is produced with steam. Process may also be controlled so that higher temperatures (greater than 1 0 0 0 ° C) feasible. Thus, the present invention is a steam generator along with nitrous oxide processes than the traditional process I SSG process having a wider space.

478104 圖式簡單說明 第一圖係用以施行本發明之一快速加熱製程反應室之 截面不意圖, 第二圖係本發明一較佳具體實施例之流程圖; 第三圖係根據第二圖流程所製造的氮化二氧化矽構造 的截面示意圖; 第四圖係本發明另一較佳具體實施例之流程圖;及478104 The diagram is briefly explained. The first diagram is not intended to implement the cross-section of the reaction chamber of a rapid heating process of the present invention. The second diagram is a flowchart of a preferred embodiment of the present invention. A schematic cross-sectional view of a silicon nitride dioxide structure manufactured by the process; the fourth diagram is a flowchart of another preferred embodiment of the present invention; and

第五圖係根據第四圖流程所製造之氮氧化矽層之氮含 量相對石夕底材深度之關係圖。 主要部分之代表符號: 10 0 快速加熱製程反應室 101 矽底材 10 2 氣體入口 10 3 氣體出口 10 4 氮氧化矽層The fifth graph is a graph showing the relationship between the nitrogen content of the silicon oxynitride layer and the depth of the Shixi substrate according to the process of the fourth graph. Main symbols: 10 0 Rapid heating process reaction chamber 101 Silicon substrate 10 2 Gas inlet 10 3 Gas outlet 10 4 Silicon oxynitride layer

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Claims (1)

478104 六、申請專利範圍 1 . 一種氮化氧化物之隨同(i η - s i t u )蒸氣產生製程,其至 少包括: 加熱一矽底材之一表面至一預定溫度,並曝露該矽底 材經加熱的該表面於一混合氣體中,該混合氣體係送入一 反應室中,並且包含有N 20及Η 2,藉此形成一二氧化矽層於 該矽底材經加熱的該表面上,該二氧化矽層含有氮。 2. 如申請專利範圍第1項之製程,其中上述之混合氣體主 要包含有Ν 2〇。 3. 如申請專利範圍第2項之製程,其中上述之混合氣體包 含有氣體比率低於1 %的Η 2。 4. 如申請專利範圍第1項之製程,其中上述之混合氣體係 送入壓力低於1 0托的該反應室中。 5. 如申請專利範圍第1項之製程,其中上述之預定溫度約 8 0 0 〜1100〇C。 6. 如申請專利範圍第1項之製程,其中上述之二氧化矽層 之厚度少於1 5埃。 7. 如申請專利範圍第1項之製程,其中上述之二氧化矽層 之氮含量約1〜5 atomic%。478104 VI. Application for Patent Scope 1. A process for generating nitride oxide accompanying (i η-situ) vapor, which at least includes: heating a surface of a silicon substrate to a predetermined temperature, and exposing the silicon substrate to heat The surface is in a mixed gas, the mixed gas system is sent to a reaction chamber, and contains N 20 and Η 2, thereby forming a silicon dioxide layer on the heated surface of the silicon substrate, the The silicon dioxide layer contains nitrogen. 2. If the process of item 1 of the scope of patent application is applied, the above-mentioned mixed gas mainly contains N 2O. 3. If the process of item 2 of the scope of patent application is applied, the above mixed gas package contains Η 2 with a gas ratio of less than 1%. 4. For the process of claim 1 in the scope of patent application, wherein the above mixed gas system is sent to the reaction chamber with a pressure lower than 10 Torr. 5. For the process of applying for the first item of the patent scope, wherein the predetermined temperature mentioned above is about 800 ~ 1100 ° C. 6. If the process of item 1 of the patent scope is applied, the thickness of the above silicon dioxide layer is less than 15 angstroms. 7. For the process of claim 1 in the scope of patent application, wherein the nitrogen content of the above silicon dioxide layer is about 1 ~ 5 atomic%. 478104 六、申請專利範圍 8. 如申請專利範圍第1項之製程,其中上述之二氧化矽層 表面之氮含量約1〜5 atomic%。 9. 如申請專利範圍第1項之製程,其中上述之二氧化矽層 與該石夕底材接面之氮含量約1〜5 a t 〇 m i c %。 1 0 .如申請專利範圍第1項之製程,更包含於進行該隨同蒸 氣產生製程之前,施行氮化反應於該$夕底材之該表面上。478104 6. Scope of patent application 8. If the process of item 1 of the scope of patent application is applied, the nitrogen content on the surface of the above silicon dioxide layer is about 1 ~ 5 atomic%. 9. For the process of applying for the item 1 in the scope of patent application, wherein the nitrogen content at the interface between the above silicon dioxide layer and the Shixi substrate is about 1 ~ 5 a t 0 m i c%. 10. The process of item 1 in the scope of patent application further includes performing a nitriding reaction on the surface of the substrate before performing the accompanying steam generation process. 11.如申請專利範圍第1 0項之製程,其中上述之氮化反應 係藉由以N Η 3當做反應氣體之快速加熱製程進行。 1 2 .如申請專利範圍第1 0項之製程,其中上述之氮化反應 係藉由在約5 0 0〜8 0 0°C之溫度及壓力約1〜3托下,使用Η 2/ Ν 2 做為反應氣體之遙控式電漿氮化反應(remote plasma nitridation )進行。 1 3. —種形成一氮化二氧化矽層於一矽底材上之隨同蒸11. The process of item 10 in the scope of patent application, wherein the above-mentioned nitriding reaction is performed by a rapid heating process using NΗ3 as a reaction gas. 1 2. According to the process of item 10 in the scope of patent application, wherein the above-mentioned nitriding reaction is performed by using Η 2 / Ν at a temperature and pressure of about 500 to 800 ° C and about 1 to 3 Torr. 2 Remote plasma nitridation as a reaction gas. 1 3. —A kind of silicon nitride layer formed on a silicon substrate for subsequent evaporation 氣產生製程,其至少包括: 置放該矽底材於一反應室中; 將包含N 20及Η &混合氣體送入該反應室中;及 加熱該矽底材之一表面至一預定溫度,以使該氮化二 氧化矽層形成於該矽底材經加熱的該表面上。A gas generation process, which includes at least: placing the silicon substrate in a reaction chamber; sending a mixed gas containing N 20 and Η & into the reaction chamber; and heating a surface of the silicon substrate to a predetermined temperature So that the silicon nitride oxide layer is formed on the heated surface of the silicon substrate. 第14頁 478104 六、申請專利範圍 1 4.如申請專利範圍第1 3項之製程,其中上述之混合氣體 主要包含N 20。 1 5.如申請專利範圍1 4項之製程,其中上述之混合氣體包 含有氣體比率低於1%的Η 2。 1 6 .如申請專利範圍第1 3項之製程,其中上述之混合氣體 係送入壓力低於1 0托的該反應室中。 1 7.如申請專利範圍第1 3項之製程,其中上述之預定溫度 約 8 0 0 〜1100〇C。 1 8.如申請專利範圍第1 3項之製程,其中上述之二氧化矽 層之厚度少於1 5埃。 1 9 .如申請專利範圍第1 3項之製程,其中上述之二氧化矽 層之氮含量約1〜5atomic%。 2 0 .如申請專利範圍第1 3項之製程,其中上述之二氧化矽 層表面之氮含量約1〜5atomic%。 2 1.如申請專利範圍第1 3項之製程,其中上述之二氧化矽 層與該矽底材接面之氮含量約1〜5 a t 〇 m i c %。Page 14 478104 6. Scope of patent application 1 4. According to the process of item 13 of the scope of patent application, the above-mentioned mixed gas mainly includes N20. 1 5. The process according to item 14 of the scope of patent application, wherein the above mixed gas package contains Η 2 with a gas ratio of less than 1%. 16. The process according to item 13 of the scope of patent application, wherein the above mixed gas is sent to the reaction chamber with a pressure lower than 10 Torr. 1 7. The process according to item 13 of the scope of patent application, wherein the above-mentioned predetermined temperature is about 800 ~ 1100 ° C. 18. According to the process of claim 13 in the scope of patent application, wherein the thickness of the above-mentioned silicon dioxide layer is less than 15 angstroms. 19. The process according to item 13 of the scope of patent application, wherein the nitrogen content of the above silicon dioxide layer is about 1 to 5 atomic%. 20. The process of item 13 in the scope of patent application, wherein the nitrogen content on the surface of the silicon dioxide layer is about 1 to 5 atomic%. 2 1. The process according to item 13 of the scope of the patent application, wherein the nitrogen content at the interface between the silicon dioxide layer and the silicon substrate is about 1 to 5 atm. 第15頁 478104 六、申請專利範圍 2 2 .如申請專利範圍第1 3項之製程,更包含於將該混合氣 體送入該反應室之前,施行氮化反應於該矽底材之該表面 上。 2 3 .如申請專利範圍第2 2項之製程,其中上述之氮化反應 係藉由以NH 3當做反應氣體之快速加熱製程進行。 2 4.如申請專利範圍第2 2項之製程,其中上述之氮化反應 係藉由在約5 0 0〜8 0 0°C之溫度及壓力約1〜3托下,使用Η 2/ N 做為反應氣體之遙控式電漿氮化反應(remote plasma nitridation)進行 〇Page 15 478104 VI. Application scope of patent 2 2. The process of item 13 of the scope of patent application further includes performing nitriding reaction on the surface of the silicon substrate before sending the mixed gas into the reaction chamber. . 2 3. The process of item 22 in the scope of patent application, wherein the above-mentioned nitriding reaction is performed by a rapid heating process using NH 3 as a reaction gas. 2 4. The process of item 22 in the scope of patent application, wherein the above-mentioned nitriding reaction is performed by using Η 2 / N at a temperature and pressure of about 500 to 800 ° C and a pressure of about 1 to 3 Torr. Remote plasma nitridation as a reaction gas. 第16頁Page 16
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