TW478097B - Manufacture method of barrier layer with sandwich structure - Google Patents
Manufacture method of barrier layer with sandwich structure Download PDFInfo
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- TW478097B TW478097B TW89122418A TW89122418A TW478097B TW 478097 B TW478097 B TW 478097B TW 89122418 A TW89122418 A TW 89122418A TW 89122418 A TW89122418 A TW 89122418A TW 478097 B TW478097 B TW 478097B
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Abstract
Description
4/5UV/ 五、發明說明(1) 本發明係有關於一滁/苴泛t 別有關於-種在積體電;*ϋ形成阻障層的方法,特 的方法。 電路製程中製造具夾層結構之阻障層 •fei,於ί 5 :'夏熱穩定性及良好的導電性,耐火全屬好 料之氮化物(氮化鈦、氣彳μ如 卜 、 金屬材 ., lrfc 乳化叙、氮化鶴)是現今穑,Φ妨 製程常用之擴散阻障層姑粗& A # U丨 體電路4 / 5UV / V. Description of the invention (1) The present invention relates to a 滁 / 苴 t t, especially about a kind of integrated electricity; * ϋ a method of forming a barrier layer, a special method. Manufacture of barrier layer with sandwich structure in circuit manufacturing process • fei, Yu ί 5: 'Summer heat stability and good electrical conductivity, refractory are all good nitrides (titanium nitride, gas 彳 μRu, metal materials ., lrfc, emulsification, nitrided crane) are the most common diffusion barriers used in the manufacturing process nowadays & A # U 丨 bulk circuit
d ^ ^ 早復材科,但此種材料應用上有一 A I ’即相5谷易形成柱狀晶體結構(如第1圖所示),此 柱狀晶體結構為阻障金屬之快速 1 障能力降低,元件特性破壞。 、攻阻障層阻 有鑑於此,本發明之目的在提供一種具薄夾層之 金=層結構,作為積體電路製程中之阻障層,以阻絕 化製程時金屬之擴散。 金屬 為達成上述目的,本發明提出一種具薄夾層之氮 ▲ ,層(氮化鈦、氮化钽、氮化鎢)結構,作為積體電路制 斧壬中之阻障層,以阻絕銅金屬化製程時銅金屬之擴散。= 方法透過在傳統之氮化金屬層沉積時,藉由薄金屬層 (^鈦^、纽、鎢)或氮氧化金屬層(氮氧化鈦、氮氧化^、 氮氧化鎢)之介入,而將原氮化金屬層一分為二、三戈 等。就晶體結構而言,由於晶體結構上之較大差異,此# 爽層可將原單一氮化金屬層柱狀晶體結構之連續性破壞寻 而呈現多層晶界相互錯開氮化金屬層,延長並轉折鋼金屬 之擴散路徑,降低銅金屬之擴散破壞。氮化金屬層、金屬 層及氮氧化金屬層可透過濺鍍製程時濺鍍氣氛之改變,而 在同一沉積系統内進行。d ^ ^ Early Composite Materials, but this material has an AI 'that phase 5 valleys easily form a columnar crystal structure (as shown in Figure 1), this columnar crystal structure is a fast barrier ability of barrier metals Degraded, and element characteristics are deteriorated. In view of this, the object of the present invention is to provide a gold-layer structure with a thin interlayer as a barrier layer in the integrated circuit manufacturing process to prevent the diffusion of metal during the manufacturing process. In order to achieve the above-mentioned object, the present invention proposes a structure with a thin interlayer of nitrogen ▲, (titanium nitride, tantalum nitride, tungsten nitride) as a barrier layer in an integrated circuit system to block copper metal. Copper metal diffusion during the chemical process. = Method: Through the deposition of a traditional metal nitride layer, through the intervention of a thin metal layer (^ titanium ^, button, tungsten) or a metal oxynitride layer (titanium oxide, nitrogen oxide ^, tungsten oxynitride), The original nitrided metal layer is divided into two and three layers. As far as the crystal structure is concerned, due to the large difference in crystal structure, this #reflective layer can find the continuity of the columnar crystal structure of the original single nitrided metal layer and show multiple layers of grain boundaries staggering the nitrided metal layer, extending and Turn the diffusion path of steel metal to reduce the diffusion damage of copper metal. The metal nitride layer, the metal layer, and the metal oxynitride layer can be changed in the same deposition system through the change of the sputtering atmosphere during the sputtering process.
第4頁 478097 五、發明說明(3) 阻絕金屬化製程時金屬之擴散。請參M2至4圖,其顯示 本發明之貫施例中,一種具夾層結構之阻障層之製造方 法。 J f閱第2圖,本實施例適用於一基底,此基底包括 Γ置區,金屬内連線1〇〇,在此以下層金屬内連線 100為例,此外,於下層金屬内連線1〇〇表面則另形成有〆 平坦化之内層金屬介電層(IMD)或内層絕緣層(ild)ii〇, 在此以内層金屬介電層(IMD)為例,而常用的内金屬介電 層材料則包括一層或數層之氧化矽、硼矽玻璃、硼磷矽玻 璃或是低介電係數材料(如FLARE、pAE-2、FSG、hsq等)。 其中由於目前在銅導線的製作上是以鑲嵌式 (damascene)製程來解決銅金屬的蝕刻不易的問題,因此 方法之一是先在平坦的内層金屬介電層nQ上蝕刻出曝露 下層金屬内連線100表面之溝槽(或更包括蝕刻介層 窗)120。 接著请苓閱第3圖,順應性形成一氮化金屬層丨3 〇,如 氮化鈦、。氮化鈕或氮化鎢丨30。然後請參閱第4圖,形成厚 度在ΙΟΟ^Αγ内之薄金屬層140,如鈦、钽、鎢或氮氧化金屬 層,=氮氧化鈦、氮氧化鈕、氮氧化鎢,而將原氮化金屬 層刀為一、二或四等,可在同一系統内之同一濺鍵腔體 ,二濺鍍腔體進行,藉由於同_濺鍍沉積製程中,濺鍍氣 氛由(Ar,Ν2)調整成(Ar)或(Ar,Ν2,02)再變回 (Ar,Ν2)或再調整成(Ar)或(Ar,化,〇2)再變回(Ar, N2) ......•’如氮化鈦阻障層,其可藉由薄鈦夾層或薄氮氧Page 4 478097 V. Description of the invention (3) Prevent metal diffusion during metallization process. Please refer to M2 to FIG. 4, which show a manufacturing method of a barrier layer with a sandwich structure in the embodiment of the present invention. As shown in FIG. 2, this embodiment is applicable to a substrate. The substrate includes a Γ region, and the metal interconnects are 100. Here, the metal interconnects in the lower layer 100 are taken as an example, and the metal interconnects in the lower layer. On the surface, a flattened inner metal dielectric layer (IMD) or an inner insulating layer (ild) is formed on the surface. Here, the inner metal dielectric layer (IMD) is used as an example, and the commonly used inner metal dielectric layer (IMD) is used as an example. Electrical layer materials include one or more layers of silicon oxide, borosilicate glass, borophosphosilicate glass, or low dielectric constant materials (such as FLARE, pAE-2, FSG, hsq, etc.). Among them, since the damascene process is used to solve the problem of difficult etching of copper metal in the production of copper wires, one of the methods is to first etch out the underlying metal interconnections on the flat inner metal dielectric layer nQ. Trenches (or more including etched vias) 120 on the surface of the line 100. Next, please refer to Figure 3 and conformally form a metal nitride layer such as titanium nitride. Nitriding button or tungsten nitride 丨 30. Then refer to FIG. 4 to form a thin metal layer 140, such as titanium, tantalum, tungsten, or a metal oxynitride layer, with a thickness of 100 ^ Αγ. The metal layer knife is one, two, or four, etc., which can be performed in the same sputtering key cavity and two sputtering chambers in the same system. Due to the same sputtering deposition process, the sputtering atmosphere is adjusted by (Ar, Ν2) Into (Ar) or (Ar, N2, 02) and then back to (Ar, N2) or adjusted to (Ar) or (Ar, N2, 02) and then back to (Ar, N2) ... • 'As a titanium nitride barrier layer, it can be made by a thin titanium interlayer or a thin nitrogen oxide
HiHi
第6頁 0522-5702TW-ptd 478097 五、發明說明(4) 化欽爽層=入於原來之氮化鈦阻障層内,即可造成如第4 圖之具:薄失層或具二、三……·薄夾層之阻障層結構。 上述阻障層製作方法同時可應用於鋁導線及鎢栓塞 (W-plug)製程中。 ^ 第5圖t為穿透式電子顯微鏡分析照片,第5A圖是傳統 氣化欽阻障層,第5B圖是具夾層鈦之氮化鈦阻障層,顯示 透過薄爽層鈦,可成功形成一氮化鈦(上層)/薄夾層鈦/氮 化欽(下層)阻障層,在此結構中,原單一氮化鈦層桎狀晶 體結構之連續性被破壞,而呈現多層晶界相互錯開之氮化 鈦金屬層。 第6圖是漏電流分析圖,由接面漏電流分析,顯示在 溫,5 5 0 C ’ 3 0分鐘之退火熱處理破壞考驗後,銅在傳統 之氮化鈦阻障層會產生較大漏電流(第6 A圖),這是歸因 於,擴散至石夕基材中。相對而言,第6β圖的具(雙)夾層鈦 之氣化欽阻障層結構中,仍維持相當低之漏電流,顯示其 阻障能力之明顯提昇。 第7圖是片電阻值分析圖,於不同溫度3〇分鐘之退火 熱處理破壞考驗後之片電阻值分析,同樣顯示具夾層鈦之 氮化鈦阻P早層具有較高的熱穩定性。 第8圖為裝1/阻障層/矽基材結構於6〇(rc、3〇分鐘之退 火熱處理破壞考驗後之掃瞄式電子顯微鏡分析照片,傳統 氮化鈦阻卩早層中,會呈現明顯之破壞(第8 A圖)。相對而 έ ’具炎層欽之氮化鈦阻障層具有較高的熱穩定性或完整 性(第8Β圖)。Page 6 0522-5702TW-ptd 478097 V. Description of the invention (4) The fluorinated layer = into the original titanium nitride barrier layer, which can result in a thin layer as shown in Figure 4: Three ... · Barrier structure of thin interlayer. The above method for manufacturing the barrier layer can be applied to both aluminum wires and tungsten plugs (W-plug). ^ Figure 5 t is a transmission electron microscope analysis picture, Figure 5A is a traditional gasification barrier layer, and Figure 5B is a titanium nitride barrier layer with interlayer titanium, showing that a thin layer of titanium can be successfully used. A barrier layer of titanium nitride (upper layer) / thin interlayer titanium / nitrium (lower layer) is formed. In this structure, the continuity of the 单一 -shaped crystal structure of the original single titanium nitride layer is destroyed, and multiple grain boundaries are present. Staggered titanium nitride metal layers. Figure 6 is the leakage current analysis chart. The analysis of the leakage current at the junction shows that at the temperature of 5 50 C '30 minutes after the annealing heat treatment failure test, copper will have a larger leakage in the traditional titanium nitride barrier layer. The current (Figure 6 A) is due to the diffusion into the Shixi substrate. Relatively speaking, in the structure of the gasification barrier layer with (double) interlayer titanium shown in Fig. 6β, the leakage current is still kept very low, which shows that its barrier ability is significantly improved. Figure 7 is a sheet resistance value analysis chart. The sheet resistance value analysis after annealing heat treatment at different temperatures for 30 minutes has also shown that the early layer of titanium nitride resist P with interlayer titanium has high thermal stability. Figure 8 is a scanning electron microscope analysis photo of the 1 / barrier layer / silicon substrate structure after the annealing treatment at 60 ° C and 30 minutes. Shows obvious damage (Figure 8A). Relatively, the titanium nitride barrier layer with inflammation layer has higher thermal stability or integrity (Figure 8B).
0522-5702TW*ptd0522-5702TW * ptd
478〇97 發明說明(5) 第9圖為銅/阻障層/矽基材結構於退火熱處理破壞考 驗後之歐傑電子縱深成分分析圖,歐傑電子分析顯示於退 :熱處理實驗後,纟夾層鈦之氮化鈦阻障層能減 之間的相互擴散。 y 雖然本發明已以較佳實 限定本發明,任何熟習此項去路上,、然其並非用以 神和範圍内,當可作更動與、云,在不脫離本發明之精 當視後附之申請專利範圍=飾,因此本發明之保護範圍 @ W界定者為準。478〇97 Description of the invention (5) Figure 9 shows the depth analysis of Auje Electronics after the copper / barrier layer / silicon substrate structure has been damaged by annealing and heat treatment. Auje Electronics analysis is shown after the heat treatment experiment. Interlayer titanium and titanium nitride barrier layers can reduce mutual diffusion. y Although the present invention has defined the invention with better practice, anyone familiar with this item on the way, but it is not used within the spirit and scope, can be changed and clouded, without departing from the essence of the invention. The scope of patent application = decoration, so the scope of protection of the present invention @ W shall prevail.
0522-5702TW*ptd0522-5702TW * ptd
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