TW472378B - Electroplating of copper seed layer in a metal process - Google Patents
Electroplating of copper seed layer in a metal process Download PDFInfo
- Publication number
- TW472378B TW472378B TW90103109A TW90103109A TW472378B TW 472378 B TW472378 B TW 472378B TW 90103109 A TW90103109 A TW 90103109A TW 90103109 A TW90103109 A TW 90103109A TW 472378 B TW472378 B TW 472378B
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- copper
- substrate
- seed layer
- plating
- Prior art date
Links
Landscapes
- Electroplating Methods And Accessories (AREA)
Abstract
Description
經濟部智慧財產局員工消費合作社印製 472378 五、發明說明(/ ) 【發明之應用範略】 本發明是關於一種金屬製程中鍍製銅種子層的方法,特別是 關於一種ULSI金屬製程中,利用多晶石夕、非晶石夕或TaSix材置換 形成鋼子層的方法。 【發明之背景】 為了減少RC延緩時間,在ULSI製程技術上正發展銅製程。 電鍍銅的製程由於成本低,而受到業界青睞。為得到良好的電極 導電性’在進行銅電鑛時,必須在所欲電鑛的表面施加一層低電 阻的「種子層」(seedlayer),才能獲得所需的電鑛銅品質。該種 子層乃是-層在電鏟表面上施加的薄銅層。通常可用之方式為賤 鍍。然而由於濺锻法高深寬比(aspectrati〇)的孔洞,有覆蓋率 (comformality)不夠關題’因此在這種應用場合,貝㈤匕學氣 相沈積法(CVD)來取代。Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 472378 V. Description of the invention (/) [Application of the invention] The present invention relates to a method for plating a copper seed layer in a metal process, and particularly to a ULSI metal process. A method for forming a steel sublayer by replacing polycrystalline stone, amorphous stone or TaSix material. [Background of the Invention] In order to reduce the RC delay time, copper process is being developed on ULSI process technology. The process of electroplating copper is favored by the industry due to its low cost. In order to obtain good electrode conductivity, when conducting copper power ore, a low-resistance "seedlayer" must be applied to the surface of the desired power ore to obtain the required quality of copper for power ore. The seed layer is a thin copper layer applied on the surface of the shovel. The commonly available method is base plating. However, due to the high aspect ratio of the forging method, the comformality is not sufficient. Therefore, in this application, Becht learns to replace it by CVD.
Christine Whitman等人曾發表組合式m〇cvd_w製程能鑛出 覆蓋率好且修率小_種子層,其對恥2的畴力也可以配合 電化學沈積成MOCVD鍍製的鋼。不過,氣相沈積法的成本較高, 不易降低ULSI製作成本。為其問題。Christine Whitman et al. Have published a combined mocvd_w process that can produce a good seeding rate and a low repair rate_seed layer. Its domain force on shame 2 can also be combined with electrochemical deposition to form MOCVD-plated steel. However, the cost of the vapor deposition method is high and it is not easy to reduce the ULSI manufacturing cost. For its problem.
RobertMikkda等人曾經發表以Ta (2〇〇A)作為附著層,再 ,衣--------訂---------線— (請先閱讀背面之注意事項再填寫本頁) A7Robert Mikkda et al. Once published Ta (200A) as the adhesion layer, and then the clothes -------- order --------- line-(Please read the precautions on the back before filling (This page) A7
472378 五、發明說明(> ) 在其上以滅鍍法沈積Cu( 1,000A)為種子層的方法 '經實驗結果, 在側壁銅厚度為1’GGGA時,可以填充直徑α25_,深寬比為4 的孔洞。所製成的原始沈積(as-deposit)之電阻率(resistiyity) 為2,22/ζ Ω-cm,經過室溫下40小時或80°C下2〇分鐘的自行退火 (self-annealing)後’電阻率可降至 1.85// Ω-cm。(見 R. d. Mikkola 等人,「Copper electroplating for advanced interconnect technology」,Plating and Surfice Finishing ’ 2000 年 3 月,第 81 頁。)不過,物理沈積法鍍膜在深寬比較高時,其覆蓋率較差, 為其問題。472378 V. Description of the invention (>) A method for depositing Cu (1,000A) as a seed layer on the plating method by de-plating method 'Through experimental results, when the thickness of the sidewall copper is 1' GGGA, the diameter α25_ can be filled, deep and wide Holes with a ratio of 4. The resistivity of the prepared as-deposit is 2,22 / ζ Ω-cm, and after self-annealing at room temperature for 40 hours or 80 ° C for 20 minutes 'The resistivity can be reduced to 1.85 // Ω-cm. (See R. d. Mikkola et al., "Copper electroplating for advanced interconnect technology", Plating and Surfice Finishing 'March 2000, p. 81.) However, when the physical deposition method has a high depth to width ratio, its coverage is high. Poor, it's a problem.
YuriLantasov等人提出以Ti為附著層,利用無電極 (electroless)電鍵銅置換在活化後的Pd表面作為種子層,可填充 直徑0.35 ym ’深寬比為3的孔洞。不過,由於使用欺鍍法鍍上 Pd種子層,仍不能適用於高深寬比的孔洞。(見YuriLantasov等 人,「New plotting bath for electroless copper deposition on sputtered barrier layers」,Microelectronic Engineering, 50, 2000 年,第 441 頁。) 蕭名君以Cu (hfac) 2為反應物,使用光分解化學氣相沈積法 (photo-CVD),在常壓下,溫度為240°C時可在矽基板上直接沈 積銅膜。(見 M. J. Shaw,「Study on selective deposition of Cu films 4 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ------------ :裝--------訂---------線· (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製YuriLantasov et al. Proposed using Ti as the adhesion layer and replacing the surface of the activated Pd with electrodeless copper as the seed layer, which can fill holes with a diameter of 0.35 ym ′ and an aspect ratio of 3. However, since the Pd seed layer is plated using the bullying method, it is still not suitable for high aspect ratio holes. (See Yuri Lantasov et al., "New plotting bath for electroless copper deposition on sputtered barrier layers", Microelectronic Engineering, 50, 2000, p. 441.) Xiao Mingjun uses Cu (hfac) 2 as a reactant and uses photodecomposition chemical vapor phase The deposition method (photo-CVD) can directly deposit a copper film on a silicon substrate at a temperature of 240 ° C under normal pressure. (See MJ Shaw, "Study on selective deposition of Cu films 4 This paper size applies to China National Standard (CNS) A4 specifications (210 X 297 mm) ------------: installed --- ----- Order --------- Line · (Please read the notes on the back before filling this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs
47237B 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明(9 ) onSi (100) substratesofambientpressure」》國立交通大學電子工 程學業碩士論文,MSECG,1998 ’ pt 1:2。)不過,依此製程所得 之銅膜電阻率高連8.88ιηΩ-αη,並不適用。 M. tC Lee等人另提出在矽上直接置換沈積銅膜之化學置換 法’可在室溫下進行反應。在銅膜厚度為5,000人時,可得2·16μ Ω-cm 之低電阻率。(見 Μ· K. Lee 等人,「Deposition of Copper films on silicon for cupric sulfate and hydrofluoric acid」,Journal of Electrochemical Society,1997年5月。)但此種方法未考慮擴散障 礙層(diffusionbarrier)的存在’無法解決銅擴散的問題,為其缺 點。 因此目前實有必要提供一種新穎的金屬製程中銅種子層的製 法。 同時也有必要提供一種成本低、操作簡便的金屬製程中銅種 子層的製法。 同時也有必要提供一種可以適用在高深寬比孔洞之金屬製程 中銅種子層的製法。 同時也有必要提供一種可以解決反應副產物所引發問題之金 屬製程中銅種子層之製法。 5 本紙張尺度適用中國國家標準(CNS)A4規格(21〇 X 297公爱) I — 丨 — 111------^ I I I---—訂 — III--- -1 (請先閱讀背面之注意事項再填寫本頁)47237B Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of Invention (9) onSi (100) substrates ofambient pressure "" Master of Electronic Engineering Thesis of National Chiao Tung University, MSECG, 1998 "pt 1: 2. ) However, the resistivity of the copper film obtained by this process is as high as 8.88mΩ-αη, which is not applicable. M. tC Lee et al. Also proposed a chemical replacement method for directly replacing a deposited copper film on silicon 'to perform the reaction at room temperature. When the copper film thickness is 5,000 people, a low resistivity of 2.16 μ Ω-cm can be obtained. (See KM K. Lee et al., "Deposition of Copper films on silicon for cupric sulfate and hydrofluoric acid", Journal of Electrochemical Society, May 1997.) But this method does not take into account the existence of diffusion barriers 'The inability to solve the problem of copper diffusion is its shortcoming. Therefore, it is really necessary to provide a novel method for producing a copper seed layer in a metal process. It is also necessary to provide a method for producing a copper seed layer in a metal process with low cost and easy operation. It is also necessary to provide a method for producing a copper seed layer that can be applied to metal processes with high aspect ratio holes. At the same time, it is necessary to provide a method for preparing a copper seed layer in a metal manufacturing process which can solve problems caused by reaction by-products. 5 This paper size applies to China National Standard (CNS) A4 (21〇X 297 public love) I — 丨 — 111 ------ ^ II I ---— Order — III --- -1 (please first (Read the notes on the back and fill out this page)
47237B 經濟部智慧財產局員工消費合作社印制衣 A7 B7 五、發明說明(4) 【發明之目的] 本發明之目的乃在提供一種新穎的金屬製程中銅種子層的製 法。 本發明之目的也在提供-種成本低、操作簡便的金屬製程中 銅種子層的製法。 本發明之目的也在提供—種可崎用在高深寬比孔洞之金屬 製程中銅種子層的製法。 本發明之目的也在提供一種可以解決反應副產物所引發問題 之金屬製程中銅種子層之製法。 【發明之簡述】 依據本發明之金屬製程巾銅種子層之製法,係先在梦晶圓上 擴散障礙層,而在其上施加相當厚度之多晶破、非晶石夕或Tasix 膜。其次’將該多晶矽、非晶矽或Tasix膜以化學置換法,由銅取 代石夕’形成1:蓋率良好的銅種子層,最後再在該銅種子層上以電 鍍方法施加鮮。縣發日种,所制之化學置換反應溶 液包括-種或以上之蝕刻液,可以有效減少反應副產物,而得到 優異之效果。 上述及其他本發明之目的及優點,可由以下詳細說明並參照 6 ------------.裝--------訂---------線 (請先閱讀背面之注意事項再填寫本頁) steins A7 經 濟 部 智 慧 財 產 局 員 工 消 費 合 作 社 印 製 五、發明說明(f ) 下列圖式而更形清楚。 【圖式之說明】 第1圖表7F本發明金屬製程中銅種子層的鍍製之流輕圖。 第2圖即顯示本發B月金屬製程令置換後的銅種子廣在擴散障 礙層上的Auger縱向組成分佈圖。 第3圖即顯示在多晶石夕一短結構上i換銅種子層之成品表面 SEM 圖。 第4圖顯示以本發明之製程製得之成品在xrd下檢測之結 果。 第5圖顯不本發明-實施例經有電極電鑛銅填充後之SEM截 面照片。 第6圖即顯示該成品之電容電壓特性曲線圖。 【發明之詳細說明】 以下說明本個之金屬製針峨子層雜製。本發明之方 法可以應職各種硕之金屬製針。於·本發明之方法時, 係以將本發明之方法應用在雕刻(damagcence )技術令,作為實例。 但該實例並不能用以限制本發明之專利範圍。 第1圖表示本發明金屬製程中銅種子層的鍵製之流程圖。如 本紙張尺度適用中國國家標準(&油規格_(ϋ 297公楚) --------------.衣--------訂---------線丨-------------- ——————————— (請先閱讀背面之注意事項再填寫本頁) ns 經濟部智慧財產局員工消費合作社印製 A7 五、發明說明(匕) 圖所不,在步驟(a)巾,首先在—基板上形成孔洞及溝槽 (trench)的微。在孔狐溝槽下相為金麟,該基板可為任 何適用於金屬製程之介電質材料,通常係可使用氧化矽材料。至 於形成孔洞及溝槽之方法,則可為一般使用之姓刻方法。當然, 其他適用之方法,也可適用在本發明。同時,對此不同材質之基 板其形成孔洞及溝槽之方法也可有不同選擇,均依其目的及效 果而定。由於此類方法屬於習用技術,於此不加贅述。 於步驟(b)中,在形成孔洞及溝槽之基板上以適用之方法鍍 上一障礙層。該障礙層可為TiN TaN或Ta,厚度約為50〇A。如以 ΉΝ為障礙層,則可利用LPCVD方法鍍上;如為Ta,則可利用濺 鍍法或CVD法鑛上即可。其他適用之技術及加工之方法,也可適 用於本發明。 其後再在該障礙層上生長多晶矽。比較適用之方法包括在 5貧’ HOmtorr下以LPCVD爐子在擴散障礙層表面上鍍上多晶 矽,其厚度約650A。此外’也可以使用PECVD方法在擴散障礙 層表面上鍵非晶石夕。 於步驟(c)將形成之產物放入置換液中,其置換液應含有銅 離子,以置換該多晶矽層。適用之置換液包括CuS04 · 5H20及其 8 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ------------^--------訂---------線· (請先閱讀背面之注意事項再填寫本頁) 472378 經濟部智慧財產局員工消費合作板印製 A7 B7 五、發明說明(7 ) 他含銅離子之溶液。 矽上置換銅種子層的電化學反應機制為矽與銅之間的氧化還 原反應(oxidation-reduction, redox)。其半反應如下: 陽極:47237B Printed clothing by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the Invention (4) [Objective of the Invention] The purpose of the present invention is to provide a novel method for producing a copper seed layer in a metal process. The object of the present invention is also to provide a method for producing a copper seed layer in a metal process with low cost and easy operation. The object of the present invention is also to provide a method for producing a copper seed layer which can be used in a metal process for high aspect ratio holes. The object of the present invention is also to provide a method for producing a copper seed layer in a metal process which can solve the problems caused by reaction by-products. [Brief description of the invention] According to the method for manufacturing the copper seed layer of the metal process towel according to the present invention, a diffusion barrier layer is firstly deposited on a dream wafer, and a polycrystalline fracture, amorphous stone or Tasix film with a considerable thickness is applied thereon. Secondly, the polycrystalline silicon, amorphous silicon, or Tasix film is replaced by copper by chemical substitution method to form 1: a copper seed layer with good coverage, and finally, the copper seed layer is electroplated. The chemical replacement reaction solution produced by the county is composed of one or more etching solutions, which can effectively reduce reaction by-products and obtain excellent effects. The above and other objects and advantages of the present invention can be described in detail below with reference to 6 ------------. (Please read the notes on the back before filling out this page) steins A7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs V. Description of the Invention (f) The following drawings are more clear. [Explanation of the drawing] FIG. 7F is a light diagram of the plating process of the copper seed layer in the metal manufacturing process of the present invention. Figure 2 shows the Auger vertical composition distribution of the copper seeds after the replacement of the copper seeds on the diffusion barrier layer in the metal fabrication process in the month of this issue. Figure 3 shows the SEM image of the finished surface of the copper seed layer on the polycrystalline stone short structure. Fig. 4 shows the results of inspection of the finished product produced by the process of the present invention under xrd. Fig. 5 shows a SEM cross-sectional photograph of the present invention-Example after being filled with electrodeposited copper. Figure 6 shows the capacitor voltage characteristic curve of the finished product. [Detailed description of the invention] The following is a description of the hybrid metal needle layer made of this material. The method of the present invention can be applied to various kinds of metal needles. In the case of the method of the present invention, the method of the present invention is applied to a damagcence technique as an example. However, this example cannot be used to limit the patent scope of the present invention. FIG. 1 is a flowchart showing the bonding of the copper seed layer in the metal process of the present invention. If this paper size applies the Chinese national standard (& oil specification_ (ϋ 297 公 楚) --------------. Clothing -------- order ----- ---- line 丨 -------------- ——————————— (Please read the notes on the back before filling this page) ns Intellectual Property Bureau of the Ministry of Economic Affairs Printed by employee consumer cooperative A7 V. Description of the invention (dagger) As shown in the figure, in step (a), firstly, micro-holes and trenches are formed on the substrate. Under the trenches of the fox, there is Jin Lin The substrate can be any dielectric material suitable for metal manufacturing process, usually silicon oxide material can be used. As for the method of forming holes and trenches, it can be the commonly used method of engraving. Of course, other applicable methods, It can also be used in the present invention. At the same time, there are different choices of methods for forming holes and grooves for substrates made of different materials, all depending on their purpose and effect. Since such methods are conventional techniques, they are not added In step (b), a barrier layer is plated on the substrate forming the holes and trenches by a suitable method. The barrier layer may be TiN TaN or Ta, and the thickness is about It is 50A. If 为 N is used as the barrier layer, it can be plated by LPCVD; if it is Ta, it can be deposited by sputtering or CVD. Other applicable technologies and processing methods can also be applied. In the present invention, polycrystalline silicon is then grown on the barrier layer. A more suitable method includes plating polycrystalline silicon on the surface of the diffusion barrier layer with a thickness of about 650 A in an LPCVD furnace under a 5 lean 'HOmtorr. In addition, PECVD can also be used The method bonds amorphous stone on the surface of the diffusion barrier layer. In step (c), the formed product is placed in a replacement solution, and the replacement solution should contain copper ions to replace the polycrystalline silicon layer. Suitable replacement solutions include CuS04 · 5H20 And its 8 paper sizes are applicable to China National Standard (CNS) A4 (210 X 297 mm) ------------ ^ -------- Order ------ --- Line · (Please read the notes on the back before filling out this page) 472378 Printed on the consumer cooperation board of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (7) His solution containing copper ions. Copper replaced on silicon The electrochemical reaction mechanism of the seed layer is the oxidation-redu ction, redox). Its half reaction is as follows: Anode:
Si° + 6F —^ SiF62_ + 4e· (氯化反應) 陰極: 2Cu2+ + 4e— > 2Cu° (金屬還原反應) 全反應為:Si ° + 6F — ^ SiF62_ + 4e · (chlorination reaction) Cathode: 2Cu2 + + 4e— > 2Cu ° (metal reduction reaction) The total reaction is:
Si° + 2Cu2+ + 6F- —^ SiF62' + 2Cu0 在上述反應中,可能伴隨的次反應為:Si ° + 2Cu2 + + 6F- — ^ SiF62 '+ 2Cu0 In the above reaction, the secondary reactions that may be accompanied are:
Si4+ + 202· —^ Si02 由於此SiCb副產物之存在不利於銅的附著,此時可以利用一 種或以上之蚀刻液触刻所產生之Si〇2,使Si02不在界面上,此種 子層才能成功置換,其附著力也佳。 因此,在本發明中所適用的置換液最好為含鋼離子溶液與蝕 刻液之組成物。適用之實例包括CuS〇4 · 5H2〇及HF,各以1.5g/ L及7cc/L之溶液所形成之組成物。 在此t/i匕還原的反應中,多晶石夕的酬率約7Wmin,而銅的 沈積率約155A/min。此時多晶矽厚度及HF濃度要配合好,否則, 適用中國國家標準(CNS〉A4規格(210 X 297公爱) (請先閱讀背面之注意事項再填寫本頁) 訂---------線— 472378 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明(万)Si4 + + 202 · — ^ Si02 Because the presence of this SiCb by-product is not conducive to the adhesion of copper, at this time, one or more etching solutions can be used to contact the Si02 produced by etching, so that Si02 is not on the interface, and this seed layer can be successful. Replacement also has good adhesion. Therefore, the replacement liquid used in the present invention is preferably a composition containing a steel ion solution and an etching solution. Suitable examples include CuS04-5H2O and HF, each of which is formed by a solution of 1.5 g / L and 7 cc / L. In this t / i reduction reaction, the polycrystalline stone yield was about 7 Wmin, and the copper deposition rate was about 155 A / min. At this time, the thickness of polycrystalline silicon and the concentration of HF should be matched, otherwise, the Chinese national standard (CNS> A4 specification (210 X 297 public love) applies) (Please read the precautions on the back before filling this page) Order ------- --Line — 472378 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of Invention (10,000)
Cu置換後,仍有剩餘的多晶矽在擴散障礙層上,會減少Cu種子 層之附著力。 經此反應後,可以在其表面上鍍上完整的銅種子層。第2圖 即顯示本發明一實施例之銅種子層的八11明1>圖,界面上幾乎看不 到Si及Si02的存在。 以上的例子所鍍成的鋼種子層,其電阻率可達U , 其表面顆粒大小約360A。第3圖即顯示在多晶石夕一組結構上置換 銅種子層之成品表面SEM圖。 為增進Cu及擴散障礙層界面的附著力,以快速加熱退火 350°C在氮氣中加熱8分鐘(步驟(c)),此電阻值降低,Cu膜組 織更為緻密。 於步驟(d)進行金屬電鍍。通常可以2.0ASD之電流密度,在 室溫下,在電鍍槽内進行銅電鍍。經15分鐘後,銅膜可達5〇〇〇A。 其電阻率1.85/z 。將所得之產品在XRD下檢測,得知其晶 相以(111)為最多。第4圖即顯示其結果。 表一After Cu replacement, there is still polycrystalline silicon remaining on the diffusion barrier layer, which reduces the adhesion of the Cu seed layer. After this reaction, a complete copper seed layer can be plated on the surface. Fig. 2 is a diagram showing a copper seed layer according to an embodiment of the present invention, and the presence of Si and Si02 is hardly seen on the interface. The resistivity of the steel seed layer plated in the above example can reach U, and the surface particle size is about 360A. Figure 3 shows the SEM image of the surface of the finished product where the copper seed layer was replaced on a group of polycrystalline structures. In order to improve the adhesion at the interface between Cu and the diffusion barrier, rapid heating annealing at 350 ° C for 8 minutes in nitrogen (step (c)), this resistance value decreases, and the Cu film structure is more dense. In step (d), metal plating is performed. Copper plating can usually be performed in a plating bath at a current density of 2.0 ASD at room temperature. After 15 minutes, the copper film can reach 5000A. Its resistivity is 1.85 / z. The obtained product was examined under XRD, and it was found that the crystal phase had (111) as the largest. Figure 4 shows the results. Table I
藥劑 添加量 CuS04 · 5H20 25g/L 10 本紙張尺度適用中國國豕標準(CNS)A4規格(210 X 297公爱) ------------:裝--------訂--------· 1 (請先閱讀背面之注意事項再填寫本頁) 472378 A7 五、發明說明( B7 h2s〇4 200g/L HC1 0.15c.c/L 添加劑 5c.c/L 電化學方法置換沈積銅種子層,可獲得良好的步階覆蓋能 力。經有電極電鍍銅沈積後,可完全填充0.35 ,深寬比2的孔 經濟部智慧財產局員工消費合作社印製 洞。第5圖顯示本發明一實施例經有電極電錢銅填充後之SEM截 面照片。若試片是以钽作為擴散障礙層,若可以化學氣相沈積的 方式鍍製’增進其步階覆蓋能力及均勻性,可以使得有電極電鍍 銅完全沈積在更小孔徑及更高深寬比的孔,且具有更佳的抵抗銅 離子擴散的能力。 以本發明之方法製成MOS電容,以不同加熱溫度3〇〇〇c、4〇() C、450°C及500oC ’測其Vfb移動,發現此種子層魏成之銅,效 果良好,可财熱到45〇。(:,足供咖製程中低介電層/銅使用。 第6圖即顯示該成品之電容電壓特性曲線圖。 以上是對本發明金屬製程中鋼種子層的鍛製實施例之說明, 習於斯藝之人士不難由上述之說明,明瞭本發明之精神進而作出 不同的衍伸與變化,准只要不超出本發明之精神,均應包含於其 申請專利範圍内。 (請先閱讀背面之注意事項再填寫本頁) 衮--------訂---------線. 11 @ (CNS)A4 (210 X 297^5"Additive dosage CuS04 · 5H20 25g / L 10 This paper size is applicable to China National Standard (CNS) A4 (210 X 297 public love) ------------: Packing ------ --Order -------- · 1 (Please read the notes on the back before filling this page) 472378 A7 V. Description of the invention (B7 h2s〇4 200g / L HC1 0.15cc / L Additive 5c.c / L Electrochemical method to replace the deposited copper seed layer to obtain good step coverage. After electrodeposited copper deposition, the hole can be completely filled with 0.35, 2 aspect ratio holes printed by the Intellectual Property Bureau employee consumer cooperative of the Ministry of Economic Affairs. Fig. 5 shows a SEM cross-section photograph of an embodiment of the present invention after the electrode is filled with copper. If the test piece uses tantalum as a diffusion barrier layer, it can be plated by chemical vapor deposition to improve its step coverage And the uniformity can make the electrodeposited copper be completely deposited in the holes with smaller aperture and higher aspect ratio, and have better resistance to copper ion diffusion. MOS capacitors made by the method of the present invention, with different heating temperatures 300 ℃, 4〇 () C, 450 ° C and 500oC 'Measured Vfb movement, found this seed Wei Chengzhi's copper has a good effect and can heat up to 45. (:, for low dielectric layer / copper in the coffee process. Figure 6 shows the capacitor voltage characteristic curve of the finished product. The above is the process of the metal process of the present invention. For the description of the forged embodiment of the steel seed layer, it is not difficult for those skilled in Siyi to understand the spirit of the present invention and make different extensions and changes. As long as it does not exceed the spirit of the present invention, it should include Within the scope of its patent application. (Please read the notes on the back before filling this page) 衮 -------- Order --------- line. 11 @ (CNS) A4 (210 X 297 ^ 5 "
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW90103109A TW472378B (en) | 2001-02-13 | 2001-02-13 | Electroplating of copper seed layer in a metal process |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW90103109A TW472378B (en) | 2001-02-13 | 2001-02-13 | Electroplating of copper seed layer in a metal process |
Publications (1)
Publication Number | Publication Date |
---|---|
TW472378B true TW472378B (en) | 2002-01-11 |
Family
ID=21677325
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW90103109A TW472378B (en) | 2001-02-13 | 2001-02-13 | Electroplating of copper seed layer in a metal process |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW472378B (en) |
-
2001
- 2001-02-13 TW TW90103109A patent/TW472378B/en not_active IP Right Cessation
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW527666B (en) | Electroless method of seed layer deposition, repair, and fabrication of Cu interconnects | |
US9704717B2 (en) | Electrochemical plating methods | |
TWI502646B (en) | Cobalt metal barrier layers | |
JP6474410B2 (en) | Copper electrodeposition bath containing electrochemically inert cations | |
TW201214532A (en) | Metal gate structures and methods for forming thereof | |
JP5689411B2 (en) | Electrodeposition composition and method for coating semiconductor substrate using the composition | |
JP2009527912A (en) | Method and composition for direct copper plating and filling to form interconnects in the manufacture of semiconductor devices | |
TW200408020A (en) | Semiconductor device and manufacturing process therefor as well as plating solution | |
US20080237860A1 (en) | Interconnect structures containing a ruthenium barrier film and method of forming | |
JP2010525159A (en) | Production of rhodium structure for contacts by electroplating and composition for electroplating | |
JP7138108B2 (en) | Copper Electrodeposition Solution and Process for High Aspect Ratio Patterns | |
CN105274595A (en) | Method for electrochemically depositing metal on a reactive metal film | |
CN105280614B (en) | Method for the electrochemical deposition of metal on reactive metal film | |
JP2002033323A (en) | Method of manufacturing semiconductor device having copper interconnecting portion | |
JP2013524019A (en) | Seed layer deposition in microscale structures | |
US20130213816A1 (en) | Incorporating High-Purity Copper Deposit As Smoothing Step After Direct On-Barrier Plating To Improve Quality Of Deposited Nucleation Metal In Microscale Features | |
TW472378B (en) | Electroplating of copper seed layer in a metal process | |
TW201347090A (en) | Semiconductor reflow processing for high aspect ratio fill | |
TW543101B (en) | Method of achieving high adhesion of CVD copper thin films on TaN substrates | |
EP1573087A1 (en) | Copper activator solution and method for semiconductor seed layer enhancement | |
JP2002043247A (en) | Metal thin film of semiconductor element and its forming method | |
US6511609B2 (en) | Cu seed layer deposition for ULSI metalization | |
TW512185B (en) | Method of electroless plating metal lines on nitride barrier | |
TW201727829A (en) | Process for copper metallization and process for forming a cobalt or a nickel silicide | |
TW414979B (en) | Method of improving gap-fill capability and reliability |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GD4A | Issue of patent certificate for granted invention patent | ||
MM4A | Annulment or lapse of patent due to non-payment of fees |