TW512185B - Method of electroless plating metal lines on nitride barrier - Google Patents

Abstract

This invention provides three embodiments of manufacturing metal lines and solder bumps using electroless deposition techniques. The first embodiment uses a PdSix seed layer for electroless deposition. The PdSix layer does not require activation. A PdSix is formed on a barrier layer 20 and an adhesion layer 30 and patterned. Ni, Pd or Cu is electroless deposited over the PdSix layer to form a metal line. The second embodiment selectively electrolessly deposits metal over an adhesion layer 130 composed of poly Si, Al, or Ti. A photoresist pattern is formed over the adhesion layer. A metal layer is electrolessly deposited over the adhesion layer. The photoresist layer is removed and the exposed portion of the adhesion layer and the underlying barrier metal layer are etched thereby forming a metal line. The third embodiment is for manufacture of a solder bump. An Al layer 220 and a barrier metal layer 230 are deposited over a substrate. The barrier layer 230 is polished and activated. Next, the aluminum layer 220 and the barrier metal layer 230 are patterned. A metal layer 240 is electroless deposited. Next a solder bump 250 is formed over the electroless metal layer 240.

Description

Printed by the Consumers' Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 512185 A7 __________B7 V. Description of the Invention (丨) Background of the Invention 1) Field of the Invention The present invention relates to electroless plating technology, in particular, the electroless plated surface 1 and the electroless nickel, which The process of making metal wires and solder bumps (sold = bump) in the circuit. The present invention is also related to making high-resolution wiring patterns in a semiconductor process. 2) Description of previous technology Electroless plating is a technology that can deposit a thin metal layer or multiple metal thin films on a substrate. The principle of this process is to immerse the substrate into the metal film to be plated under appropriate conditions. In the ion solution, metal ions in the solution are precipitated on the surface of the substrate through a redox reaction. The difference between this method and the electroplating method is that electroless mining does not require an external electric field to provide electrical energy to the metal ions, so as to achieve the purpose of metal deposition. This technology relies on the use of chemical energy (chemicai potential) in solution to reduce metal ions to metal atoms. The electroless plating process has the advantage of selective deposition, that is, the metal deposited by this process can only be deposited on the surface of the material similar to the metal to be plated, or it can be deposited for activation treatment, and Make it catalytically active on the surface. The surface of this layer of catalytic material is called "seed mterial" 'or' 'seed layer'. In addition, a quantitative value is also defined to indicate the pros and cons of electroless plating selectivity, that is, the Plating Process Selectivity. This value is based on the deposition rate on a surface with catalytic activity and on the surface of a material without catalytic activity. The ratio of the deposition rate is expressed. The deposition rate of the electroless process is also related to the physical properties of the catalytic surface layer (eg, grain size, aspect ratio, and distance between wires). If the thickness of the films deposited at different locations on the substrate are approximately the same, we can say that the uniformity of the deposition process is good. Applicable to China Paper Standard (CNS) A4 specification (2I0X297 mm) for this paper scale (Please read the notes on the back before filling out this page) il. ► Printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 12185 A7 _B7__ 5. Description of the invention (2) For many applications, the uniformity of the deposition process, the deposition selection ratio, and the adhesion of the deposited film thickness to the substrate are all important factors that affect the quality of the metal film deposition process. factor. One of the methods to increase the adhesion between the metal thin film coating and the substrate is to activate the substrate before electroless plating. The factors that affect the activation process are the activation temperature, the ion concentration in the plating solution, and the composition of the plating solution. Among them, the composition of the plating solution is the most important, because it will affect the uniformity of the coating, the deposition selectivity, and the physical properties of the coating. Therefore, the quality of the activation process will affect the “technological process window” of the subsequent keyless process. Therefore, in order to increase the reproducibility of the process and the uniformity of the coating, the larger the process window, the better. The process of reducing metal ions in solution to solid metal using electroless plating technology and depositing them on a catalytically active surface has long been used in the circuit board industry to make wire layers and via holes. Recently, this technology has been applied to integrated circuits to make metal interconnects. Compared with the traditional metal deposition technology (such as sputtering and evaporation), the electroless mining process has many advantages. For example, the materials and equipment costs of the electroless mining process are cheaper than other methods. Many, moreover, this technology only allows metals to be deposited on catalytic surfaces, so this process has the characteristics of selective deposition. The process with selective deposition can reduce the steps of exposure and development, and can also save an etching step to define the metal wires. Therefore, electroless plating technology can be used for wire structures that require high density and difficult to engrav. Copper metal process. In addition, another advantage of this process is that the growth rate of the metal has no obvious relationship with the surface shape of the substrate (difference in height and position and angle), so the electroless plating technology can be applied in high aspect ratios (such as deep vias) and In the process of depositing metal thin films on multi-layer circuit boards, this paper · size applies to China National Standard (CNS) A4 (210X 297 mm) (Please read the precautions on the back before filling this page) 512185 A7 B7 5 3. Description of the invention (3) Because traditional metal deposition techniques (sputtering and evaporation) cannot provide good "line of sight" deposition characteristics, metal thin films with uniform thickness cannot be obtained. The most commonly mentioned papers currently published are the application of electroless plating to contact holes and via holes in integrated circuits. The traditional method of making contact holes is to define the position of the contact holes on the dielectric layer by using an exposure and development process, and then use the etching method to etch the dielectric layer to the conductive layer of the element on the surface of the Shi Xi wafer, and then deposit metal to make It is connected to the conductive layer of the element, so the main purpose of the contact hole is to connect the upper conductive metal layer with the conductive layer on the bottom element to form a complete connection wire structure. The electroless plating process can be used as a metal wire layer in a contact hole because of its selective deposition. Such a process creates a metal "plug" that connects the upper and lower metal connections. The metal plug produced by the electroless plating process can control the metal height in the plug to be the same as the surface of the dielectric layer. This can avoid the problem of uneven surface caused by the difference in height near the contact hole during the production of the contact hole wire. These surface unevenness problems tend to cause instability in subsequent processes. Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling this page). Although electroless plating technology is used in the production of metal connections for contact holes and vias, it can be provided to process designers Some options, but this technology has many limitations in the application of integrated circuit manufacturing. Because this technique looks simple, the chemical reactions that occur on the substrate surface during the deposition process are very complicated. The factors that affect whether electroless plating technology can be applied to integrated circuits include how to effectively control the deposition process on the surface of the substrate to obtain a uniform coating thickness, and how to control the deposition process of the metal thin film to obtain a better '' "Process selectivity". And these factors that affect the electroless plating process are mostly related to the activation process of the substrate surface, that is, how to make the substrate surface become catalytic, so that the subsequent paper standards apply to China. National Standard (CNS) A4 specification (210X 297 mm) 5 Consumption Cooperation with Employees of China Standards Bureau, Ministry of Economic Affairs, Du Printed 512185 A7 B7 5. The electroless plating of invention description (β) can be carried out smoothly. The present invention proposes some new The surface activation treatment technology makes the surface of the substrate have the catalytic ability, which can obtain a more uniform thickness of the electroless plating layer. Recently, there are many patents and technical documents published on the surface activation technology, and most of these published documents are on the substrate Deposited on either an atomic layer or a thin metal layer, and these adsorbed atomic layers or a thin layer The metal layer depends on our needs. At present, the electroless plating process is most commonly used in integrated circuit processes. Electroless clock recording, drilling, depositing, and copper materials are deposited on the surface of the broken substrate. The surface may include a conductive metal layer and a non-conductive material layer, wherein the conductive metal layer includes polycrystal, Shao, Shao alloy, gold or copper. The non-conductive material layer includes silicon dioxide, silicon nitride or other high-level materials. Molecular polymer insulation layer. At present, the activation process on the surface of the substrate can be divided into three categories: (1) deposition of a layer of catalytic properties by evaporation or sputtering; (2) electrochemical surface modification Electrochemical surface modification technology is used to deposit materials with catalytic properties; (3) Colloidal suspension is used to deposit materials with catalytic properties. Palladium and zinc are the most commonly used as catalytic surfaces before electroless plating. Metal layer, these two metals can be deposited on the substrate by evaporation or sputtering, and then the traditional lithography technology is used to define the wire shape This method is particularly suitable for the production process with wider wires. Some literatures indicate that the catalytic activity of palladium metal films deposited by evaporation is lower than that of other palladium films (such as electrochemical methods). This layer has low catalytic activity. The active palladium film will affect the uniformity of the subsequent electroless plating and the final yield of the product, especially the narrower wire structure or the denser wire style. The effect is often added to the electroless recording solution ( stabilizer) to prevent the natural decomposition of the plating solution, so the stabilizer will cause the size (size) and the size of the paper during the deposition process. Applicable to China National Standards (CNs), eight materials inspection (2⑴X 297 thin) (〇 (Please read first (Notes on the back then fill out this page)

512185 A7 B7 V. Description of the invention (;) (proximity) effect. Therefore, the stabilizer will reduce or even prevent the self-catalyzed electroless plating reaction on the small particles, which may be the dust in the air or the contaminated particles in the plating solution. Although the stabilizer can suppress the decomposition of the plating solution, it can affect the mechanical properties and electrical properties of the coating, although these mechanisms are not fully understood. Moreover, although the stabilizer in the plating solution as described above can inhibit the natural decomposition process of the fine particles, it also affects the deposition mechanism of the plating layer on the substrate with some fine wire structures. Fortunately, these shortcomings can be corrected by modifying the composition of the plating solution or the process conditions, so that the structure of the metal coating can have the best quality, such as increasing the deposition temperature, or reducing the amount of stabilizer in the plating solution. Improve the wire structure of electroless plating deposited on sub-micron width, but these will make the deposition selectivity worse and the stability of the forging bath worse. In fact, the surface activation step in the thin film deposition process also affects the uniformity of the coating and the selectivity of the deposition. In addition, any cleaning steps before the metal film is deposited, or the length of time the substrate is exposed to the air, will affect the uniformity of the coating and the shape of the wire to be deposited. There are many reports that the use of electrochemical surface modification technology can have a wide operating range and can deposit coatings on metal or dielectric layers. It is also reported in the literature that immersing a silicon wafer in a solution containing vaporized palladium and hydrochloric acid in an ultra-large integrated circuit will adsorb a thin palladium metal layer on the surface of the silicon wafer as a nucleation layer. Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling out this page) Usually the thin oxide layer on the surface of aluminum can be immersed in a diluted hydrofluoric acid solution before the palladium activation process. Removal, and the degree of activation of the surface is closely related to the previous surface treatment process of aluminum. Factors that affect the degree of activation include the activator in the activating solution, the activation temperature, and the activation time. If a highly activated surface is to be obtained, the process window will be small, but if the activation time is too short, the paper size of the surface will be applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 512185 A7 B7 5 2. Description of the invention The insufficient degree of activation of the surface leads to uneven thickness of the deposited metal bell layer. If the activation time is too long, the adhesion between the deposited metal and the substrate will be poor. Therefore, many people have invested in researching how to design a stable, reproducible, and easy-to-use activation process for employee consumer cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs, although such a process is not easy to achieve. Another method of surface activation of aluminum is to immerse the substrate in a strong alkaline solution containing zinc, because metal zinc is very suitable as a catalytic material for an electroless plating process, and such a process is also called zinc replacement. The zinc replacement material is very effective in processing large-volume objects, but for sub-micron-sized wire structures in integrated circuits, the window of this process is very small. As for the treatment conditions using zinc replacement and the effect on the substrate, it is the same as the activation process described above. Traditionally, in the process of manufacturing integrated circuits, lithography and dry etching are used to produce metal connection lines and dielectric layers. However, the aluminum-silicon or aluminum-silicon-copper systems that were commonly used in integrated circuit manufacturing processes no longer meet many needs, such as high thermal stability, high electromigration, and high corrosion resistance. Copper has been considered as a conductive material for future multilayer wire structures because of its many advantages over aluminum alloys. However, copper is not an absolutely conductive material. In high-temperature environments, copper has a very fast mobility in silicon, so it is easy to form traps and severely affect components. For these reasons, we must add a diffusion barrier layer material between copper and silicon to suppress the expansion of copper atoms. Generally speaking, the diffusion barrier layer must have the following conditions: & The diffusion barrier layer needs to spread slowly to two adjacent layers; b. The diffusion barrier layer and the adjacent two layers must react slowly; c. Diffusion The adhesion between the barrier layer and the adjacent two layers must be strong; d. The thickness of the diffusion barrier layer must be very uniform; please read the precautions on the back before filling out this page}-Order_ This paper County (CNS) ~ Secret (2 books, 297 publications) Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs M2185 A7 ______B7 V. Description of the invention (7) e. From the perspective of thermodynamics, the diffusion barrier layer and the adjacent two layers are It belongs to a stable state; f · The material of the diffusion barrier layer needs to have the characteristics of low resistance. Recently, electroless copper technology has been very attractive because of the low cost of equipment, low deposition temperature, high deposition speed, and excellent coating quality. The electroless copper process on the catalytic surface is generally considered to have two reactions occurring simultaneously. The first is anodization of the reducing agent and the second is the cathodic reduction of metal ions. The purpose of the catalytic surface layer required in the electroless plating process is to catalyze the oxidation of the reducing agent and transfer the released electrons from the place where the anode reaction occurs to where the cathode reaction occurs. Therefore, we must deposit an adhesion layer material on top of the diffusion barrier layer to solve the problem that most of the diffusion barrier layer does not have catalytic surface properties. It is very important to overcome the many problems of the electroless plating process mentioned above, so there are many patents and technical documents now that propose improvements to this problem. Among them, U.S. Patent No. 5,183,795: "Fully planar metallization process" proposed by Ting, proposes many improved methods. In this patent document, it is proposed to use selective electroless deposition technology to make metal copper wires. These metals are made of wire patterns on the dielectric layer by lithography and etching technology, and then implanted by ion implantation. Silicon atoms are at the bottom of the metal wire pattern, and then a selective electroless deposition technique is used to make metal wires in the dielectric layer to complete the first-level metal connection wire structure. U.S. Patent No. 5429994 (Ishikawa): Wiring forming method wiring restoring method and wiring pattern changing method-This patent proposes the use of electroless plating technology to make a low-resistance metal thin film as a metal connection wire on an integrated circuit. U.S. Patent 5580668 (Kellam): Aluminum-Palladium alloy This paper is sized to the Chinese National Standard (CMS) A4 (21 × 297 mm)

Ji · __rll — φI — (Please read the notes on the back before filling in this page) Order printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 512185 A7 ^ B7 V. Description of Invention (f) for initiation of electroless plating I Lu He put the metal thin film, and then made it into aluminum-palladium alloy by heat treatment. The surface of this aluminum-alloy alloy can be pre-treated with the etching solution of Ming to make a thin catalytic surface layer on the surface. This catalytic surface layer can be used as a catalytic layer material for electroless mineral reactions. US patent 4182781 (Hooper): Low cost method for forming elevated metal bumps on integarted circuit bodies employing an aluminum / palladium metallization base for electroless plating-proposed to make metal bumps on microelectronic semiconductor circuits, this patent also It is the use of aluminum-based metal as a catalytic material in the electroless plating process. The aluminum-palladium alloy coating is produced by first depositing aluminum and palladium metal at the same time, then using lithography to produce the required pattern, and then etching aluminum and palladium by wet etching. Metal layer, and then cover the insulating layer on the aluminum-palladium alloy layer, and then create an aperture to expose the alloy layer, and then immerse the wafer in the electroless solution to make copper deposit on the alloy layer Or nickel metal bumps. U.S. Patent No. 5169680 (Ting): Electroless deposition for 1C fabrication-Proposes the advantage of selective deposition using an electroless plating process to produce a metal connection wire structure by an additive method. When the surface of the substrate is not catalytic, an appropriate activation step is required so that the surface of the substrate becomes catalytic to facilitate subsequent electroless plating reactions. U.S. Patent 4,954,214 (Ho) teaches the use of electroless plating to deposit metal on a refractory metal layer. In addition, Dubin et al., “Thin Solid Films, 226 (1993) pp. 87-93, discusses the use of electroless nickel process to deposit nickel metal on tungsten titanate in Selective electroless deposition on a TiW underlayer for integrated circuit fabrication”. (TiW) layer manufacturing method to apply to the size of integrated electronic paper size Applicable to Chinese National Standard (CNS) M specifications (2 mm) X 297 mm) m · tKLra νϋ_ϋ flm «m ϋ · ϋ mm ···· mu m (Please read the precautions on the back before filling this page)-Order 512185 A7 B7 5. In the process of the invention (?), the vias between the metal layer and the metal layer are made. A comprehensive description of the invention The object is to provide a method for depositing nickel, palladium, or copper wires on a diffusion barrier layer of a nitride using an electroless plating process on a semiconductor device. Another object of the present invention is to provide a method for depositing nickel or The method of copper on the polycrystalline silicon or aluminum metal layer, where the polycrystalline silicon on the aluminum metal layer is an adhesion layer as a nitride diffusion barrier layer. Another object of the present invention is to provide a A method for depositing nickel or copper metal on a semiconductor silicide activated layer by electroless plating method. Another object of the present invention is to propose a method for depositing copper or nickel on a semiconductor element by electroless plating method. Metal is used to make solder bumps. Another object of the present invention is to use a palladium silicide layer as a nucleation layer, or use a chemical-mechanical polish method to roughen the surface of a diffusion barrier layer, and then use selective deposition characteristics. The electroless plating method is used to make metal wires. The present invention proposes three different processes for depositing metal on the diffusion barrier layer by using electroless nickel technology. The first is to use palladium silicide (PdSix) as a nucleation layer for electroless plating and deposit Copper, nickel, or palladium metal to form metal wires. Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling out this page) The second is to use polycrystalline silicon, titanium, or aluminum As an adhesion layer, copper, palladium, or nickel metal is then deposited by electroless plating to form a wire structure. The mechanical barrier is used to roughen the diffusion barrier layer, and then copper, nickel or palladium metal is deposited by electroless plating to facilitate the subsequent production of solder bumps. This paper size is applicable to the Chinese National Standard (CMS) A4 specification (210X 297 mm) 512185 A7 B7 V. Description of the Invention (i) The first process uses palladium silicide (Pdsix) as a catalyst layer for electroless plating reaction. The first process proposed in the present invention is to use electroless deposition with selective deposition characteristics The metal is fabricated on palladium silicide. The manufacturing procedure is as follows: a) Step 100-FIG. 1A is to provide a semiconductor substrate (10). B) Step 102-FIG. 1A is to fabricate a diffusion barrier layer (2 ... on a semiconductor substrate (ίο ), The diffusion barrier layer may be tungsten titanium (Tiw), titanium nitride (TiW), titanium nitride (TiN), nitride | g (MoN), nitride nitride (wn) or nitride button ( TaN); c) Step 104- fabricate an adhesion layer (30) on the diffusion barrier layer (20), the material of the adhesion layer may be polycrystalline silicon; d) step 106-FIG. 1B-deposition by sputtering The metal layer (40) is on the adhesion layer (30); e) step 108-FIG. 1C- heat treating the substrate to make the gold The metal layer (40) reacts with the adhesion layer (30) to form a palladium silicide layer (50); e-1) The temperature required to form the palladium silicide material is about 23〇-27〇 () (:, the required time is about 20 to 40 minutes, the heat treatment may be performed in the atmosphere or a nitrogen-containing atmosphere; f) Step 110-FIG. 1D-patterning the palladium silicide layer (50), so that the palladium silicide has a wire connection structure; g) Step 112-FIG. 1D-Using Shi Xihuaju as a mask carved by the last name, and then patterning the diffusion barrier layer (20) to form a wire structure of the diffusion barrier layer; h) Step 114-FIG. 1E-Using electroless plating A metal layer (60) is deposited on the palladium (50) wire structure to form a metal connection wire. The material of the metal layer can be nickel, copper or palladium, and no activation step is required in this process, that is, Can use electroless plating method to make gold paper on palladium silicide. Paper size is applicable to Chinese National Standard (CNS) A4 (21 × 297 mm) (Please read the precautions on the back before filling this page) Printed by Consumer Cooperatives

512185 A7 B7 V. Description of the invention (M) belongs to wire. The second process-using electroless plating technology to deposit copper or nickel metal wires on the adhesion layer, and the adhesion layer material can be polycrystalline silicon, aluminum or titanium. The manufacturing procedure of this method is as follows: a) step 200- FIG. 2-providing a semiconductor substrate (10); b) step 200- depositing a diffusion barrier layer (120) on the semiconductor substrate; b-1) the diffusion barrier The layer material may be tungsten titanide, titanium nitride, molybdenum nitride, tungsten nitride, or nitride button; c) step 204-FIG. 2A-deposit an adhesion layer (130) on the diffusion barrier layer (120); The material of the adhesive layer may be a polycrystalline silicon, aluminum or titanium metal layer; d) Step 206-Use a lithography technique to form a desired pattern (132) on the adhesive layer (130); e) Step 208- The wafer is immersed in the pre-treatment solution for pickling, and the adhesion layer is activated; f) Step 210-depositing a metal wire (140) on the adhesion layer by electroless plating, the metal wire may be copper, Nickel and palladium metal; g) Figure 2C-Step 212- Remove the photoresist (132) layer, leaving the structure of the metal wire; Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling in this Page) h) FIG. 2D-step 214-adhesive layer (130) not covered by photoresist by dry etching, And removing the diffusion barrier layer (120) to form a metal wire structure (140, 130, 120); a third process-using electroless plating to deposit metal and roughening the surface of the diffusion barrier layer using chemical mechanical polishing and upsetting, and then The electroless plating process is used to produce an adhesion layer of solder bumps to produce solder bumps. The detailed steps are as follows: a) Figure 3-step 300-providing a semiconductor substrate (10); b) Figure 3A-step 302-depositing an aluminum The metal layer (220) is applied to the size of the semiconductor substrate. This paper applies the Chinese National Standard (CNS) A4 specification (210X 297 mm) 13 512185 A7 B7 V. Description of the invention (U) (10); c) Figure 3A-Step 304 -Depositing a diffusion barrier metal layer (230) on the aluminum metal layer (220), the material of the diffusion barrier layer may be tungsten titanide, titanium nitride, nitride nitride, hafnium nitride, or nitride group; d) diagram 3B-step 306-grind the diffusion barrier layer (230) by chemical mechanical polishing to roughen the surface of the diffusion barrier layer; e) step 308-use lithography technology on the aluminum metal layer (220) and the diffusion barrier metal layer (230 The photoresist on) is defined as the required pattern; f) Figure 3D-step 310 -Use an over-diluted hydrofluoric acid solution to pickle the surface of the diffusion barrier layer; g) Figure 3D-Step 310-Activate the surface of the diffusion barrier layer with an activating solution containing palladium chloride (the composition of this solution is palladium chloride) (PdCl2) 0.1-0.2g / L; hydrofluoric acid (HF) 200-300g / L; acetic acid (CH3COOH) 450-500g / L); h) Figure 3D-step 312-deposit a metal layer by electroless plating (240 ) On the diffusion barrier layer (230); i) FIG. 3E-step 314-producing solder bumps (250) on the non-electrical error metal layer (240). The composition of the solder bumps may be a lead-tin alloy. The process proposed by the present invention has the following advantages: a. The three processes proposed in the present invention can all use electroless plating on (1) palladium silicide (PdSix); (2) polycrystalline silicon layer, aluminum or titanium The metal layer is printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling this page) and (3) on the diffusion barrier layer roughened by chemical mechanical polishing; b. In the present invention The cost of the proposed process is lower than the cost of other selective deposition processes; c. The reproducibility of the process proposed in the present invention is higher than the reproducibility of the previously proposed process; Paper size applies to China National Standard (CNS) A4 (210X297 mm)

IA 512185 Central Ministry of Economics and Economics, Employees' Cooperatives, printing 20 diffusion barrier layer 40 palladium layer 60 wire metal layer 130 adhesion layer A7 B7 V. Description of the invention (丨 3) The process proposed in the present invention, the required operation The temperature is lower, the deposition temperature is faster, and the quality of the coating is better. The brief description of the θ 囷 formula According to the process characteristics and advantages of the semiconductor device proposed in the present invention, and the detailed manufacturing process of the semiconductor device, the following diagram will be used To explain. The figure is a flow chart of the first process for making metal wires on a building board circuit proposed in the present invention. Figures 1A to 1E are cross-sections 第 of the first method of making metal wires on a integrated circuit using electroless plating technology proposed in the present invention. FIG. 2E is a flow chart of a second process for manufacturing metal wires on a shipboard circuit proposed in the present invention. FIGS. 2A to 2D are cross-sectional views of a second method for making metal wires on an integrated circuit using electroless plating technology in the present invention. FIG. 2F is an explanation of the first and second uses in the present invention. Top view θ of a metal wire produced by electroless deposition technology. FIG. 3F is a process for producing tin bumps on a stacked circuit using electroless deposition technology proposed in the present invention.囷 3A to 3E are cross-sectional views explaining the use of electroless plating technology to make solder bumps on integrated circuits in the present invention ° Element Fu Li Description-10 semi-conductor substrate 30 adhesion layer 50 dream chemical age layer 120 Diffusion barrier layer paper method scale, using China® furniture ratio (CNS) M wash grid U10X297 male) 15 --------- install ------ tr ------ line (please First read the precautions of ar and read this page before filling in this page> 512185 A7 B7 V. Description of the invention (忡) 132 Photoresistor 220 Aluminum metal 240 Metal layer 140 Metal connection wire 230 Diffusion barrier layer 2 5 0 Solder bump center of the Ministry of Economic Affairs The preferred embodiment of the invention printed by the staff bureau of the Bureau of Standards. The process proposed in the present invention will be described with a cross-sectional view to explain how to use the keyless method to make metal wires and rod tin bumps. In order to explain this in more detail, The content of the invention, so when describing the content of the invention, the conditions of the process, such as flow rate, pressure, temperature, thickness, concentration, etc. will be explained, but for those who are familiar with this phase process technology, Explaining these conditions does not obscure the present invention The spirit of the case ... There are many books and published materials that can provide the production process of general integrated circuits, such as CYChang, SMSze, "ULSI Technology, McGraw-Hill Company, 1997", the general components mentioned in the present invention. The process is described in detail in this book. In order to let everyone have a better understanding of the present invention, we will use the existing process as an example to illustrate, so that those who are already familiar with this technical field can better understand the invention Process one: Take Shi Xihua to use (PdSi) as the nucleation layer of electroless plating reaction. Table one is a summary of the steps required for the process one proposed by the present invention: ----------- --- (Please read the notes on the back before filling out this page) —The size of the paper is applicable to the Chinese National Standard (CNS) A4 (210X297 mm) 512185 Printed by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 B7 5. Description of the invention (K) Table 1: Steps in process one Process steps 100-Fig. 1A provides a semiconductor substrate (10); Step 102-Fig. 1A Fabricates a diffusion barrier layer (20) on the semiconductor substrate (10) The diffusion barrier layer can be fabricated by physical vapor deposition (PVD) or chemical vapor deposition (CVD) methods; Step 102 ― FIG. 1A The material of the diffusion barrier layer can be hafnium titanium, titanium nitride, molybdenum nitride, and tungsten nitride. Or tantalum nitride; step 104, forming an adhesion layer (30) on the diffusion barrier layer (20), the material of the adhesion layer may be polycrystalline silicon; step 10 6-FIG. 1B depositing palladium (40) on the sputtering method Step 108-Figure 1C Key step: heat treat the wafer to make the metal palladium (40) react with the polycrystalline silicon layer (30) to form palladium silicide (50). The temperature required for this reaction is about It is 230-270QC and the reaction time is 20-40 minutes. The reaction can be carried out in air or nitrogen atmosphere. Step 110-FIG. 1D Pattern the palladium silicide layer (50) so that the palladium silicide layer forms a pattern of connecting wires. Step 112-FIG. 1D Use the palladium silicide layer (50) as a dry etching mask to prevent the diffusion barrier layer ( 20) Carry out #engraving so that it also has a pattern of connecting wires; Step 114 ― FIG. 1E The electroless method is used to deposit a wire metal layer (60) on the wire pattern of the palladium silicide layer (50) to make it a real component on the device Metal connection wires. —Lllr.-I — #! (Please read the notes on the back before filling out this page) The size of the paper is applicable to the Chinese National Standard (CNS) Α4 specification (210 × 297 mm) (7 512185 Staff Consumption of the Central Standards Bureau of the Ministry of Economic Affairs Cooperative prints A7 B7 V. Description of the invention (丨 的 The parameter values listed in this issue all have a target value and an upper J limit. This expression is not because these parameters affect the manufacturing process ... If the indication is not sensitive, the indication is particularly important for the non-electric clock solution, and it can also make it easier for everyone to understand the content of the present invention. The following table is a detailed compilation of the key Lx of the process and its importance: Table 2: F 51 ^ Steps in Process 1 ~ Description 108 1C For the electroless plating process, palladium silicide is a very good adhesion material. This material can be electrolessly plated without any activation; 108 1C The heat treatment temperature is very low and can be carried out in the air; 114 1E electroless palladium, copper or nickel can be selectively deposited on the extinction layer. The first system for making metal wires. A cross-sectional view is shown in FIGS. 1A to 1D. The semiconductor substrate (10) required for this process is to allow components to be fabricated thereon. 'FIG. 1A is a diffusion barrier layer (20) deposited on a semiconductor substrate (10). ), The material of this diffusion barrier layer can be tungsten titanide, titanium nitride, nitride nitride, tungsten nitride, or hafnium nitride, but tungsten nitride, titanium nitride, and molybdenum nitride are the best. The diffusion barrier layer (20) can be fabricated by physical vapor deposition (PVD) or chemical vapor deposition (CVD), and the thickness of the diffusion barrier layer (20) can be about 30 to 50 nm. Next, step (104) is performed by Low pressure chemical vapor deposition (LPCVD) method deposits a polycrystalline silicon layer (30) The paper size is applicable to China National Standard (CNS) A4 specification (21 OX 297 mm) — .1 — — ! —— t! (Please read the notes on the back before filling this page) Order 512185 Printed by the Consumers' Cooperative of the China Standards Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (〇) As the adhesion layer, the thickness of this polycrystalline silicon layer It can be from 140 to 160 nm. Figure 1 is a cross-sectional view of this process. Step 106 is sputtering palladium metal (40) on the polycrystalline silicon layer (30) by sputtering (see FIG. 1C). The thickness of the palladium metal layer (40) can be 200 to 250 nm, and FIG. Cross-section view. Step 108-Make palladium silicide (PdSij layer. This palladium metal reacts with the polycrystalline silicon layer through a heat treatment step to form a palladium silicide layer (50). The heat treatment temperature is about 230 to 270. (: (target value is 250 ° C) ), The reaction time is about 20 to 40 minutes (the target value is 30 minutes), and the heat treatment can be performed in the air or under a nitrogen atmosphere. The important characteristic of this palladium silicide (50) layer is that its surface does not need to be subjected to any surface treatment and activation steps before the electroless plating reaction. Figure 1D is a cross-sectional view of this structure. Step 11 〇 —patterning the palladium silicide layer 〇 This step is to remove the palladium silicide that is not covered by photoresist using lithography technology and dry etching to make it have the pattern of the wire. The lithography technology includes photoresist coating, exposure, and development (these processes are not shown in cross-section), and then the exposed palladium silicide metal is removed by dry etching. Step 110 also includes removing the photoresist on the palladium silicide. Step 112-Dry etching of the thin barrier layer. Step 112 refers to using the palladium silicide (50) as an etching mask to etch the diffusion barrier metal. Step 114-Boom! The metal wire is made by plating Γ6). Next, in step 114, a metal wire (60) material is deposited on the palladium silicide (50) layer by electroless plating. The metal wire material may be Kylon, copper, or nickel metal. The composition of the non-electrical clock solution required for the deposition of these metals is arranged in the following table: This paper size is applicable to China's (CNS) Eighty Four Difficulties ((210 X 297 mm) " ~ ~ 19 I. -ml i «ml tm— In · — Mm I Hi (please read the precautions on the back before filling out this page) Order 512185 A7 B7 V. Invention Description (R) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economics Table 3: Chemical composition of electroless copper solution Lower limit of unit Copper sulphate g / L; 5.8 6.2 grams / litter Sodium citrate g / L 4.5 15.5 Nickel sulphate g / L 0.45 0.55 times sodium sulphate (Sodium g / L 10.2 11.0 hypophosphite) Thickness nm 800 900 Table 4: Lower limit upper limit of chemical composition unit of electroless nickel solution Nickel chloride g / L 28 32 Sodium htpophosphite g / L L 7 8 Sodium citrate g / L 70 75 Ammonium chloride g / L 45 50 pH value 9.1 9.3 Temperature ° C 70 75 Table 5: Electroless palladium solution Upper limit of chemical composition unit Palladium chloride g / L 3.6 4.4 Sodium htpophosphite g / L 10.5 21 Hydrogen ^ [Sodium hydrox) g / L 10 20 pH 9.1 9.3 Temperature (Temperature) 0C 40 45

ItI-ί · ——Fee— (Please read the notes on the back before filling this page) The size of the paper is applicable to the Chinese National Standard (CNS) M specification (210 X 297 mm) 512185 A7 B7 V. Description of the invention (Q ) Process 2-The electroless plating method is used to selectively deposit a metal on a polycrystalline silicon layer, aluminum or a metal layer. The cross-sectional views of the second process proposed in the present invention for making metal wires are shown in FIGS. 2A to 2D. . In this process, electroless plating is used to selectively deposit an adhesion layer (130) on an aluminum, titanium, or polycrystalline silicon layer to form a metal connection wire. The key steps of the process two are summarized as follows: Table 6: Key steps of the process two Diagram reason 204 2A uses aluminum, titanium or polycrystalline silicon layer as the adhesion layer to facilitate the occurrence of electroless plating reaction; 208 & 210 2B no plating reaction occurs Surface pre-treatment must be performed on the aluminum, titanium or polycrystalline stone layer before this step. This step includes acid-alkali washing and activation treatment. The semiconductor structure is fabricated on a semiconductor substrate (10), and the semiconductor structure includes regions such as a conductor layer and an insulating layer. Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling this page) Figure 2A is a cross-sectional view of step 202. The diffusion barrier layer (120) is deposited on the semiconductor substrate. The material of the diffusion barrier layer may be tungsten titanium, molybdenum nitride, nitrided crane, nitrided nitride, or nitrided group, and the best materials are hafnium nitride, nitrided nitride, and nitrided nitride. The ideal thickness of the diffusion barrier layer is 30 to 50 nm, and the diffusion barrier layer can be formed by physical vapor deposition or chemical vapor deposition. The 130 layer in FIG. 2A refers to an adhesion layer, and the material of the adhesion layer is preferably (a) polycrystalite, (b) inscription, or (c) titanium. The material of this adhesion layer (the paper size of titanium and titanium is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) 4 A7 ^-一 ______B7_____ _ V. Description of the invention (M) or polycrystalline silicon layer) is the present invention The key point in the case is that the thickness of this adhesion layer is preferably between 100 and 200 nm. Then, step 206 is to cover the photoresist (132) on the adhesion layer (130). In step 208, pre-processing is performed on the wafer after exposure and development, and the pre-processing process is related to the material of the adhesion layer. The following table is a summary of the pre-treatment process of three different adhesive materials: To the main: pre-treatment of polycrystalline silicon, aluminum and titanium metal 裎 compound crystal sentence aluminum titanate alkaline washing hydrofluoric acid solution sodium hydroxide solution stone Shale acid or hydrofluoric acid is treated with an activating solution containing a periodical ion (the composition of the activating solution is chlorinated 0.1-0.2g / L; hydrofluoric acid 200-300g / L; glacial acetic acid 450-500g / L). There are two options: A. Treatment with activating solution containing Ιε ions (activating solution composition is 0.1-0.2g / L of palladium chloride; 200-300g / L of hydrofluoric acid; 450-500g / L of glacial acetic acid) Β · Zn Replacement (solution composition is 120g / L sodium hydroxide; zinc oxide 10g / L; Shuna tartrate 50g / L; sodium nitrate lg / L) zinc replacement (solution composition is sodium hydroxide 120g / L; zinc oxide 10g / L; Tartaric acid _ Sodium 50g / L; Sodium nitrate lg / L) This paper size applies to Chinese National Standard (CNS) A4 specifications (2 丨 〇 > < 297 mm) 2 ^ I-rl · ί ------ (Please read the precautions on the back before filling out this page) Order printed by the Consumers Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 512185 A7 B7 V. Description of the invention (2 丨) Step 210-Electroless plating method Nickel, copper or palladium. FIG. 2B is a cross-sectional view of step 208. The electroless plating method is used to deposit nickel, copper, or palladium metal. Even if the materials of the adhesion layers are different, the electroless plating process is the same. This part is the key point in the present invention. Step 210 (Method A)-depositing nickel metal on the adhesion layer (130) by electroless plating. Next, nickel metal is deposited on the polycrystalline layer by electroless plating. Before the electroless plating reaction is performed, the surface of the polycrystalline layer is The palladium metal must be used to make the surface of the polycrystalline silicon catalytic, and the thickness of the electroless plating layer can be 800 to 1000 nm. The pH of the electroless plating solution is between 9 and 11 (target value is 10) and the solution temperature is between 87 and 93 ° C (target value is 90 ° C). There are many options for the solution required to deposit the nickel metal layer by electroless plating. The following tables will list the composition of four different electroless nickel solutions and the content of reducing agent in the deposited layer. (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs Table 8: Nickel content in the coatings deposited by four different electroless plating solutions (wt%) (± 1%) ) Fill (wt%) (± 1%) Boron (wt%) (± 1%) 1 96 4 0 2 97 0 3 3 93.5 6.5 0 4 91.5 8.5 0 Topsoil: the lower limit of the first electroless nickel solution solution composition Value / unit upper limit Nickel sulphate 25 30 g / L 35 sodium hyposulfite (Sodium 6.5 7.5g / L 10 hypophosphite) This paper size is applicable to China National Standard (CNS) A4 specification (210X 297 mm) ^ 3 512185 5. Description of the invention: (. ^ A7 B7 Ammonium chloride Ethylene diamine Temperature Temperature pH 6 8.0g / L 10 50 60 g / L 70 70 72 ° C 75 9.8 10 10.2 Table 10: The lower target value of the composition of the second electroless nickel solution solution / the upper limit of the unit Nickel sulphate 25 30 g / L 35 Dimethylamine 2.5 3 g / L 3.5 borane Lactic acid 20 25 g / L 30 Citric acid 20 25 g / L 30 Chlorine ^^ Ι $ ( Αιηπήιύιπη chloride) 20 30 g / L 40 Urea (Thiourea) 0.8 1 mg / L 40 Temperature (Temperature) 70 72 ° C 75 Acid value (pH) 9.8 10 10.2 (Please read the precautions on the back before filling this page) Printed by the Consumers' Cooperative of the China Standards Bureau of the Ministry of Economic Affairs. Table 11: The lower target value of the third electroless nickel solution solution / unit upper limit Nickel sulphate 26 28 g / L 30 sodium structural acid (Sodium 16 17 g / L 18 hypophospite) Sodium citrate 55 60 g / L 65 Amminium sulphate 60 65 g / L 70 pH 8.5 9.1 9.5

This paper size applies the Chinese National Standard (CNS) A4 (210X297 mm) 512185 A7 B7 Five invention description (U) Table 12: The fourth electroless nickel solution solution composition Nickel chloride secondary filling acid Sodium hypophospite Sodium succinate pH value

Target value / unit ------ 25 g / L 27 g / L The biggest advantage of the electroless nickel plating process proposed by the present invention is that regardless of the type of reducing agent (phosphorus or boron) or the content of reducing agent (low Phosphorus and medium phosphorus are high phosphorus) can be applied to this process. ^ Step (210) Method of sinking layer ^^ This step uses electroless plating technology to deposit copper wire metal on the adhesion layer (13〇). The composition of this electroless copper solution is shown in the following table: (Please read the back first Please pay attention to this page and fill in this page)-Order printed by the Consumers' Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. Table 13: Lower limit upper limit of copper sulphate for solution components in electroless copper solution g / L 5.8 6.2 Sodium citrate citrate) g / L 14.5 15.5 Nickel Sulphate g / L 0.45 0.55 Sodium hypophosphite g / L 10.2 11.0 Step J210 (Method C)-Settle the metal layer on the adhesion layer. This step is The electroless plating technique is used to deposit the palladium metal wire on the adhesion layer (130). The composition of this electroless mineral insulation solution is as follows: This paper size applies to the Chinese National Standard (CNS) A4 specification (21 × 297 mm) r 512185 A7 B7 V. Description of the Invention (Yin) Table 14: Lower limit upper limit gas of electroless palladium solution solution unit unit (Palladium chloride) g / L 3.5 4.4 Sodium hydroxide ml / L 10 20 times S o dium g / L 10.5 21.0 hypophosphite) pH 8 10 Temperature ° C 40 50 Figure 2C is a cross-sectional view of the photoresist layer (132) removed. This photoresist layer is removed by oxygen ashing ( 〇2 ashing) method. FIG. 2D refers to the removal of the adhesion layer and the diffusion barrier layer between the metal wires by a dry etching process. FIG. 2E shows a top view of the metal connecting wire (140), and the metal wire can be manufactured by the methods of process one and process two proposed in the present invention. Process 3-Use the grinding method to roughen the diffusion barrier layer to make the solder bumps printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling this page) The process 3 proposed in the present invention is The chemical barrier is used to roughen the diffusion barrier layer to facilitate subsequent electroless copper, nickel or palladium metal deposition. Then solder bumps are fabricated on the electroless nickel layer. The process of making solder bumps in this set is shown in Figures 3A to 3D: This paper size is applicable to China National Standard (CNS) A4 specifications (210X 297 mm) 512185 A7 B7 V. Description of the invention () Table 15: Process 3 The key steps of the step diagram reason 306 3B use chemical mechanical polishing method to roughen the surface of the diffusion barrier metal layer for activation purposes. 314 3E uses electroless (240) plating as the adhesion layer for solder bumps (250). The main steps of this process are summarized as follows: Table 16 printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs: Process step diagram of process three & step process diagram 3A-step 302 A thin aluminum layer (220) is deposited on a semiconductor substrate ( 10) Top; FIG. 3A-Step 304 A diffusion barrier layer (230) is deposited on the aluminum (220). The material of the diffusion barrier layer may be titanium crane, titanium nitride, nitride nitride, hafnium nitride, or tantalum nitride. Figure 3B-Step 306 grinding the diffusion barrier layer (230) to roughen its surface, this polishing liquid contains 0.3 / m of 1 L powder, the wafer rotation speed is about 300rpm; Figure 3C aluminum metal (220) and The diffusion barrier layer (230) is patterned; Figure 3D-Step 310: The surface of the diffusion barrier layer (230) is activated with an activating solution containing a palladium chloride component, and the composition of the activating solution is palladium chloride (PdCl2) 0.1-0.2g / L, hydrofluoric acid (HF) 200-300g / L, and acetic acid (CH3COOH) 450-500g / L; II —---- Fees—I (Please read the precautions on the back before filling this page) — Order This paper size applies to Chinese National Standard (CNS) A4 (210X297 mm) 512185 A7 B7 V. The invention is said to be ^ ·%. Figure 3D-step 312 uses an electroless plating technique to deposit a metal layer (240) on the diffusion barrier layer (230); Figure 3E-step 314 on the electroless metal layer (240) to make a solder bump Point (250), the material of this solder bump is a lead-tin alloy; FIG. 3A is a cross-sectional view showing step 302. The deposition conditions of the aluminum layer (220) in this figure are arranged as follows: Table 17: Sputtered aluminum Metal layer process conditionsDeposition method

It-^ 1 '--- (Please read the notes on the back before filling this page) Thickness nm 1750 1800 1850 Pressure mtorr 7 7.5 8.0 Temperature

° C 290 300 310-Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs This aluminum metal layer (230) can be pure aluminum or aluminum-silicon-copper alloy. Step 304-Diffusion barrier metal layer deposition FIG. 3A shows a structure diagram of step 304. The diffusion barrier metal layer (230) may be tungsten titanide, titanium nitride, molybdenum nitride, tungsten nitride or tantalum nitride. The diffusion barrier layer The thickness is about 100 to 140 nm. Step 306-Chemical Mechanical Polishing Figure 3B shows the use of a chemical mechanical milling or polishing process to roughen the surface of the diffusion barrier metal layer. Step 306 is quite critical in this process because this step increases the activation efficiency. At present, this process uses 0.3 m of alumina powder as the grinding liquid, and the rotation speed of the grinding machine is about 300 rpm. Step 306-Activation This activation process is composed of two steps; (1) First use hydrofluoric acid to clear the paper and apply the Chinese National Standard (CNS) A4 specification (210X 297 mm). The staff of the China Standards Bureau of the Ministry of Economic Affairs consumes Cooperative printed policy A7 ___B7_____ 5. Description of the invention (Θ) ^ eve chip; (2) activation of the diffusion barrier layer with an activation solution containing vaporized palladium, the composition of this activation solution is 0.1-0.2 g / L palladium chloride; 200-300g / L of hydrogen and 450-500g / L of glacial acetic acid. FIG. 3C refers to patterning the aluminum wire layer (220) and the diffusion barrier layer (230). This process uses photoresist coating, exposure, and development processes to prepare a wire pattern on the diffusion barrier layer, and then uses dry etching. Way to etch aluminum metal wires and diffusion barrier layers. Figure 3D refers to activating the surface of the diffusion barrier layer with an activating liquid, the components of this activating liquid are listed in the following table: Wife 18: Upper limit of the lower limit of the unit of the activating liquid component | Palladium (Pdcy G / L 0.1 0.2! Fluoric acid (HF ) G / L 200 300 Ch3cooh G / L 450 500 Step 312- Using a thunder-free method to deposit fine metal (230) on the diffused diffusion barrier MΛ220) ± Figure 3D (Step 312) shows that A metal (230) is deposited on the diffusion barrier layer by electroless plating technology. The metal layer can be copper, copper, or aluminum. These electroless metal solutions are the same as the second process in the present invention. Step 314 ~ Production of solder bumps FIG. 3E refers to the production of solder bumps (250) on the metal layer (240). The material of the solder bumps (250) is preferably a lead-tin alloy, and the thickness of the solder bumps It is preferably 25-50, and the area can be 100 X 100 / zm2. Conclusion Among the three processes proposed in the present invention, the first process is used to make metal wires. The key steps are: Step 108-Palladium silicide layer (50). The paper size in the table below applies to the Chinese national standard ( CNS) A4 specifications (X 297 male thin) (Please read the notes on the back before filling this page) Order 1I 1- i 512185 A7 B7 V. Description of the invention (4) The key processes and their importance are listed: Table Nineteen: Key technical steps of process one. Reason 108 1C For the electroless clock deposition technology, Shi Xihua made the material a very good catalytic layer material; 114 1E electroless copper and nickel can be selectively deposited on Shi Xihua. In terms of materials; the second process proposed in the present invention to make metal connection wires, the key steps are arranged in the following table: Table 20: Key technologies for making f = 2. Step diagram reason 204 2A Spar or titanium as the adhesion layer (130); 208 & 210 2B Pre-treat the surface of aluminum, titanium or polycrystalline silicon to facilitate the subsequent electroless plating reaction. The previous treatment included acid inspection and activation; Ministry of Economic Affairs Zhongli Printed by the Consumer Bureau of the Prospective Bureau (please read the precautions on the back before filling out this page) The method proposed in Process 2 is to use aluminum, titanium and polycrystalline silicon as the adhesion layer (130), so that the metal layer material can be used without Electroplating is deposited on the adhesion layer. However, the pretreatment step on the adhesion layer is very important. The base pretreatment includes acid and alkali washing, activation or zinc replacement. The process of metal wire proposed in this process two is completely compatible with the process of integrated circuit. The third process proposed in the present invention is the use of electroless plating technology to produce solder bumps. The key steps of this process are: chemical mechanical polishing to roughen the surface of the diffusion barrier layer to facilitate subsequent electroless plating reactions, This paper size does not apply to the Chinese National Standard (CNS) A4 specification (210 > < 297 mm) 9 0512185 A7 B7 V. Description of the invention) The metal layer of the key is best recorded with copper or copper because of their solderability. (Solderable) are all good. In addition, this process can take advantage of the selective deposition characteristics of electroless plating, thereby saving a photomask. Those skilled in the art will understand that the exemplary descriptions in the present invention are only examples in this case, not limitation. The process, structure and dimensions mentioned in the present invention can be modified at any time. These processes, structures, and the scope of the following patent applications are the spirit of the present invention. ----------- # ^ — 1 (Please read the notes on the back before filling out this page) — Order the paper standard printed by the Staff Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs (CNS) ) A4 size (210 X 297 mm) 3 1

Claims (1)

Announcement Am8 C8 D8 VI. Application scope of patent ~~ '--- 1. A method for manufacturing metal wires on electroless plating technology on a palladium silicide material with a catalytic surface, including at least the following steps: a. Provide a semiconductor-based Material structure; b. Making a "diffusion barrier layer" on the above-mentioned semiconductor substrate structure; C. forming an adhesion layer on the diffusion barrier layer described above, the adhesion layer may be a polycrystalite layer; d. Using a base plating The method deposits a metal layer on the above-mentioned adhesion layer. E. The above-mentioned palladium metal layer is heat-treated to form a palladium silicide (pdSiJ layer; f. The above-mentioned palladium silicide metal layer is patterned so that the palladium silicide metal layer has a metal connection The pattern of the wires; g. The above palladium silicide metal layer is used as a shielding cover, and the diffusion barrier layer is etched by a dry etching method so that the diffusion barrier layer also has the shape of a connecting wire; h. The electroless plating technology has the characteristics of selective deposition, and Metal is deposited on the above palladium silicide metal layer. The material of the metal layer is an element selected from the group consisting of nickel, copper and palladium. This electroless deposition process is not required. The activation step can be performed. Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 2 ·· The method described in item 1 of the scope of patent application, where step h further includes ·· The copper metal layer can be selectively deposited on the Above the palladium silicide layer, the thickness of this copper metal can be between 800 and 900 mn, and its electroless copper plating solution contains at least: copper sulphate: concentration 5.8 -6.2g / L 'Sodium citrate : Concentration 14.5-15.5 g / L, nickel sulphate: Concentration 0.45-0.55 g / L, and sodium hypophosphite: Concentration 10.2-11.10 g / L. 3 · If requested The method according to item 1 of the patent scope, wherein step h further comprises: selectively depositing a nickel metal layer on the palladium silicide layer, the thickness of the nickel metal is between 180 and 220 nm, and its electroless nickel is electroless Dissolved paper standards are applicable to Chinese National Standards (CNS) A4 (210X297 mm) '3Z 512185 A8 B8 C8 D8 VI. Patent application scope The liquid contains at least: nickel chloride: concentration 28-32 g / L (Sodium Hydrate) pophosphite) · • Concentration 7-8 g / L, sodium citrate: concentration 70-75 g / L, ammonium chloride: concentration 45-50g / L, pH value is 9 · 1-9.3, the deposition temperature is 70-75 ° C. 4. The method according to item 1 of the scope of patent application, wherein step h further comprises: optionally depositing a metal layer of εε on the layer of petrochemical layer, and the solution of the electroless clock handle at least contains: chloride 〇PdCl2): concentration 3.6-4.4g / L, sodium hypophosphite (NaH2P02.H20): concentration 10.5-21 g / L, sodium hydroxide (NaOH): concentration 10-20 ml / L, pH value (pH) It is 8-10 and the deposition temperature is between 40-50 ° C. 5. The method as described in item 1 of the scope of patent application, wherein the above-mentioned palladium silicide metal layer is made by heat treatment, and the heat treatment temperature is 230-270 W 'The heat treatment time is about 20-40 minutes. This heat treatment process can be performed in the atmosphere Or in a nitrogen atmosphere. 6. The method according to claim 1, wherein the material of the diffusion barrier layer is selected from the group consisting of tungsten titanide, titanium nitride, molybdenum nitride, tungsten nitride, and nitride buttons. 7. The method according to item 1 of the scope of patent application, wherein the thickness of the palladium metal wire layer is about 800 to 1000 nm. Printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs of the People's Republic of China 8 — A method for manufacturing metal wires on a catalytic palladium silicide metal layer using electroless plating technology, including at least the following steps: α Provide a semiconductor substrate structure; b. Fabricating a diffusion barrier layer on the semiconductor substrate structure; b-1. The material of the diffusion barrier layer is selected from the group consisting of tungsten titanium nitride, titanium nitride, molybdenum nitride, tungsten nitride, and tantalum nitride; c. Make an adhesion layer on the above diffusion barrier layer. This adhesion layer can be in accordance with the Chinese National Standard (CNS) A4 specification (210X297 mm) at this paper size. 52) M2185 A8 B8 C8 -------- The patent scope of D8 and M is a compound silicon layer; d • depositing a palladium metal layer on the above-mentioned adhesion layer by using a base plating method; heat-treating the above palladium metal layer to form a palladium silicide layer; bu 1. The heat treatment for forming the above-mentioned palladium silicide layer is performed at a temperature of 230-270 ° C 'and the treatment time is about 20-40 minutes. The heat treatment environment can be performed in the atmosphere or nitrogen; f • The above-mentioned palladium silicide metal layer Make the above-mentioned palladium silicide metal layer have a pattern of metal connecting wires; g. Use the above-mentioned palladium silicide metal layer as a shielding cover, and use a dry etching method to engrav the above-mentioned diffusion barrier layer so that the above-mentioned diffusion barrier layer is also connected. The shape of the wire; h · using electroless plating technology with selective deposition characteristics, the metal is deposited on the above palladium silicide metal layer, the metal layer material is selected from the group consisting of nickel, steel and elements This is no electric clock deposition. Smuggling does not require an activation step. 9. The method according to item 8 of the scope of patent application, wherein step h further comprises: selectively depositing a copper metal layer on the palladium silicide layer, and the thickness of the copper metal may be between 800 and 900 nm, Its electroless copper electroplating valley contains at least: copper sulphate: concentration 5.8-6.2g / L, sodium citrate: concentration 14.5-15.5 g / L, nickel sulfate ( nickel sulphate): concentration of 0.45-0.55 g / L, and sodium hypophosphite: concentration of 10.2-11.0 g / L 10. The method according to item 8 of the scope of patent application, wherein step h is further Including: a nickel metal layer can be selectively deposited on the palladium silicide layer, the thickness of the nickel metal can be between 180 and 220 nm, and its electroless nickel solution at least contains: nickel chloride · • concentration 28- 32g / L, sodium hypophosphite: Concentration 7 ~ 8 g / L, citric acid This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) 3 buckets! I Γ J-1-* -1 ITS------- -I 1 · I n (Please read the notes on the back before filling this page ) Ordered by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs and printed by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. (Ammonium chloride): concentration of 45-50g / L, pH value is 9.1-9.3, and deposition temperature is 70-75. (:. 11) The method according to item 8 of the scope of patent application, wherein step h further comprises: selectively depositing a palladium metal layer on the palladium silicide layer, and its electroless palladium solution contains at least: chloride Palladium (PdCl2): concentration 3.6-4.4g / L, sodium hypochlorite (NaH2P02.H20) · · concentration 10.5-21 g / L, sodium hydroxide (NaOH): concentration 10-20ml / L, acid The alkalinity value (pH) is 8-10, and the deposition temperature is between 40-50 ° C. 12 · —A method of depositing copper or nickel on an adhesion layer by using non-electrical technology. The material of the adhesion layer includes polycrystalline stone, g or titanium, including at least the following steps: a. providing a semiconductor substrate; b. depositing a diffusion barrier layer on the semiconductor substrate; b-1. the material of the diffusion barrier layer is selected from the group consisting of tungsten titanium, A group consisting of titanium nitride, sulfonium, nitride, and gasification; c • depositing an adhesion layer on the above diffusion barrier layer, the material of this adhesion layer is selected from the group consisting of polycrystalite, aluminum and titanium The group formed; d. Using the lithography technology to make the shape of the metal wire on the above-mentioned adhesion layer; e. The above-mentioned adhesion layer covered with photoresist is subjected to acid-alkali washing and activation steps; f • the electroless plating method can be used to selectively deposit on the above-mentioned adhesion layer, and the metallic material is selected from the group consisting of copper, nickel and palladium G · remove the photoresist on the surface of the adhesion layer; and h · etch dry the adhesion 2 and the diffusion barrier layer not covered by the wire metal by dry etching to form a metal wire junction (please read first (Please fill in this page on the back of ii) 512185 A8 B8 C8 D8 VI. Application for patent scope 13. The method as described in item 12 of the patent application scope, wherein the material of the above-mentioned adhesion layer may be polycrystalline silicon, and the pretreatment of the polycrystalline silicon includes ... The surface of the polycrystalline silicon is activated by an acid (HF) cleaning solution, and then an activating solution containing palladium ions is used. The components of the activating solution include at least: palladium chloride (PdCl2): concentration 0.1-0.2 g / L, hydrofluoric acid ( HF): Concentration 200-300g / L, and Acetic acid (CH3COOH): Concentration 450-500 g / L. 14. The method according to item 12 of the scope of patent application, wherein the material of the adhesion layer can be aluminum, and the pretreatment of aluminum includes: firstly washing with sodium hydroxide (NaOH), and then using an activating solution containing palladium ions Activated aluminum surface. The component of this activating liquid contains at least: palladium chloride (PdCl2): concentration 0.1-0.2 g / L, hydrofluoric acid (HF): concentration 200-300g / L, and acetic acid (CH3COOH): concentration 450-500 g / L 〇15. The method according to item 12 of the scope of the patent application, wherein the material of the adhesion layer may be aluminum, and the pretreatment of aluminum includes: alkali washing with sodium hydroxide (NaOH), and then replacing with zinc The surface of the aluminum is activated by the following method. The composition of the replacement liquid is sodium hydroxide (NaOH): concentration 110-130 g / L, zinc oxide (ZnO): concentration 8 ~ 12 g / L, potassium sodium tartrate (C4H4KNa06.4H20): Concentration 45-55 g / L, sodium nitrate (NaN03): 0.9-l.lg / L. Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs 16. The method described in item 12 of the scope of patent application, wherein the material of the above-mentioned adhesion layer may be an inscription, and the pretreatment includes: first pickling with hydrofluoric acid (HF) Then, the surface of aluminum is activated by means of zinc replacement. The composition of this zinc replacement solution is sodium hydroxide (NaOH): concentration 110-130 g / L, zinc oxide (Zn〇) · · concentration 8-12 g / L, potassium tartrate Sodium (C4H4KNa06.4H20): concentration of 45-55 g / L, sodium nitrate (NaN03): concentration of 0.9-l.lg / L. 17. · A method for depositing copper or nickel on an adhesion layer by using electroless plating technology. The material of the adhesion layer includes polycrystalline silicon, aluminum or titanium, and includes at least the following steps: a. Provide a semiconductor substrate; China National Standard (CNS) A4 specification (210X297 mm) 36 Printed by the Employees' Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs) 12185 A8 B8 C8 —_______ _D8 _ __ VI. Application scope of patent b. Deposit a diffusion barrier layer on the above On a semiconductor substrate; b-1. The material of the above diffusion barrier layer is selected from the group consisting of tungsten titanide, titanium nitride, molybdenum nitride, tungsten nitride, and nitride button; c • depositing an adhesion layer on On the above-mentioned diffusion barrier layer, the material of the adhesion layer is selected from the group consisting of polycrystalline spar, ming and titanium; d. The shape of the metal wire is made on the adhesion layer using the lithography technique; e. The above-mentioned adhesion layer not covered by photoresist is subjected to acid cleaning and activation steps; f. Selective deposition of metal on the above-mentioned adhesion layer using electroless ore technology; f-1. This electroless nickel plating solution is sulfuric acid ( nickel sul phate): concentration 25-35 g / L, sodium hypophosphite: concentration 7.5-10 g / L, ammonium chloride: concentration 6-10 g / L, Ethylene diamine ) · • Concentration 50-70 g / L, deposition temperature 70-75. (3, pH value is 9.8-10.2, and the content of the plating layer is 95-97 wt% of nickel, 3-5 wt% of scales; g. Removing the photoresist on the surface of the adhesion layer; In addition, h. The dry adhesion method is used to etch the above-mentioned adhesion layer not covered by the wire metal and the above diffusion barrier layer to form a metal wire structure. 18 · —a method using electroless plating as an adhesion layer material to deposit on the diffusion barrier layer The above method includes at least the following steps: a. Providing a semiconductor substrate; b. Depositing an aluminum metal layer on the semiconductor substrate; c. Depositing a diffusion barrier layer on the aluminum metal; It is selected from tungsten titanide, titanium nitride, molybdenum nitride, tungsten nitride, and t 圏 圉 豕 standard (CNS) A4 specification (21〇χ29? Mm) 3 纸张 (please read the notice on the back first) (Fill in this page again) — Order the group consisting of 512185 A8 B8 C8 ________ printed by the Consumers Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs, a group consisting of D8 holes and patented patents for short nitride; Barrier to proliferation The surface of the layer is roughened; e. Making a metal wire pattern on the aluminum metal layer and the diffusion barrier layer; f. Pickling the surface of the diffusion barrier layer with an HF solution; g. Using an activating solution to surface the diffusion barrier layer Activation; h · depositing metal on the above diffusion barrier layer material by electroless plating method; "this metal layer material is selected from the group consisting of copper, nickel, and copper; and 1. making solder bumps on said electroless metal layer In addition, the solder bump material may be a lead-tin alloy. 19. The method according to item 18 of the scope of patent application, wherein the method for roughening the diffusion barrier layer material is grinding using an oxide powder containing 3 // m For liquid grinding, the grinder rotates at a speed of 270 to 300 rpm. 〇20. The method described in item 18 of the patent application, wherein the height of the solder bump is 25 to 50 / zm. The method described above, wherein the diffusion barrier layer is activated by using an activating solution containing palladium ions, and the components of the activating solution at least include: vaporized palladium (PdCl2): 0.1-0.2 g / L, fluorenic acid (HF): concentration 200 — 300g / L And acetic acid (CH3COOH): concentration 450-500 g / L. 22. The method according to item 18 of the scope of patent application, wherein step h further comprises: the thickness of said electroless copper is 800 to 900 nm, and Electroless copper solution at least contains: copper sulphate: concentration 5.8-6.2 g / L; sodium citrate: concentration 14.5-15.5 g / L, nickel sulphate: concentration 0.45 — 0 · 55 g / L, and this paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page) Order 512185 A8 B8 C8 D8 6. Scope of patent application Sodium hypophosphite: concentration 10.2-11.0 g / L. 23. The method according to item 18 of the scope of patent application, wherein step h further comprises: the thickness of said electroless nickel is between 800 and 900 nm, and its electroless copper solution contains at least nickel chloride ( nickel chloride): concentration 28-32 g / L, sodium hypophosphite: concentration 7-8 g / L, sodium citrate: concentration 70-75 g / L, ammonium chloride ) 45-50 g / L, pH value is 9.1-9.3, and deposition temperature is between 70-75 ° C. 24. The method according to item 18 of the scope of patent application, wherein step h further comprises: the thickness of said electroless palladium is between 800 and 900 nm, and its electroless palladium solution contains at least: palladium chloride (PdCl2 ): Concentration 3.6-4.4g / L, sodium hypophosphite (^ 21 ^ 〇2.1120): concentration 10.5--21§ / 1 ^, sodium hydroxide (^ 011): concentration 10-20ml / L, acid The base number (pH) is 8-10, and the deposition temperature is 40-50. (: Between. 25. — A method of depositing electroless plating as an adhesion layer material on a diffusion barrier layer, including at least the following steps: a. Providing a semiconductor substrate; b. Depositing an aluminum metal layer on the semiconductor On the substrate; c. Depositing a diffusion barrier layer on the above-mentioned aluminum metal, the material of the diffusion barrier layer is selected from the group consisting of tungsten nitride, titanium nitride, molybdenum nitride, tungsten nitride, and nitride button Printed by the Consumer Cooperatives of the Central Bureau of Standards, Ministry of Economic Affairs (please read the precautions on the back before filling this page) d. Grind the surface of the diffusion barrier layer to make the surface of the diffusion barrier layer rough; e. Make metal wires A pattern on the aluminum metal layer and the diffusion barrier layer; f. Pickling the surface of the diffusion barrier layer with a hydrofluoric acid (HF) solution; g. Activating the surface of the diffusion barrier layer with an activating solution containing palladium ions' The component of this activating fluid contains at least: PdCl2 gasification: concentration 0.1-10 · 2 g / L, hydrofluoric acid (HF): concentration 200-300g / L, acetic acid paper standard universal r hoarding standard (CNS ) a4 size (210 × 297 male ) 39 512185 A8 B8 C8 D8, patent application scope (CH3C00H): concentration 450-500 g / L; h. Metal is deposited on the above diffusion barrier layer material by electroless plating. The metal layer material can be copper, nickel or Palladium; hl. Its electroless copper plating solution contains at least: copper sulphate: concentration 5.8-6.2 g / L; sodium citrate: concentration 14.5-15.5 g / L, nickel sulphate ): Concentration 0.45-0.55 g / L, and secondary sodium g filling (sodium hypophosphite) ·· Concentration 10.2-11.0 g / L. 1. Make solder bumps on the above electroless metal layer. This solder bump material It may be a lead-tin alloy. 26. The method according to item 25 of the scope of patent application, wherein grinding is performed using an alumina powder grinding liquid containing 0.3, and the speed of the grinder is 270 to 30. rpm. 27. According to the patent application The method described in the item 25 of the range, in which the height of the solder bump is 25 to 50 // m. Please read the back • Notes before filling out this page. It will be printed by the Central Consumers Bureau of the Ministry of Economic Affairs. Applicable in a country A foot sheets a paper PCT well-C29 ^