鲤濟部中央標準局員工消費合作社印裂 3797twf.doc/008 B7 ________________________—--— 五、發明説明（1 ) 本發明是有關於一種金屬內連線中金屬介層窗的製造 方法，且特別是有關於一種多重金屬內連線 (interconnects)中’未接者型介層窗（Unlanded Via)的製 造方法。 當積體電路的積集度增加’使得晶片的表面無法提供 足夠的面積來製作所需的內連線時’爲了配合金屬氧化半 導體（Metal Oxide Semiconductor, MOS)電晶體縮小後所 增加的內連線需求，兩層以上的金屬層設計，便逐漸的成 爲許多積體電路所必需採用的方式。在金屬層之間常以內 金屬介電層（inter-metal dielectric)加以隔離，並在其中 蝕刻一介層窗開口（via hole) ’接著在介層窗開口中塡入導 電材料，用來連接上下兩層金屬層’在半導體工業上’稱 之爲插塞（plug)，而介層窗開口與插塞統稱爲介層窗。 在習知的金屬內連線設計時’爲了確保金屬介層窗與 金屬導線能夠互相接觸及避免定義接觸窗時造成對不準的 情況發生，因此，在欲形成介層窗位置的金屬線，其線寬 必須較寬以避免上述的情況發生’此種介層窗稱爲接著型 介層窗（Landed Via)。由於接著型介層窗需使用較大的晶 片面積，將造成製作成本上的的浪費’並且使元件的積集 度不易增加。因此，在積集度要求越來越高的條件下’爲 了減少金屬線所使用的面積’故使得介層窗的寬度與金屬 線寬一致，以達到增加元件積集度的目的。然而’由於介 層窗跟金屬線寬相同，在形成介層窗時’易使所形成之介 層窗無法完全落在金屬線上，而形成所謂的未接著型介層 3 I 1 I 11 n II 訂 I 後 (請先閔资背赴之注意事項再填寫本頁) 本紙張尺度適用中國囤家標隼（CNS ) A4規格（210 X297公釐） 4 經濟部中央標準局員工消費合作社印製 3797twf.doc/008 B? 五、發明説明（> ) 窗。 第1A圖至第1E圖，其所繪示的爲習知一種金屬內連 * 線中，未接著型介層窗製造方法的流程示意圖。 請參照第1A圖，首先提供一基底10 (基底之元件並 未完全繪出），其上覆蓋一層第一金屬層I2 ° 請參照第1B圖，利用微影蝕刻的技術，定義第一金 屬層12，以在基底10上方形成第一金屬導線12a。接著， 在基底10上方全面覆蓋一層內金屬介電層14。 請參照第ic圖，利用電漿加強型化學氣相沉積法 (PECVD)，以四乙基正矽酸鹽(TE〇S)在內金屬介電層14 上形成絕緣層16 (PETEOS)’在絕緣層16上方形成一層 經微影定義之光阻層20。 接著，請參照第1D圖，以光阻層20爲罩幕，蝕刻部 分絕緣層16及內金屬介電層14 ’以形成金屬介層窗22， 並暴露出第一金屬導線12a。最後’再將光阻層2〇從絕緣 層〖6的表面移除’只留下絕緣層及內金屬介電層14a。 接著，在金屬介層窗22中塡入導電材料，以形成金屬插 塞24。 最後，請參照第1E圖’在絕緣層Ua與金屬插塞24 表面形成一層第二金屬層26(未顯示於圖）。隨後利用微影 蝕刻技術定義第二金屬層26，以形成第二金屬導線26a ’ 使第二金屬導線與金屬插塞24相竊接，完成習知一 種未接著型介層窗的製造。 在上述習知之未接著型介層窗的製造方法中’在定義 — .1 I I I I I I I 訂 I I 線 (請先聞請背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS ) A4規格（2l〇X297公釐） A7 B7 463301 3797twf.doc/008 五、發明説明（）） 絕緣層及內金屬介電層時，容易在微影蝕刻時產生偏差， 且易因過度蝕刻的控制不當，而造成介層窗開口深入於基 底中而造成介層窗過度蝕刻，嚴重時還會穿過內金屬介電 層，而與下方的元件接觸形成短路。其可能形成的金屬介 層窗如第2A與2B圖所示。在第2A圖的情況，由於介層 窗的形成產生偏差，並造成過度蝕刻，使金屬插塞38穿 過內金屬介電層34，造成與下層元件發生短路現象。而在 第2B圖中，雖然金屬插塞39未穿過內金屬介電層34， 但產生偏移的金屬插塞39會形成一細縫，而造成金屬塡 入的困難。 然而，隨著半導體製程線寬的減小與積集度的增加， 相對在形成介層窗開口時，極易發生對準失誤 (Misalignment)的現象，造成介層窗開口中的插塞與金屬 導線的接觸面積減小，導致其接觸電阻値的增加。而且亦 會造成蝕刻穿透內金屬介電層到達另一導電區，以致在後 續形成介層窗插塞之後，會造成不正常的導通，而引起元 件的失效。 有鑑於此，本發明的主要目的之一，就是在提出一種 新的未接著型介層窗之製造方法，以有效地避免介層窗無 法與金屬層作有效地接觸的可能，而且亦可以避免造成未 相關金屬線間的短路，並提高半導體元件的品質。 爲達本發明之上述及其他目的，本發明提供一種金屬 內連線中，未接著型介層窗之製造方法。首先，提供一基 底，在基底上形成一第一金屬導線，在第一金屬導線兩側 5 中國國家標準（CNs > A4規格（210X297公釐）The Consumer Cooperatives of the Central Standards Bureau of the Ministry of Carriage and the People's Republic of China printed 3797twf.doc / 008 B7 ________________________ --- 5. Description of the invention (1) The present invention relates to a method for manufacturing a metal interlayer window in a metal interconnect, and is particularly The invention relates to a method for manufacturing an 'Unlanded Via' in multi-metal interconnects. When the integration degree of integrated circuits increases 'makes the surface of the wafer unable to provide sufficient area to make the required interconnects' in order to match the shrinkage of Metal Oxide Semiconductor (MOS) transistors, the increased interconnects Line requirements, the design of more than two metal layers, has gradually become a necessary method for many integrated circuits. An inter-metal dielectric is often used to isolate between metal layers, and a via hole is etched in it. Then a conductive material is inserted into the interlayer window opening to connect the upper and lower layers. The metal layer is called a plug in the semiconductor industry, and the via window and the plug are collectively called a via window. In the design of the conventional metal interconnects, 'in order to ensure that the metal interlayer window and the metal wire can contact each other and avoid misalignment when the contact window is defined, therefore, the metal line at the position of the interlayer window is to be formed. The line width must be wide to avoid the above situation. 'This type of interlayer window is called Landed Via. Since the bonding-type interlayer window needs to use a large wafer area, it will cause a waste of production cost 'and make it difficult to increase the component accumulation. Therefore, under the condition that the accumulation degree is becoming higher and higher, 'to reduce the area used by the metal line', the width of the interlayer window is consistent with the metal line width, so as to achieve the purpose of increasing the element accumulation degree. However, since the interlayer window has the same width as the metal line, when the interlayer window is formed, the formed interlayer window cannot easily fall on the metal line, and a so-called unattached interlayer 3 I 1 I 11 n II is formed. After ordering I (please fill out this note before filling out this page) This paper size is applicable to Chinese storehouse standard (CNS) A4 size (210 X297 mm) 4 Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 3797twf .doc / 008 B? Fifth, the invention description window. FIG. 1A to FIG. 1E are schematic flow diagrams of a method for manufacturing an unconnected interlayer window in a conventional metal interconnect * line. Please refer to FIG. 1A, first provide a substrate 10 (the components of the substrate are not completely drawn), which is covered with a first metal layer I2 ° Please refer to FIG. 1B to define the first metal layer using the lithography technique 12 to form a first metal wire 12a above the substrate 10. Next, an inner metal dielectric layer 14 is completely covered on the substrate 10. Referring to FIG. Ic, a plasma enhanced chemical vapor deposition (PECVD) method is used to form an insulating layer 16 (PETEOS) on the inner metal dielectric layer 14 with tetraethyl orthosilicate (TEOS). A photoresist layer 20 defined by lithography is formed above the insulating layer 16. Next, referring to FIG. 1D, with the photoresist layer 20 as a mask, a part of the insulating layer 16 and the inner metal dielectric layer 14 'are etched to form a metal interlayer window 22, and the first metal wire 12a is exposed. Finally, 'the photoresist layer 20 is removed from the surface of the insulating layer [6]', leaving only the insulating layer and the inner metal dielectric layer 14a. Next, a conductive material is poured into the metal interlayer window 22 to form a metal plug 24. Finally, referring to FIG. 1E, a second metal layer 26 is formed on the surface of the insulating layer Ua and the metal plug 24 (not shown in the figure). Subsequently, the second metal layer 26 is defined by using a lithography etching technique to form a second metal wire 26a ′, so that the second metal wire is connected to the metal plug 24 to complete the fabrication of a conventional interposer window. In the above-mentioned conventional manufacturing method of the non-adhesive type interstitial window, 'in the definition — .1 IIIIIII order II line (please listen to the notes on the back before filling out this page) This paper size applies the Chinese National Standard (CNS) A4 specification (21 × 297 mm) A7 B7 463301 3797twf.doc / 008 V. Description of the invention ()) When the insulating layer and the inner metal dielectric layer are susceptible to deviations during lithographic etching, and due to improper control due to excessive etching, As a result, the opening of the interlayer window penetrates into the substrate, which causes excessive etching of the interlayer window. In severe cases, it will pass through the inner metal dielectric layer and contact the components below to form a short circuit. The possible metal interlayer windows are shown in Figures 2A and 2B. In the case of FIG. 2A, the formation of the dielectric window causes a deviation and causes excessive etching, which causes the metal plug 38 to pass through the inner metal dielectric layer 34, causing a short circuit with the underlying device. In FIG. 2B, although the metal plug 39 does not pass through the inner metal dielectric layer 34, the offset metal plug 39 may form a fine slit, which may cause difficulty in metal intrusion. However, with the decrease of the semiconductor process line width and the increase of the accumulation degree, the misalignment phenomenon is extremely prone to occur when the via window is formed, causing plugs and metal in the via window opening. The contact area of the wire is reduced, resulting in an increase in its contact resistance 値. Moreover, it will cause the etching to penetrate the inner metal dielectric layer to reach another conductive region, so that after subsequent formation of the dielectric window plug, it will cause abnormal conduction and cause component failure. In view of this, one of the main objectives of the present invention is to propose a new method for manufacturing an unattached interlayer window, in order to effectively avoid the possibility that the interlayer window cannot effectively contact the metal layer, and also to avoid Causes short circuits between unrelated metal lines and improves the quality of semiconductor devices. To achieve the above and other objects of the present invention, the present invention provides a method for manufacturing an unbonded interlayer window in a metal interconnect. First, a substrate is provided, and a first metal wire is formed on the substrate. On both sides of the first metal wire 5 Chinese National Standards (CNs > A4 Specification (210X297 mm)
In i J— I In n ^ I I i 線 {請先閱清背面之注項再填寫本頁J 經濟部中央捸準爲貞工消费合作社印装 4 633 0 3 7 9 7 twf . doc/0 0 8 A7 B7 經濟部中央樣率局員工消費合作社印装 五、發明説明（k) 形成一間隙壁，再依序沉積內介電層、絕緣層及光阻層。 接著，經微影和蝕刻的步驟，以在第一金屬導線上方形成 一暴露出第一金屬導線之介層窗開口 β最後，形成一金屬 插塞與第二金屬導線，以完成未著陸型介層窗的製造。 爲讓本發明之上述目的、特徵、和優點能更明顯易懂， 下文特舉一較佳實施例，並配合所附圖式，作詳細說明如 下： 圖式之簡單說明： 第1Α圖至第1Ε圖係繪示習知一種金屬內連線中，未 接著型介層窗製造方法的剖面示意圖； 第2Α圖至第2Β圖，其繪示的是依照習知金屬內連線 中，未接著型介層窗製造方法所產生介層窗過度鈾刻的剖 面示意圖；以及 第3Α圖至第3F圖，其所繪示的是依照未發明一較佳 實施例，一種金屬內連線中，未接著型介層窗製造方法的 剖面示意圖。 其中，各圖示之標號所代表的元件結構如下： 10，30，100 :基底 12，102 :第一金屬層 12a，32，I02a :第一金屬導線 104 :介電層 104a :間隙壁 14 ’ 14a，34，106，106a :內金屬介電層 16，16a，36，108，108a :絕緣層 6 ---------1 — (請先閲讀背面之注意事項再填寫本頁) 訂 '線 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公I ) 463301 3 7 9 7 twf . doc/0 0 8 A7 B7 經濟部中央標準局員工消费合作社印製 五、發明説明（殳） 2〇，110 :光阻層 22，U2 :介層窗開口 24 ’ 38，39，U4 :金屬插塞 26a ’ 40，l〖6a :第二金屬導線 實施例 ' 雖然改善未接著型介層窗製造方法中過度蝕刻的方法 有很多，比如（1)可利用較少之過度蝕刻的固定蝕刻時間來 避免過度蝕刻的發生，但有時候會造成蝕刻不完全，而有 內金屬介電層的殘留，導致阻値不穩定。（2)可利用終點訊 號的捕捉來控制蝕刻的時間，但隨著積極度的提高，介層 窗被蝕刻的面積也隨之變小，而晶邊消除邊緣珠滴刷洗 (EBR)的區域面積相對變大，導致終點訊號不易捕捉。（3) 亦可調整蝕刻參數，即調整蝕刻的配方，使其在對準偏移 的地方利用高分子聚合物來阻擋蝕刻的繼續發生，而有蝕 刻中止的現象產生。但此配方不易配製且容許範圍太小， 此外反應室的狀況可能也會影響此效果。所以本發明提供 一種金屬內連線中，未接著型介層窗之製造方法，以改:胃 上述習知之缺點。 請參照第3A圖至第3F圖，其所繪示的是根據本發明 之一較佳實施例，一種金屬內連線中，未接著型介層窗製 造方法的流程示意圖。請參照第3A圖，首先提供—基底 100 (基底之元件並未完全繪出）’其上覆蓋一層第一金屬 層 102。 請參照第3B圖，利用微影蝕刻的技術，定義第一金 7 本紙張尺度適用中國國家標準（CNS ) A4規格（2IOX297公釐> ' -- ---------黎------------^ C#先聞请背面之注f項真填寫本頁) 4633 0 經濟部中央標半局貝工消費合作社印裝 A7 B7 五、發明説明（€ ) 屬層102，以在基底100上方形成第一金屬導線102a。接 著，在基底上方全面覆蓋一層介電層104，其較佳材 質比如爲氮化矽。 請參照第3C圖，對介電層1〇4進行回蝕刻，以在第 一金屬導線l〇2a側壁形成間隙壁i〇4a。接著，例如利用 局密度電黎化學氣相ί几積法（high-density plasma ; HDP)， 在基底100上方全面覆盡一層內金屬介電層1〇6，其較佳 材質比如爲二氧化矽。然後，再以例如電漿加強型化學氣 相沉積法（PECVD) ’以四乙基正矽酸鹽（TEOS)在內金屬介 電層106上形成絕緣層108 (PETEOS)，其較佳材質比如 爲二氧化矽。因以HDP方法沉積之內金屬介電層1〇6較 PETEOS之絕緣層108緻密，故絕緣性較佳，但其化學機 械硏磨(CMP)較絕緣層108困難，所耗費的時間較長，所 以在形成內金屬介電層106之後，接著以PETEOS之絕緣 層108塡滿內金屬介電層106凹凸不平的表面，最後再利 用CMP進行全面性的平坦化，以避免沈積層不平坦所形 成的劇烈高低落差，使製作接下來的第二層金屬內連線時 比較容易進行，且經轉移的導線圖案也將比較精確。 請參照第3D圖，於絕緣層108上方形成一層經微影 定義之光阻層Π0，其大約對應於非第一金屬導線102a的 上方。 請參照第3E圖，以光阻層110爲罩幕，例如利用乾 蝕刻法，蝕刻部分絕緣層108及內金屬介電層106，以於 第一金屬導線102a的上方形成介層窗開口 112，且暴露出 8 I" I : !. *I~ n n n I - , I~, 線 - * (請先閲請背面之注$項再填寫本頁) 本紙張尺度逋用中國國家標準（CNS ) A4見格（2I〇X297公釐） A7 B7 4633 0 797twf *doc/〇〇8 五、發明説明（)） 第一金屬導線102a。接著移除 » 1Λ8 者娜允阻層110,留下部分絕緣 Ξ:入=屬介電層106a。最後，在金屬介層窗⑴ 以形成金屬插塞114 D晒絕緣層⑽ 與內金屬介電層106的材晳皆屬於每力1 ㈣格 氣、自邮^物，與_壁104a 的氮化矽材質不同，故利用蝕刻谏史 _ 丁純X日」 縣的不同，即使發生光 阻對不準的現象，触刻也將停在間隙壁购上，而不至 於發生過度蝕刻，導致介層窗無法與金屬層作有效地接觸 和造成未侧錢關_路，元件的品 質。 最後，請參照第3F圖，在絕綠層I〇8a與金屬插塞li4 表面形成-層第_金屬層（未顯示_)。隨後利用微影触 刻技術疋義第一金屬層，以形成第二金屬導線U6a，使第 一金屬導線116a與金屬插塞114相_接，完成本發明之 未接著型介層窗的製造。 綜上所述’本發明所提出之金屬內連線中，未接著型 介層窗的製造方法，具有以下的特點： (1) 本發明之未接著型介層窗製造方法中，以一氮化 矽材質之間隙壁爲蝕刻中止層。因此，若發生光阻對不準 之偏移現象，也可以讓蝕刻停止於間隙壁，而不會造成過 度蝕刻，發生短路現象，而引起元件的失效。 (2) 本發明之未接著型介層窗製造方法中’可避免對 準偏移所造成的過度蝕刻現象發生’如此一來便可降低生 產成本，增加經濟效益。 雖然本發明已以一較佳實施例揭露如上’然其並非用 9 本紙張尺度適用中國國家標準（CNS ) A4规格{ 210X297公釐） ---------^------iT------^ (請先閲請背面之注意事項再填寫本頁) 經濟部令央檩準局員工消費合作衽印复 6 4 33 Ο 1 Α7 3 7 97 twf . doc / 0 08 五、發明説明（） 以限定本發明，任何熟習此技藝者，在不脫離本發明之精 神和範圍內，當可作各種之更動與潤飾，因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 裝 訂 漆 (請先閲资背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印裝 本紙張尺度適用中國國家榇準（CNS ) A4規格（210X 297公釐）In i J— I In n ^ II i line {Please read the note on the back before filling out this page J Central Ministry of Economic Affairs prints it for Zhengong Cooperative Cooperative 4 633 0 3 7 9 7 twf .doc / 0 0 8 A7 B7 Printed by the Consumer Cooperative of the Central Sample Rate Bureau of the Ministry of Economic Affairs. 5. Description of the invention (k) Form a gap wall, and then deposit the inner dielectric layer, insulation layer and photoresist layer in order. Next, through the steps of lithography and etching, a via window opening β that exposes the first metal wire is formed over the first metal wire. Finally, a metal plug and a second metal wire are formed to complete the unlanded type dielectric. Manufacturing of layer windows. In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings for detailed description as follows: Brief description of the drawings: FIG. 1A to FIG. Figure 1E is a schematic cross-sectional view of a conventional method for manufacturing an unconnected interstitial window in a metal interconnect; Figures 2A to 2B show the conventional metal interconnects without following Figure 3A to 3F are schematic cross-sectional schematic diagrams of excessive uranium engraving of a via window produced by a method for manufacturing a via window; and FIG. 3A to FIG. 3F, which are shown in accordance with a preferred embodiment of the present invention. A schematic cross-sectional view of a method for manufacturing a subsequent interlayer window. Wherein, the element structures represented by the symbols in the figures are as follows: 10, 30, 100: substrates 12, 102: first metal layers 12a, 32, I02a: first metal wires 104: dielectric layer 104a: spacer 14 ' 14a, 34, 106, 106a: inner metal dielectric layers 16, 16a, 36, 108, 108a: insulating layer 6 --------- 1 — (Please read the precautions on the back before filling this page) The paper size of the book is applicable to the Chinese National Standard (CNS) A4 specification (210X297 male I) 463301 3 7 9 7 twf .doc / 0 0 8 A7 B7 Printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs ) 20, 110: Photoresist layer 22, U2: Intermediate window opening 24 '38, 39, U4: Metal plug 26a' 40, l [6a: Second metal wire embodiment 'Although improvement is not performed on the interposer There are many over-etching methods in the window manufacturing method. For example, (1) less over-etching can be used to avoid the occurrence of over-etching, but sometimes the etching is incomplete, and there are internal metal dielectric layers. Residues, leading to choke instability. (2) The capture of the end signal can be used to control the etching time, but with the increase of the enthusiasm, the area of the interlayer window to be etched also becomes smaller, and the area of the crystal edge to eliminate the edge bead brushing (EBR) area Relatively large, making the end signal difficult to capture. (3) It is also possible to adjust the etching parameters, that is, to adjust the formulation of the etching so that the polymer will be used to prevent the etching from continuing to occur when the alignment is offset, and the phenomenon that the etching is stopped will occur. However, this formula is not easy to formulate and the allowable range is too small. In addition, the condition of the reaction chamber may also affect this effect. Therefore, the present invention provides a method for manufacturing a non-adhesive type interlayer window in a metal interconnect, so as to change the disadvantages of the above-mentioned conventional methods. Please refer to FIG. 3A to FIG. 3F, which show a schematic flowchart of a method for manufacturing a non-adhesive type interlayer window in a metal interconnect according to a preferred embodiment of the present invention. Referring to FIG. 3A, first, a substrate 100 (the components of the substrate are not completely drawn) is covered with a first metal layer 102 thereon. Please refer to Figure 3B and use the lithographic etching technology to define the first gold 7 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (2IOX297 mm > '---------- Li- ----------- ^ C # first heard, please note the f item on the back, please fill in this page) 4633 0 Printed by the Central Bureau of the Ministry of Economic Affairs, Shellfish Consumer Cooperative, A7 B7 V. Description of invention (€) Layer 102 to form a first metal wire 102 a above the substrate 100. Next, a dielectric layer 104 is completely covered on the substrate, and a preferred material is, for example, silicon nitride. Referring to FIG. 3C, the dielectric layer 104 is etched back to form a spacer i04a on the sidewall of the first metal wire 102a. Then, for example, a high-density plasma (HDP) method is used to completely cover an internal metal dielectric layer 106 on the substrate 100, and a preferred material is silicon dioxide. . Then, for example, a plasma enhanced chemical vapor deposition (PECVD) method is used to form an insulating layer 108 (PETEOS) on the inner metal dielectric layer 106 with tetraethyl orthosilicate (TEOS). The preferred material is, for example, PETEOS. For silicon dioxide. Because the inner metal dielectric layer 106 deposited by the HDP method is denser than the insulating layer 108 of PETEOS, the insulation is better, but its chemical mechanical honing (CMP) is more difficult than the insulating layer 108, and it takes longer. Therefore, after the inner metal dielectric layer 106 is formed, the uneven surface of the inner metal dielectric layer 106 is then filled with the PETEOS insulating layer 108, and finally CMP is used to comprehensively planarize to avoid the formation of uneven deposition layers. The sharp drop in height makes it easier to make the next second layer of metal interconnects, and the transferred wire pattern will be more accurate. Referring to FIG. 3D, a lithographically defined photoresist layer Π0 is formed over the insulating layer 108, which approximately corresponds to the top of the non-first metal wire 102a. Referring to FIG. 3E, the photoresist layer 110 is used as a mask. For example, a dry etching method is used to etch part of the insulating layer 108 and the inner metal dielectric layer 106 to form a dielectric window opening 112 above the first metal wire 102a. 8 I " I:!. * I ~ nnn I-, I ~, line-* (please read the note on the back before filling in this page) This paper uses Chinese National Standard (CNS) A4 See grid (2IO × 297 mm) A7 B7 4633 0 797twf * doc / 〇008 V. Description of the invention ()) The first metal wire 102a. Next, the 1Λ8 resistive layer 110 is removed, leaving a portion of the insulation 入: the dielectric layer 106a. Finally, in the metal interlayer window ⑴ to form the metal plug 114D, the insulating layer ⑽ and the inner metal dielectric layer 106 are made of 1 每 gas, self-contained material, and nitride of the wall 104a. The silicon material is different, so the history of etching is used. The window cannot make effective contact with the metal layer and cause unbalanced money, component quality. Finally, referring to FIG. 3F, a -layer_metal layer (not shown) is formed on the surface of the green insulation layer 108 and the metal plug li4. Subsequently, the first metal layer is defined by using the lithography lithography technology to form a second metal wire U6a, and the first metal wire 116a is connected to the metal plug 114 to complete the manufacturing of the unattached interlayer window of the present invention. In summary, the method for manufacturing an unbonded interlayer window in the metal interconnects proposed by the present invention has the following characteristics: (1) In the method for manufacturing an unbonded interlayer window of the present invention, a nitrogen The spacer made of silicon is an etching stop layer. Therefore, if the deviation of the photoresist to the inaccuracy occurs, the etching can also be stopped at the gap wall without over-etching, short-circuiting, and component failure. (2) In the method for manufacturing a non-adhesive type interlayer window according to the present invention, ‘avoiding the occurrence of excessive etching caused by misalignment shift’ can reduce production costs and increase economic benefits. Although the present invention has been disclosed in a preferred embodiment as described above, it is not used in 9 paper sizes. The Chinese National Standard (CNS) A4 specification {210X297 mm) --------- ^ ----- -iT ------ ^ (Please read the notes on the back before filling out this page) The Ministry of Economic Affairs ordered the Central Bureau of Standards and Staff to cooperate with the consumer to copy 6 4 33 Ο 1 Α7 3 7 97 twf .doc / 0 08 V. Description of the invention () To limit the invention, anyone skilled in the art can make various modifications and retouches without departing from the spirit and scope of the invention. Therefore, the scope of protection of the invention shall be regarded as the attached application. The patent scope shall prevail. Binding lacquer (please read the notes on the back of the fund before filling out this page) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs This paper size is applicable to China National Standard (CNS) A4 (210X 297 mm)