TW457637B - Manufacturing process of metal line - Google Patents

Abstract

This invention provides a manufacturing process of metal line for semiconductor device. Firstly, a conductive area is formed on a given semiconductor substrate. Then, an insulation layer is formed to cover the substrate globally and a sacrificial layer is formed on the surface of the insulation layer. Subsequently, a damascene structure is created through selective etching of the sacrificial layer and the insulation layer. A metal layer is formed to fill the damascene structure. A chemical mechanical polishing process is performed to remove the metal layer on the surface of the sacrificial layer and leave the metal structure as metal lines. The inventive process can prevent metal dishing in the chemical mechanical polishing process and erosion phenomenon after the removal of the insulation layer and also can increase the degree of resolution for photo exposure.

Description

^ ^ 7637_ __ V. Description of the invention (1) Field of the invention The present invention relates to a process technology for an ultra-large integrated circuits (ICs), and in particular to a method for manufacturing a metal line. Avoid the corrosion phenomenon caused by the metal sag and the insulation layer being worn away during the chemical mechanical polishing process, and improve the exposure resolution. Description of the Related Art The following is a schematic cross-sectional view of a metal wire manufacturing process shown in FIGS. 1A to 1D to illustrate one of the conventional techniques. First, please refer to FIG. 1A, which shows a cross-sectional view of a semiconductor substrate 10 having a conductive region 12 formed thereon. Next, the surface of the semiconductor substrate 10 is covered with an insulating layer 14. Next, please refer to FIG. 1B, and selectively etch the oxidizing insulator 4 to form a damascene 16 ° that exposes the conductive region 12. Then, referring to FIG. 1C, the above-mentioned embedded structure 1 6 A thin pad layer 18 consisting of a titanium layer (Ti) / titanium nitride layer (TiN) is formed on the surface, and then a tungsten metal layer 20 is deposited.

Secondly, referring to FIG. 1, the tungsten metal layer f0 above the insulating layer 14 is removed by a chemical mechanical polishing method, so as to leave the town metal 20a and the titanium layer / titanium nitride layer 18a as the metal wire ML. Due to the continuous improvement of semiconductor integrated circuit manufacturing technology in recent years, the number of components contained in wafers has continued to increase, and the size of components has also continued to shrink due to the increase in the degree of accumulation. When the accumulation density is greater, chemical machinery should be used. When grinding the tungsten metal layer, the CMP parameters are difficult to control.

457637 V. Description of the invention (2) The depression phenomenon shown in the figure, and the insulation layer is worn away will cause reflection when exposed, making the resolution worse. SUMMARY AND OBJECTS OF THE INVENTION In view of this, the object of the present invention is to provide a method for manufacturing a metal wire, which can avoid the corrosion phenomenon caused by the metal depression and the insulation layer being worn out during the chemical mechanical polishing process, and can improve the exposure analysis degree. According to the above object, the present invention provides a method for manufacturing a metal wire, including the following steps: (a) providing a semiconductor substrate formed with a conductive region; (b) comprehensively forming an insulating layer to cover the semiconductor substrate; (C) forming a sacrificial layer on the surface of the insulating layer; (d) selectively etching the sacrificial layer and the insulating layer to form a mosaic structure exposing the conductive region; (e) forming a metal layer comprehensively, the metal And (f) chemically and mechanically polishing the metal layer to remove the metal layer on the surface of the sacrificial layer, leaving a metal structure as a metal wire. And 'In the manufacturing method of the above-mentioned metal wire, the above-mentioned insulating layer can be formed by chemical vapor deposition method, and tetraethoxysilane is used as the main reaction gas to form * silicon dioxide. At this time, the sacrificial layer uses chemical gas. The gasification layer formed by facies deposition is also oxysand. Furthermore, in the method for manufacturing the metal wire, the metal layer may be a tungsten metal layer formed by a chemical vapor deposition method. Furthermore, in the method for manufacturing a metal wire, before step (e), the method may further include a step of forming a pad layer on the surface of the damascene structure. In the method for manufacturing the metal wire, the pad layer is

457637 V. Description of the invention (3) Titanium layer or titanium layer / vaporized titanium layer. Furthermore, in the method for manufacturing a metal wire, the conductive region may be a metal wire. Furthermore, in the above-mentioned method for manufacturing a metal wire, after step (f), it may further include a step of removing the sacrificial layer. One of the features of the present invention is that by adding a sacrificial layer (grinding stop layer) 'in the CMP process, the corrosion phenomenon caused by the metal sag and the insulation layer being worn away during the CMP process can be avoided, and Avoid reflections during exposure, thus improving exposure resolution. Brief Description of the Drawings Figures 1A to 1D are schematic cross-sectional views of the manufacturing process of a metal wire according to conventional techniques. Figures 2A to 2E are schematic sectional views of a manufacturing process of a metal wire according to an embodiment of the present invention. Explanation of symbols 10, 00 ~ semiconductor substrate. 12, 120 ~ conductive area. 1 4、1 4 ″ ～ oxidized insulating layer. The most 1500 to silicon nitride sacrificial layer C 16 and 160 to damascene structure. 18, 18a'180, 180a ~ titanium liner. 20, 20a, 200, 200a ~ tungsten metal layer. ML ~ Metal wire .. Bu depression.

/ 0593-5662TWF ptd Page 6 457637 V. Description of the Invention (4) Example The following is a schematic cross-sectional view of the metal wire manufacturing process shown in FIGS. 2A to 2E to illustrate an embodiment of the present invention. First, please refer to FIG. 2A. This figure shows a cross-sectional view of a semiconductor substrate 100 without a conductive region 120 such as a lower metal line. The semiconductor substrate 100 is composed of a single-crystal silicon substrate, for example. 》 Next, low pressure chemical vapor deposition (LPCVD) was used, and tetra-ethyl-ortho-silicate (TE0S) was used as the main reaction gas to form silicon dioxide ( Silicon oxide) material is used to form an insulating layer 140. Then, a low pressure chemical vapor deposition method is also used, and two gas silanes (SiH2Cl2) and ammonia (NH3) are used as the main reaction gases to form a sacrificial layer made of silicon nitride (Sacrificial layer) 150. The sacrificial layer 150 must be able to be used as a polishing stop layer in a subsequent chemical mechanical polishing method (c h e m i c a 1 m e c h a n c a 1 polishing; CMP). Furthermore, the sacrificial layer 150 must have different residual characteristics from the underlying oxide insulation layer 140. Therefore, it is also possible to use an oxynitride compound (s i 1 i c ο η oxy-nitride) material instead of a nitride oxite material. Next, please refer to the 2B 'reactive ion etching (reactive ion etching; RIE) in order to selectively etch the silicon nitride sacrificial layer 150 and the oxide insulating layer 140 in order to form the above-mentioned conductive Mosaic structure 1 60 of area 1 20. Then, a chemical vapor deposition method is used to form a thin liner layer 180 composed of a titanium layer (Ti) / titanium nitride layer (TiN) on the surface of the above-mentioned mosaic structure 160. In addition, a titanium layer may be used instead of the titanium layer / nitrogen.

iO593-5662TWFptd Page 7 457637 V. Description of the invention (5) Huaqin layer. Then, referring to FIG. 2C, a tungsten metal layer 200 is deposited using a chemical vapor deposition method and using tungsten hexafluoride as a main reaction gas. This embodiment takes tungsten as an example '. However, as long as metals having a conductive effect, such as aluminum metal, aluminum-copper alloy, and copper, are applicable to the present invention. Secondly, please refer to Figure 2D, use chemical mechanical polishing method, and use appropriate slurry, operating time, and polishing speed to remove the sacrificial layer. The tungsten metal layer above 200 is left as metal The tungsten metal 200a of the lead ML and the titanium layer / titanium nitride layer i800a. Finally, "refer to Fig. 2E", a buffer solution containing phosphoric acid is used to remove the sacrificial layer 150 as a polishing stop layer. Although the present invention has been disclosed in the preferred embodiment as above, it is not intended to limit the present invention. Any person skilled in the art will not depart from it: within the spirit and scope of the invention, modifications and retouching can be made. The protection scope shall be determined by the scope of the attached patent application.

V〇593-5662TWF-p: d

Claims (1)

457637 VI. Application for Patent Scope 1. A method for manufacturing a metal wire 'includes the following steps: (a) providing a semiconductor substrate formed with a conductive region; (b) forming an insulating layer comprehensively to cover the semiconductor substrate (C) forming a sacrificial sacrificial layer on the surface of the insulating layer: (d) selectively etching the sacrificial layer and the insulating layer to form a buried structure exposing the conductive region; (e) forming a metal layer comprehensively, The metal layer is filled into the above-mentioned mosaic structure; and (f) the metal layer is chemically and mechanically ground to remove the metal layer on the surface of the sacrificial layer, leaving a metal structure as a metal wire. 2. The method for manufacturing a metal wire as described in the item of the scope of the patent application 'wherein the above-mentioned insulating layer is a chemical vapor deposition method, and a tetraethoxy alkane is used as a reaction gas to form a dioxin layer. . 3. The method for manufacturing a metal wire according to item 2 of the scope of the patent application, wherein the sacrificial layer is a silicon argon layer formed by a chemical vapor deposition method. 4. If so, please apply the method of manufacturing a metal wire described in item 1 of the patent, wherein the above-mentioned metal layer is a tungsten metal layer formed by a chemical vapor deposition method. 5 'The method of manufacturing a metal wire as described in item 4 of the scope of patent application, wherein step (6) further includes the step of forming-a cushion layer on the surface of the above-mentioned mosaic structure-6-as described in item 1 of the scope of patent application Manufacture of metal wires * 0593-5662TfF-pld --------- prepared 9th yellow 457637 VI. Patent Application Law, where the above-mentioned gasket layer is a titanium layer ° 7. Manufacturing of metal wires as described in item 1 of the patent application scope The method, wherein the pad layer is a titanium layer / nitride layer. 8. The method for manufacturing a metal wire according to item 1 of the scope of the patent application, wherein the conductive area is a metal wire. 9. The method for manufacturing a metal wire as described in claim 1 of the patent application scope, further comprising a step after step (f) ', and a step of removing the sacrificial layer. 10. The method for manufacturing a metal wire as described in claim 9 of the patent application scope, wherein a buffer solution containing phosphoric acid is used to remove the sacrificial layer. 11. A method for manufacturing a metal wire, comprising the following steps: (a) providing a semiconductor substrate, the semiconductor substrate is formed with a conductive region; (b) comprehensively forming an oxide insulating layer to cover the semiconductor substrate; (c) in The surface of the oxide insulating layer is formed with a sacrificial nitride layer; (d) the silicon nitride sacrificial layer and the oxide insulating layer are selectively etched to form a mosaic structure that exposes the upper and lower electrical regions; (e) the mosaic structure < Titanium / nitride the tungsten metal layer is formed on the upper surface and the side wall, and the above-mentioned inlay (f) is comprehensively formed to form a tungsten metal layer embedded structure. Chemical mechanical .. Research sacrificial layer A & Remove the crane metal layer on the surface of the sacrificial layer of nitride 4 above, and leave-crane gold as a metal wire Page 10 457637 VI. Patent application structure; and (h) removing the aforementioned silicon nitride sacrificial layer. 1 2. The method for manufacturing a metal wire according to item 11 of the scope of the patent application, wherein the conductive area is a metal wire. 1 3. The method for manufacturing a metal wire according to item 11 of the scope of patent application, wherein a buffer solution containing phosphoric acid is used to remove the sacrificial layer. ii) 59 3-5662TWFptd Page 11