TW457636B - Method of reduction of electromigration phenomenon - Google Patents

Abstract

This invention provides a method to reduce the metal interconnect electromigration phenomenon on a semiconductor wafer. Firstly, a buffer layer is formed on the surface of the semiconductor wafer and the surface of a metal layer. Then, an ion implantation process is carried out to implant ions into the buffer layer. Finally, a thermal process is performed to drive the ions into the grain boundaries of the metal layer so that the electromigration phenomenon of the metal interconnect is reduced.

Description

457636 __ — '— —— ___________________ — -------: V. Description of the Invention (0': Field of Invention! The present invention provides a method for reducing electromigration of a metal layer on a semiconductor wafer. Method, especially a method using implanted ion: to reduce the electromigration phenomenon of the metal layer.

I In the semiconductor manufacturing process, due to the low resistivity 1 (resistivity) of aluminum metal, it is easy to engrav and have good adhesion to the SiO2 layer. Therefore, aluminum has been widely used as the main conductive material of components. To reduce the RC time delay (ti me de 1 ay) 'and increase the switching frequency of the component. However, the aluminum metal generally deposited by the sputter method is generally present in a crystalline form of poly-crystailine after appropriate annealing. Therefore, when the metal wire is in the state of conducting current, it will be very susceptible to the influence of the electric field, so that the atom will move along the grain boundary of the aluminum material itself in the direction of electron flow, reducing aluminum The junction area of the metal wire eventually causes the aluminum metal wire to open (electromigration) or electromigration

I shift phenomenon. | | Please refer to FIG. 1, which is a conventional method for fabricating a semiconductor wafer 10.

Page 4 4576 36 丨 V. Description of the invention (2) Schematic diagram of the method of the metal layer 14. The semiconductor wafer 10 includes a dielectric t layer 12; and a metal layer 14 is disposed on the dielectric layer 12. Generally, aluminum (A1) with good conductivity is used as the material of the metal wire to make the electrical connection between the components. However, the electromigration phenomenon of aluminum metal is the most significant; After the metal layer 14 is fabricated, an inter metal dielectric (IMD) 16 is formed on the metal layer 14. The dielectric layer 16 is formed on the surface of the dielectric layer 12 and the metal layer 16 by a HDP deposition (high density plasma enhanced i CVD) process. Due to the characteristics of the material of the aluminum metal layer 14 made by conventional methods, electromigration is more likely to occur, and the electromigration phenomenon usually occurs at the grain boundaries of metal atoms and at the interface between the metal layer and other layers, so This situation is also observed between the interface of the aluminum metal layer 14 and the dielectric layer 12 or the dielectric layer 16. This phenomenon of electromigration will seriously affect the lifetime of the metal layer 14 and the efficiency of current transfer. In other words, when the number of atoms in a part of the wire decreases due to the electromigration phenomenon, the cross section of the wire will be reduced, and if the electromigration phenomenon is too severe, the metal aluminum wire will eventually be disconnected, which will affect the entire semiconductor device. The electrical performance even leads to function failure of the entire product. I. SUMMARY OF THE INVENTION Therefore, the main object of the present invention is to provide a method for reducing the electromigration phenomenon of a metal layer on a semiconductor wafer.

Page 5 457636 V. Description of the Invention (3) Problem. In a preferred embodiment of the present invention, a buffer layer made of polysilicon (SRO) is first formed on the surface of the semiconductor wafer and the surface of the metal layer. The thickness of the buffer layer is about 200 angstroms. Then an ion implantation process is performed, using butterfly energy of about 30 K e V and about 1 X 1 0 1 雔 / cm²: concentration, to implant butterfly (b 〇r ο η) ions on the metal layer Inside the buffer layer. Finally, a thermal process is performed to bring the boron ions into the grain boundaries between the metal layers to reduce the electromigration phenomenon of the metal wires. The present invention mainly performs ion implantation on a metal layer, and ions enter the grain boundary and the interface between the metal layer and the dielectric layer, which can effectively prevent electromigration of the metal wire and prolong the service life of the metal wire. Detailed description of the invention

I Please refer to FIGS. 2 to 3, which are schematic diagrams of a method for fabricating a metal layer 24 on a semiconductor wafer 20 according to the present invention. As shown in FIG. 2, the semi-i conductor wafer 20 includes a dielectric layer 22, and a metal layer 24 is disposed on the dielectric layer 22. The semiconductor wafer 20 has completed several semiconductor processes, such as the production of MOS i transistors (not shown), and then a dielectric layer 22 is covered on top of each MOS transistor to isolate the electrical properties between the components. . The metal layer 24, which is located above the dielectric * layer, usually uses aluminum (i; | A1) with good conductivity as the metal wire to form an electrical connection between the components.

J 457636

V. Description of the invention (4) After the process of the metal layer 24 is completed in the present invention, a uniform chemical vapor deposition (CVD) method is used to form a uniform surface on the dielectric layer 22 and the metal layer 24. The buffer layer (layer; 26) is used to avoid the tunneling channeling effect in the subsequent ion implantation process, and it can prevent the ion implantation process from directly ion implanting the surface of the metal layer 24 to Avoid situations that damage the performance of other components I or cause plasma damage. The buffer layer 26 can be a silicon rich oxide (SR0) layer or a silicon oxide layer with a thickness of about 200 angstroms (angstrom). !!:! Ϊ́ An ion implantation process is subsequently performed to implant the ion implanter into the buffer layer 26 in the area above the metal layer 24. The direction of i shown by the arrow in Fig. 2 is the direction of ion implantation. The implanted ions used in the present invention are boron (B) ions, and the energy used in the ion implantation process is about | | 30KeV, and the concentration used is about lxlO1 tassel / cm 2 | (i (ions / cm2 ), This energy can make the boron ions stay above the interface of the metal layer | II 2 4 and the buffer layer 26.. ---------—.-~-· --- ----- | | ij I As shown in Figure 3, an HDP deposition process is then performed to form an HDP dielectric layer 28 on the surface of the buffer layer 26 乂 |. Due to the high temperature involved in the HDP deposition process, | I can therefore Most of the boron ions enter (dr ive | in) between the grain boundaries in the metal layer 24 in the direction of the arrow in FIG. 3, and part of the boron ions stay in the metal layer 2 4 and the buffer layer 2 6 Interface (interface). In addition, you can also

Page 7 457636 V. Description of the invention (5) A thermal process, such as an annealing process, is used outside: to bring boron ions into the grain boundaries of the metal layer 24. The incoming ions will be trapped in the grain boundaries of the aluminum atoms and the interface between the buffer layer 26 and the metal layer 24, forming an effect similar to precipitation 1 hardness, making it difficult for IS atoms to flow along the grain boundaries, resulting in The phenomenon of electromigration. Generally, you can choose an ion with a suitable grain size for implantation, and the same effect can be achieved. The invention proves through experiments that the service life (Iifetime) of Is metal wires 24 implanted with rotten ions is more than twice as long as the conventional one. In the current 0.25 #m semiconductor process, The size of semiconductor devices has been reduced, and electromigration in metal wires has become the most important factor affecting the electrical properties of metal wires. Compared with the conventional method for making a metal layer, the present invention mainly performs ion implantation on the metal layer, and directs ions into the grain boundary and the interface between the metal layer and the dielectric layer, which can effectively prevent the metal layer from being electrically induced. Migration phenomenon extends the life of metal wires. The above is only a preferred embodiment of the present invention. Any equal changes and modifications made in accordance with the present invention: the scope of the patent shall fall within the scope of the patent of the present invention.

Page 8 12, 22 16, 28 丨 Simple illustration of the diagram Simple illustration of the diagram

I Figure 1 is a schematic diagram of a conventional fabrication process on a semiconductor wafer. Figures 2 to 3 are schematic diagrams of a method for a semiconductor crystal according to the present invention.丨 Explanation of the symbols in the diagram 1 0, 2 0 Semiconductor wafers! 14, 24 Metal layer 2 6 Buffer layer-The method of metal layer is shown above. A metal layer is made. Dielectric layer Dielectric layer

Claims (1)

457636 VI. Scope of patent application 1 1. A method for reducing the electromigration of metal wires on a semiconductor wafer. The surface of the semiconductor wafer includes a metal layer. The method includes the following steps: In the semiconductor The wafer surface and the metal layer surface form a buffer layer! (Buffer layer); ~~ " Perform an ion implantation process to implant the ions into the buffer layer on the metal layer; and: In a thermal process, the ions are driven into (drivp ,;-·-wrive in) 1 between grain boundaries in the metal layer to reduce the electromigration of the formed metal wires. I 2. The method according to item 1 of the scope of patent application, wherein the metal layer is a & metal layer (a 1 u m i n u m, A 1). 3_ The method according to item 1 of the patent application scope, wherein the buffer layer is a silicon rich oxide (SR0) or a silicon oxide layer. 14. The method according to item 1 of the patent application range, wherein the thickness 1 of the buffer layer is about 2000 angstroms. 5 The method according to item 3 of the scope of patent application, wherein the ion implantation process includes boron (B) ions.丨 6, such as the method of applying for the fourth item of the patent scope ’, wherein the ion implantation process No. 10 f 457636 丨 VI. The scope of the patent application uses about 30KeV of energy, and the used concentration is about 1x1 0 1 雔 / cm 2 (ions / cm2) 0 j!: 7. A kind of metal wire reduction on a semiconductor wafer The i method of electromigration phenomenon, the surface of the semiconductor wafer includes a metal layer, the method includes the following steps: forming a buffer layer on the surface of the semiconductor wafer and the surface of the metal layer: and performing an ion implantation process, Boron (B) ions are implanted into the gold — — — — —, — · ~ '― j: part of the buffer layer on the metal layer; wherein the boron ions will diffuse into the metal layer in subsequent processes Between the grain boundaries to reduce the electromigration of the formed metal wires. j 8. The method of claim 7 in which the metal layer is an aluminum i metal layer (aluminum, A1). 4; 9. The method according to item 7 of the scope of patent application, wherein the buffer layer is a polysilicon layer (SR0) or a silicon oxide layer. 10. The method according to item 7 of the scope of patent application, wherein the thickness of the buffer layer is about 2000 angstroms. Π. The method according to item 10 of the scope of patent application, wherein the energy used in the ion implantation process is about 30KeV, and the concentration used is about lxl 01 雔 子 / square 4 576 Jo 6. Application scope: cm (i ons / cm 2) ° [Method made by annealing the ion 1 (annea 1) 2. The method according to item 7 of the scope of patent application, wherein the i i implantation process further includes a high temperature deposition process or a: process, the ion Grain boundaries between the metal layers Page 12