TW452878B - Method for preventing breakage of copper layer in chemical mechanical polishing - Google Patents

Abstract

The present invention discloses a method for preventing breakage of copper layer in chemical mechanical polishing, which is applicable on a damascene-type copper process. The method comprises separating the chemical mechanical polishing of a damascene-type copper line into two stages. First, the polishing of a copper layer is carried out to remove the copper layer on the barrier layer. Next, a deionized water at a high flow rate with or without the addition of a corrosion inhibitor is used for washing. Subsequently, the polishing of the barrier layer is carried out to remove the barrier layer on the dielectric layer. Then, a deionized water at a high flow rate with or without the addition of a corrosion inhibitor is used for washing. Finally, the cleaning step after a chemical mechanical polishing is carried out. The abovementioned steps prevent an electrochemical reaction from occurring, thereby preventing the breakage or peeling off of the copper layer.

Description

45287 8 V. Description of the invention (1) The present invention relates to semiconductor process technology, and in particular to a method for avoiding damage to the steel layer during the chemical mechanical polishing process. The process is different from the traditional metallization process that first defines the trench filling of the metal pattern dielectric layer. The method is to first cut the groove of the metal wire on a flat dielectric, and then move the metal of the gold stomach. Go, and get a ::: is embedded = layer (;) structure can make the inlay: bottom surface surface process compared to the traditional metallization process has the following advantages: C1) can make the surface of the substrate with an umbrella at any time.雷 Ｍ 枓 π & it Λ A (1000) can eliminate the disadvantages of the traditional manufacturing process that the dielectric material is not easy to fill in the gaps of the metal wires. The problem of the material is not easy, especially the 铜 V1 of copper metal. In the traditional interconnecting process, the contact window structure and wire ten; two Kunshan one, making the entire process extremely complicated disadvantages, the dual damascene process, the production process; two selective engraving, After the wire dielectric (ie e ^ tric) and via dielectric are etched away, a metal layer and a barrier layer of the plug are filled, and a conductive metal is filled into the via and The interconnecting grooves' have the effect of simplifying the process steps. In recent years, 'in order to match the development of component size reduction and increase the speed of component gold' 'copper with low resistance constant and high electron migration resistance' has gradually been used as a material for metal interconnects, replacing the traditional = aluminum Metal process technology. Copper metal's mosaic interconnect technology not only reduces the size of the interconnects, but also reduces the RC time delay. At the same time, it also solves the problem of hard-to-reach metallic copper coins. Therefore, it has become a requirement of multiple interconnects development trend.

Page 5 452878 Jade and invention description (2) Whether it is a single-inlaid or double-inlaid copper process, after the filling of the copper metal is completed, a flat-walled process is required to remove excess metal from the dielectric layer. However, 'after a long period of observation, after the wafer finishes the above polishing step, it is found that' the final copper wires often have broken or peeled '. The analysis is mainly due to the trench sidewalls. Adjacent to the barrier layer, a different metal interface is formed, and the time required to polish the barrier layer is longer than that of the copper layer. Therefore, after the copper layer is polished, the wafer enters the process required for the barrier layer polishing. The period (transient time) is elongated 'so that' once the grinding and other residues remain on the wafer surface, forming an electrolyte between the copper layer and the barrier layer, an electrochemical reaction will occur, and as the process waits for Long and increase the electrochemical reaction time, under the influence of galvanical corrosion, the final copper wire is broken or peeled, which seriously affects the quality of the internal wiring. In view of this, the main object of the present invention is to provide a method for avoiding copper corrosion during the CMP process to improve the quality of copper wires. In detail, the present invention is a method for avoiding damage to a copper layer during a chemical mechanical polishing process, which is applicable to an inlay copper process. The method is to divide the chemical mechanical polishing of a mosaic copper wire into two stages. First, the copper layer is performed. Grind to remove the copper layer above the barrier layer; then, clean it with high-flow deionized water (DI) with or without the corrosion inhibitor added; then perform the barrier layer grinding 'to remove the barrier above the dielectric layer Barrier layer; then clean with high flow rate deionized water with or without corrosion inhibitor.

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The above-mentioned high-flow-rate deionized water (DI) can be selected as a corrosion inhibitor in advance, which is not particularly limited, and may be a conventional triaz〇1 ^ compound such as benzyltriazine (benz) Triazol (BTA), tolyitriazole (TA), benzobenzotriazole (CBT), etc. In order to make the above and other objects, features, and advantages of the present invention more obvious and simple, a preferred embodiment is given below in conjunction with the accompanying drawings to make a detailed description as follows: Brief description of the drawings FIG. 4 is a series of cross-sectional views for explaining a process of manufacturing a mosaic copper wire according to a preferred embodiment of the present invention. Explanation of symbols 10 ~ substrate and semiconductor element; 12 ~ dielectric layer; 13 ~ interconnecting trench and interlayer window; 1 ~ 4 ~ barrier layer; 16 ~ copper metal layer; 17 ~ 19 ~ deionized water . EXAMPLES This example is applied to the copper metal interconnection process of the damascene structure according to the above-mentioned planarization method. For convenience, the following description is only based on the dual damascene process, but those skilled in the art can also apply to On a single damascene process. After experiments and research analysis, the final copper wire is often corroded

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The situation has already been described as before, the academic response continues, and c solves the above problems. The only way to avoid electrochemical biochemical factors, including Qingha = The embodiment proposed by Yiming is to control the medium of its solution, and the other two items 丨& Residues, lack of electricity between the copper layer and the barrier layer to avoid electrification and overwhelming "To reduce the waiting time between the two grinding processes, the damage phenomenon should continue to cause the copper layer to peel off due to corrosion or " According to Fig. 1, it shows the initial steps of this embodiment. Under dielectric. It may include several layers of metal interconnects and several electrically connected semiconductor components, such as transistors, resistors, and logic components. For semiconductor substrates and integrated circuits below dielectric layer 12, only It is represented by reference numeral 10. The dielectric layer 2 may be composed of several layers of silicon oxide, nitride 2, borosilicate glass, borophosphosilicate glass, or other low-dielectric-constant materials. However, it is simply indicated by reference numeral 12 here. A double-embedded groove 13 is formed in the dielectric layer 12, including an interconnecting trench and an interlayer window. Those skilled in the art can make this double-embedded double-embedded groove in any way without departing from the present invention. Spirit and scope. Referring to FIG. 2, a barrier layer 14 ′ is deposited along the existing contour on the substrate so that the barrier layer covers the trench and the dielectric layer 12. This diffusion barrier layer can help subsequent metal adhesion and prevent its diffusion. For copper, suitable diffusion barrier layer materials include: button (Ta), nitride button (TaN), tungsten nitride (WN), or It is titanium nitride (TiN) and the like commonly used in conventional manufacturing processes. Here, tantalum nitride is used as an example. Next, a copper conductive layer 16 is formed on the barrier layer by a chemical vapor deposition method (CVD), a physical vapor deposition method (PVD), or an electric ore deposition method (Eiectropiating), and fills the interconnect trenches. 13, as shown in the figure

4528 7 V. Description of the invention (5). The preferred one can use an ionized metal plasma (IMP) to deposit a seed layer (not shown) with a thickness of about 300 to 1500 angstroms on the substrate, and then complete the copper conductive layer deposition by the electric boat method. In a better case, a machine equipped with a multi-chamber reaction chamber can be used to sequentially finish the deposition of the barrier layer and the seed layer in different chambers without breaking the vacuum, thereby improving the reliability of the process. And increase productivity. The next step 'is to perform the first stage of planarization by chemical mechanical polishing of the copper layer. The metal film polishing liquid used was an acidic slurry, and wind of peroxide (Hg) was added as a polishing accelerator. In the first stage of polishing, the barrier layer 14 can be used as the polishing end point, as shown in FIG. 3. Immediately, 'immediately wash with a high flow of deionized water 17 with or without cormorant inhibitor, to avoid the residue of pulp residue', and the addition of a curcumin inhibitor may Suppress the Rot effect. Secondly, please refer to FIG. 4 to shorten the process waiting time, and then perform the second stage of the chemical mechanical polishing of the barrier layer by using the dielectric layer 12 as the polishing end point, such as polishing the tantalum nitride layer 14 to the surface of the dielectric layer. To complete the planarization step. Immediately afterwards, the high-flow deionized water 19 with or without the addition of a corrosion inhibitor was also used for cleaning. In order to avoid the residue of the slurry residue, the cleaning time of the deionized water was in the range of more than 5 5 seconds. It is better, and the addition of a corrosion inhibitor can suppress the corrosion effect. Secondly, after chemical barrier polishing of the barrier layer, shorten the process waiting time 'and then immediately perform the cleaning step after polishing.

4 5287 5. Description of the invention (6) The corrosion inhibitor can be optionally added to the above-mentioned deionized water (DI) for cleaning. It is not particularly limited, and may be a triazol compound commonly used in the art. 'Such as benzotriazole (BTA), tolyltriazole (TTA), and carboxybenzotriazole (CBT), etc. Later, those who are familiar with this technique can sequentially produce a silicon nitride protective layer and another internal metal dielectric layer (IMD) according to traditional process technology, and repeat the above process of the present invention to complete the subsequent multiple interconnects. These processes are not related to the features of the present invention and will not be repeated here. In summary, the improved process proposed by the present invention is carried out in the stage of chemical mechanical polishing of copper wires, and is cleaned with high-flow deionized water (DI) with or without corrosion inhibitors. Residues can avoid the medium that produces electrolyte between the copper layer and the barrier layer. On the other hand, to control the waiting time between the two grinding processes, it can prevent the electrochemical reaction from continuing to cause the copper layer to peel or break due to corrosion. phenomenon. Although the present invention has been disclosed above in a preferred embodiment, it is not intended to limit the present invention. 'Any person skilled in the art can make various modifications and decorations without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application.

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Claims (1)

6. Scope of patent application 1. A method for avoiding copper corrosion during chemical mechanical polishing, which is suitable for a mosaic copper process. The mosaic copper process provides a semiconductor substrate covered with a dielectric layer. After the definition, there is a trench. The trench and the dielectric layer are sequentially covered with a barrier layer and a copper layer, and the copper layer fills the trench. The method includes the following steps: grinding a copper layer, To remove the copper layer above the barrier layer; clean the semiconductor substrate with high-flow deionized water for the first time; perform barrier layer grinding to remove the barrier layer above the dielectric layer; Cleaning the semiconductor substrate with ion water; and a cleaning step after performing chemical mechanical polishing on the semiconductor substrate. 2. The method as described in item 1 of the scope of patent application, wherein the second step of cleaning the semiconductor substrate with high-flow deionized water, the cleaning time of the high-flow deionized water is more than 55 seconds. 3. The method according to item 1 of the scope of patent application, wherein the step of cleaning the semiconductor substrate with deionized water for the first time further includes adding a corrosion inhibitor. 4. The method according to item 3 of the scope of patent application, wherein the corrosion inhibitor is a triazine (t r i a ζ ο 1) compound. 5. The method as described in item 4 of the scope of patent application, wherein the corrosion inhibitor is benzotriazole (BTA), tolyltriazole (TTA), carboxybenzotriazole ; CBT) group. 6. The method according to item 1 of the scope of patent application, which comprises the step of cleaning the semiconductor substrate with the second step of deionizing water with a high flow rate, further including adding a corrosion solution. 4 528 Six 'patented patents' for corrosion inhibitors. Wherein, the corrosion inhibitor, wherein the corrosion inhibitor, tolyltriazole is the method described in item 6 of the scope of patent application, and the preparation is a triazine (t r a a ζ ο 1) compound. 8. The method as described in item 7 of the scope of the patent application. The preparation is one of the group of benzotriazole (BTA) (totallazole; TTA) and carboxybenzotriazole (CBT). 9. · A method for avoiding copper corrosion during chemical mechanical polishing process, applicable to a mosaic copper process 'the mosaic copper process provides a semiconductor substrate covered with a dielectric layer' The dielectric layer is defined to have a groove A trench, the trench and the dielectric layer are sequentially covered with a barrier layer and a copper layer, and wherein the steel layer fills the trench, the method includes the following steps: grinding the copper layer to remove the barrier The copper layer above the layer; the semiconductor substrate was first cleaned with deionized water with a south flow of inhibitor added; the barrier layer was ground to remove the barrier layer above the dielectric layer; the second time was added by the corrosion Cleaning the semiconductor substrate with a high flow of deionized water that touches the inhibitor; and a cleaning step after the semiconductor substrate is subjected to chemical mechanical polishing 10. The method as described in item 9 of the scope of patent application, wherein the second Step of cleaning the semiconductor substrate with ionized water. The cleaning time of the high-flow deionized water is more than 55 seconds. 11. The method according to item 10 of the scope of the patent application, wherein the corrosion inhibitor is a triazine (t r a ζ ο 1) compound. I. 4528 on page 12 6. Application scope of patent 12. The method as described in item 11 of the scope of application for patent, wherein the corrosion inhibitor is benzotriazole (BTA), tolyl triazo 0 ( tolyltriazole (TTA), carboxybenzotriazole (CBT) group. Page 13