TW451445B - Manufacturing method of copper wire - Google Patents

Manufacturing method of copper wire Download PDF

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TW451445B
TW451445B TW89111027A TW89111027A TW451445B TW 451445 B TW451445 B TW 451445B TW 89111027 A TW89111027 A TW 89111027A TW 89111027 A TW89111027 A TW 89111027A TW 451445 B TW451445 B TW 451445B
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Taiwan
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layer
copper wire
copper
silicon layer
manufacturing
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TW89111027A
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Chinese (zh)
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Ming-Shih Tsai
Yin-Pin Li
Ting-Jen Hu
Bau-Tung Dai
Ming-Shian Feng
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Shr Min
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Abstract

The present invention provides a manufacturing method for copper wire, comprising: after forming a conformal barrier layer on the dielectric with trench formed, covering a layer of silicon material; then, stripping part of the silicon layer so that the silicon layer is filled into the trench only; then, conducting contact displacement reaction to convert the silicon layer into copper wire.

Description

4 5 1 44 5 五、發明說明(i) -— 【發明領域】 本發明係有關於—種銅導線的製造方法,特別是有關 於一種利用矽原子接觸置換(c〇ntact dispiacement) 銅,以選擇性地形成局部的銅金屬,做為鋼 【習知技術】 ^ 在積體電路的技術上,為了提高元件的積集度以及資 料傳輸速度,製程技術已由次微米(sub_micr〇n )進入了 四分之一微米(quarter-micron)甚或更細微尺寸的範 圍。然而,當線寬愈來愈小,鋁導線已無法滿足對速度的 要求’因此’以具有高導電性之金屬鋼做為導線,以降低 RC延遲(RC delay ),係為目前的趨勢。 但是’銅金屬無法以乾蝕刻的方式來定義圖案,因為 銅金屬與氣氣電漿氣體反應生成的氯化銅(CuCl2)的彿 點極高(約1500 °C),因此鋼導線的製作需以鑲敌製程 (damascene process )來進行。另外,铜金屬的沈積通 常是以電鍍的方式’而在進行電鍍之前,需先於已形成溝 槽的介電層上形成一層順應性(conformal )阻障層後, 於溝槽中的阻障層表面沈積一層活化晶種層(seed layer )。然而,在深次微米製程時,要均勻覆蓋此活化晶種層 於高寬比(aspect ratio)大的溝槽,具有相當大的困難 度。 此外,當銅金屬電鍍完成後,需進行化學機械研磨製 程將多餘的銅磨除’然而’當化學機械研磨製程進行至一 程度時,會因為銅金屬與阻障層之間的研磨速率不同,造4 5 1 44 5 V. Description of the Invention (i)-[Field of the Invention] The present invention relates to a method for manufacturing a copper wire, and more particularly to a method of using copper atoms to dissolve copper. Selectively form a local copper metal as steel [Known Technology] ^ In terms of integrated circuit technology, in order to improve the component integration and data transmission speed, the process technology has been entered by sub-micron (sub_micr〇n) A range of quarter-micron or even finer sizes. However, as the line width becomes smaller and smaller, the aluminum wire can no longer meet the speed requirement. Therefore, the use of metal steel with high conductivity as the wire to reduce the RC delay is a current trend. But 'copper metal cannot define the pattern by dry etching, because copper chloride (CuCl2) generated by the reaction of copper metal and gas plasma gas is extremely high (about 1500 ° C), so the production of steel wires requires Performed in a damascene process. In addition, copper metal is usually deposited by electroplating. Before electroplating, a conformal barrier layer must be formed on the trenched dielectric layer, and then the barrier in the trench must be formed. A seed layer is deposited on the surface of the layer. However, in the deep sub-micron process, it is quite difficult to uniformly cover the trenches with a large aspect ratio of the activated seed layer. In addition, after the copper metal plating is completed, a chemical mechanical polishing process is required to remove the excess copper. However, when the chemical mechanical polishing process is performed to a certain degree, the polishing rate between the copper metal and the barrier layer is different. Make

^^5 1 五、螯明說 44 5 q π說明(2) ύί _ 七介電層 所形成的銅導線有碟化(dishing)現象,且有 耗捐的問題發生,這些問題均會影響内連線的品質 晶輕層, <避免銅 【蝥明之目的及概要】 有鑑於此,本發明提供一種不需沈積銅活化 以及不需鋼電鍍製程,即可形成銅導線的方法 此外,本發明提供一種形成鋼導線的方法 導線之碟化及介電層磨耗等問題的發生。 再者’本發明提供一種可不需進行銅金屬的化學機 研磨製程的銅導線之形成方法。 因此’本發明之目的係針對於上述習知技術而提出改 良,本發明提供一種銅導線的製造方法,包括:於基底上 已形成溝槽之介電層上,形成順應性的JI且障層’之後於阻 障層上覆蓋一層>5夕層,再剝除部份梦層,使梦層僅填入溝 槽中’隨後進行接觸置換反應,使發層轉為銅導線。 依據本發明一較佳實施例,上述之卩且障層為钽、链/ 氮化钽、鈦或鈦/氮化鈦,矽層為非晶矽戒多晶矽,接觸 置換反應係在一包含銅離子和氟離子的接觸置換水溶液中 進行’其中銅離子係由硫酸銅提供,氟離手係由氫氟酸或 氫氟酸/氟化銨提供。此外,在上述之銅導線的製造方法 中’於進行完置換反應前’更包括將介電層上之阻障層剝 除’其剥除的方法為化學機械研磨;於進行完置換反應 後,更包括進行回火步驟,用以提高銅導線内之鋼原子的 緻密度,進而降低銅導線的電阻。 由於本發明藉由矽原子與鋼離子之操觸置換,使銅導^^ 5 1 V. Cheming said 44 5 q π Explanation (2) ύ _ _ The copper wires formed by the seven dielectric layers have dishing and there are problems of donation, which will affect the interconnection Quality light crystal layer of the wire, < Avoid copper [Objective and summary of Ming] In view of this, the present invention provides a method for forming copper wires without the need to deposit copper activation and steel plating process. In addition, the present invention provides A method for forming a steel wire. Problems such as wire dishing and abrasion of a dielectric layer occur. Furthermore, the present invention provides a method for forming a copper wire which does not require a chemical mechanical polishing process of copper metal. Therefore, the purpose of the present invention is to improve the conventional technology. The present invention provides a method for manufacturing a copper wire, which includes: forming a compliant JI barrier layer on a dielectric layer having a trench formed on a substrate. 'After that, cover the barrier layer with a layer> 5th layer, and then peel off part of the dream layer, so that the dream layer fills only the trench.' Then, a contact replacement reaction is performed to turn the hair layer into a copper wire. According to a preferred embodiment of the present invention, the barrier layer is tantalum, chain / tantalum nitride, titanium, or titanium / titanium nitride, the silicon layer is amorphous silicon or polycrystalline silicon, and the contact displacement reaction is based on copper ion. Contact with fluoride ions is carried out in an aqueous solution 'where the copper ions are provided by copper sulfate, and the fluorine free hands are provided by hydrofluoric acid or hydrofluoric acid / ammonium fluoride. In addition, in the above-mentioned manufacturing method of the copper wire, 'before the completion of the replacement reaction' further includes stripping the barrier layer on the dielectric layer ', and the method of removal is chemical mechanical polishing; after the replacement reaction is performed, It also includes a tempering step to increase the density of the steel atoms in the copper wire, thereby reducing the resistance of the copper wire. Since the invention replaces the copper atoms with the

3 1 44 5 五、發明說明(3) 線可以選擇性地形成於溝槽中,簡化了銅導線製程的困難 度。此外’本發明僅藉由簡單的矽化學機械研磨及阻障層 化學機械研磨,間接定義出鋼導線的圖案,因而避開複雜 的銅金屬、阻障層和介電層之間的化學機械研磨之選擇性 控制的問題’藉以克服習知因銅金屬的化學機械研磨所造 成的銅導線之碟化現象和介電層磨損等問題。 為讓本發明之上述目的、特徵及優點能更明顯易懂, 下文特舉一較佳實施例’並配合所附圖式,作詳細說明如 下 : 【圖式簡 第1A 種應用碎 【符號說 基底 介電 溝槽 【實施例 由於 的氧化還 形成鋼導 行,來選 第1A 種應用矽 流程剖面 單說明】 圖至第1C圖 原子接觸置 明】 -10 ; 層〜1 2 ; -14 ; ] 矽原子與銅 原反應,因 線的區域, 擇性地於局 圖至第1C圖 原子與銅離 圖。 係繪示根據本發明一較佳實施例之一 換鋼於鋼内連線製程的流程剖面圖。 阻障層、16a ; 矽層〜18、18a ; 鋼導線〜2 0 ; 離子在適當的環境下,會發生自發性 此本發明係藉由將矽原子層放置於欲 再藉由氧化還原接觸置換反應的進 部區域形成銅導線。 係繪示根據本發明一較佳實施例之一 子的接觸置換反應於銅内連線製程的3 1 44 5 V. Description of the invention (3) The wire can be selectively formed in the trench, which simplifies the difficulty of the copper wire process. In addition, the present invention only indirectly defines the pattern of the steel wire by simple silicon chemical mechanical polishing and barrier chemical mechanical polishing, thereby avoiding the complicated mechanical mechanical polishing between the copper metal, the barrier layer and the dielectric layer. The problem of selective control 'is used to overcome the problems of the dishing of copper wires and the wear of dielectric layers caused by the conventional chemical mechanical polishing of copper metal. In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings and described in detail as follows: [Schematic diagram 1A Application fragmentation [Symbol said Substrate dielectric trench [The embodiment also forms steel guides due to the oxidation, to select the 1A application silicon flow profile section description] Figures to Figure 1C atomic contact set] -10; layer ~ 1 2; -14; ] The silicon atom reacts with the source of copper, depending on the area of the line, selectively in the local map to Figure 1C, the atom and copper ion diagram. It is a cross-sectional view of a process for changing steel to a steel interconnecting line according to one of the preferred embodiments of the present invention. Barrier layer, 16a; Silicon layer ~ 18, 18a; Steel wire ~ 2 0; Ions will spontaneously occur under appropriate environment. The present invention is to place silicon atomic layer on it to be replaced by redox contact. The lead region of the reaction forms a copper wire. This is a schematic diagram of the contact displacement reaction of a substrate according to one of the preferred embodiments of the present invention.

第6頁 451445 五、發明說明(4) 首先請參照第1A圖,提供一基底1 0,例如是半導體石夕 基底,其上已形成半導體元件(未繪示),且已形成—介 電層1 2,做為不同層導線間的電性隔離之用,其厚度約為 0·3微米至1微米左右,此介電層12的材質例如是二氣化;g夕 或是其他具有低介電常數的物質,例如含氟的二氧化秒、 HSQ (hydrogen si1esquioxane ) ' MSQ (methyl si lesquioxane ),此介電層12中已形成有溝槽14,用以 於後續填入導線材料做為導線用。之後於介電層1 2表面形 成一層均句且順應性(con f or ma 1)之阻障層16,其形成 方法例如是物理氣相沈積,其厚度約為200埃至500埃左 右,其材質例如是组(Ta)、组/氮化纽(TaN)、鈦(Ti )/氮化鈦(T i N )、氮化鎢(WN )等,用以避免後續將形 成的銅導線中之銅原子擴散至介電層12,且亦用以增加鋼 導線與介電層1 2之間的黏著力。 之後於阻障層16沈積一層矽層18,並填滿溝槽14,其 沈積方法例如是電漿輔助化學氣相沈積、電漿增加化學氣 相沈積(PECVD )、低壓化學氣相沈積(LPCVD )、高真空 化學氣相沈積(UHVCVD ),此矽層1 8的材質例如是非晶石夕 層或是多晶矽層’較佳的是非晶矽層,因為沈積非晶矽層 所需的製程溫度較低,較不會破壞其他已形成的元件之電 性。值得注意的是,沈積矽層1 8的製程技術對高寬比大的 溝槽1 4之溝填能力相當好。 接著請參照第1B圖,進行一化學機械研磨製程,以介 電層12表面上方的矽層is磨除而轉為矽層i8a,使矽層18aPage 6 451445 V. Description of the invention (4) First, please refer to FIG. 1A to provide a substrate 10, such as a semiconductor stone substrate, on which a semiconductor element (not shown) has been formed, and a dielectric layer has been formed. 12. For electrical isolation between different layers of wires, its thickness is about 0.3 micrometers to 1 micrometer. The material of this dielectric layer 12 is, for example, two gasification; g or other materials with low dielectric Substances with an electrical constant, such as fluorine-containing dioxide seconds, HSQ (hydrogen siesesoxoxane) 'MSQ (methyl siquisquioxane), trenches 14 have been formed in this dielectric layer 12 for subsequent filling of the wire material as the wire use. Then, a uniform and compliant barrier layer 16 is formed on the surface of the dielectric layer 12. The formation method is, for example, physical vapor deposition, and the thickness is about 200 angstroms to 500 angstroms. The material is, for example, group (Ta), group / nitride (TaN), titanium (Ti) / titanium nitride (T i N), tungsten nitride (WN), etc., in order to avoid the subsequent formation of copper wires. Copper atoms diffuse into the dielectric layer 12 and also serve to increase the adhesion between the steel wires and the dielectric layer 12. Thereafter, a silicon layer 18 is deposited on the barrier layer 16 and the trench 14 is filled. The deposition methods are, for example, plasma-assisted chemical vapor deposition, plasma-added chemical vapor deposition (PECVD), and low-pressure chemical vapor deposition (LPCVD). ), High Vacuum Chemical Vapor Deposition (UHVCVD). The material of this silicon layer 18 is, for example, an amorphous silicon layer or a polycrystalline silicon layer. 'Amorphous silicon layer is preferred because the process temperature required to deposit the amorphous silicon layer is relatively high. Low, will not damage the electrical properties of other formed components. It is worth noting that the process technology for depositing the silicon layer 18 is quite good for the trench filling capacity of the trench 14 with a high aspect ratio. Next, referring to FIG. 1B, a chemical mechanical polishing process is performed to remove the silicon layer is above the surface of the dielectric layer 12 into a silicon layer i8a, so that the silicon layer 18a

第7頁 45 1 44 5Page 7 45 1 44 5

僅填入於溝槽14中。另外’繼續進行阻障層16的化學機械 研磨製程,以剝除位於介電層12上表面的阻障層16,使其 轉為阻障層1 β a。 , 上述所形成的矽層1 8a即為後續將形成的銅導線之區 域此外’經化學機械研磨後的珍層1 8 a,其上表面可以 大致與介電層12的上表面齊平,或者低於介電層12的上表 面一距離,亦可藉由控制此距離,來控制矽層18a的高 度’並進而間接控制後續將形成之銅導線的高度。 接著請參照第1C圖,將矽層1 8 a置於接觸置換溶液 中’以進行氧化還原反應’使矽層18a轉為銅導線2〇。值 得注意的是,當矽層1 8a因氧化還原反應而置換成銅導線 20時’銅導線2 0的體積會較原先之矽層18a的體積為大。 故’當矽層18a的上表面大致與介電層12的上表面齊 平時,所形成的銅導線20會略為鼓起,第圖的圖示係以 此為例;如果控制矽層1 8 a的上表面低於介電層1 2的上表 面一距離,則可以間接控制所形成之銅導線2〇的高度。 上述之接觸置換溶液係由銅離子(Cu2+ )和氟離子 (F-)的水溶液所組成,其中銅離子例如是由硫酸銅 (CuS〇4 )提供,氟離子例如是由氫氟酸(HF )或者是氫 氟酸/氟化銨(NHJ )提供,而氟離子的濃度約為〇. 3至5 重量百分濃度(% )左右。此接觸置換溶液的溫度係控制 在約10 °C至55 °c之間。 當妙層18a置於此接觸置換溶液時,氟離子會和發層 18a中的矽原子氧化生成可溶性的氟化矽(si Fj-),並釋Only filled in the trench 14. In addition, the chemical mechanical polishing process of the barrier layer 16 is continued to strip the barrier layer 16 on the upper surface of the dielectric layer 12 and turn it into the barrier layer 1 β a. The silicon layer 18a formed above is the area of the copper wire to be formed in the following. In addition, the surface of the rare earth layer 18a after chemical mechanical polishing may be substantially flush with the upper surface of the dielectric layer 12, or A distance below the upper surface of the dielectric layer 12 can also be controlled by controlling this distance to control the height of the silicon layer 18a, and indirectly control the height of the copper wires to be formed subsequently. Next, referring to FIG. 1C, the silicon layer 18a is placed in a contact replacement solution 'to perform a redox reaction' to turn the silicon layer 18a into a copper wire 20. It is worth noting that when the silicon layer 18a is replaced with a copper wire 20 due to a redox reaction, the volume of the 'copper wire 20' will be larger than the volume of the original silicon layer 18a. Therefore, when the upper surface of the silicon layer 18a is approximately flush with the upper surface of the dielectric layer 12, the formed copper wire 20 will bulge slightly. The illustration in the figure is based on this example. If the silicon layer 18a is controlled, If the upper surface of the dielectric layer 12 is lower than the upper surface of the dielectric layer 12, the height of the copper wire 20 can be controlled indirectly. The above-mentioned contact replacement solution is composed of an aqueous solution of copper ions (Cu2 +) and fluoride ions (F-), wherein the copper ions are provided by copper sulfate (CuS04), and the fluorine ions are, for example, hydrofluoric acid (HF) Or it is provided by hydrofluoric acid / ammonium fluoride (NHJ), and the concentration of fluoride ions is about 0.3 to 5 weight percent (%). The temperature of this contact displacement solution is controlled between about 10 ° C and 55 ° c. When the wonderful layer 18a is placed in this contact replacement solution, the fluoride ions and the silicon atoms in the hair layer 18a are oxidized to form soluble silicon fluoride (si Fj-), and released.

第8頁 45 1 445Page 8 45 1 445

五 '發明說明¢6) Ϊ出Ϊ:二溶Λ中的銅離子則會接受電子,還原成銅原 子待矽層Ua中的矽原子完全被氧化置換成銅原子時, 反應即終止,則於溝槽14中形成銅導線2〇。上述之氧化還 原半反應式和全反應式如下所示: 氧化反應:Si(s) + 6 F- — SiFs2_ + 4e-還原反應:2 CU2+ + 4 e- 4 2 Cu⑷ 全反應:,2 Cu2+ + Si(s) + 6 F- - 2 Cu(s) + SiF62-其中’Si/SiFe2-的標準氧化電位為一 U4 V,cu2+的標 準還原電位為+ 0,337 V ,上述之全反應的電位為+ 1 577 ” v。故’此反應是屬於自發性反應,不需外加能量。 此外’上述之反應速率與銅離子的濃度和氟離子的濃 度成正比’因此’以氫氟酸/氟化銨之缓衝溶液做為氟離 $的來源會具有較佳的效果,因為氟離子的濃度會以一固 疋濃度存在此接觸置換溶液中,而不會因氟離子的消耗造 成氟離子濃度快速降低。 之後,進行一回火步驟,以增加銅導線2〇中之銅原子 的緻密度,進而降低銅導線2〇本身的電阻。此回火步驟例 如是在約200 t至5 0 0 °C之間,在隋性氣體下進行高溫回 火’較佳的溫度為約4〇〇。(:,較佳的隋性氣體為氮氣,此 回火·步驟所需的製程時間約為2〇分至90分左右。 由於銅原子僅選擇性的沈積於溝槽14中,因此,於銅 導線2 0形成完之後,可以不經化學機械研磨,而直接進行 後續製程’因此簡化製程步驟,且可以避免因研磨銅而造 戍的碟化和介電層1 2耗損的問題發生。Five 'invention description ¢ 6) ΪΪ: The copper ions in the second solution Λ will accept electrons and reduce to copper atoms. When the silicon atoms in the silicon layer Ua are completely oxidized and replaced with copper atoms, the reaction is terminated. A copper wire 20 is formed in the trench 14. The above redox half-reaction and full-reaction formulas are as follows: Oxidation reaction: Si (s) + 6 F- — SiFs2_ + 4e- reduction reaction: 2 CU2 + + 4 e- 4 2 Cu⑷ full reaction: 2 Cu2 + + Si (s) + 6 F--2 Cu (s) + SiF62- where the standard oxidation potential of 'Si / SiFe2- is one U4 V, the standard reduction potential of cu2 + is + 0,337 V, and the potential of the above full reaction is + 1 577 "v. Therefore, 'This reaction is a spontaneous reaction, and no external energy is required. In addition,' The above reaction rate is directly proportional to the concentration of copper ions and fluoride ions ', so' hydrofluoric acid / ammonium fluoride The buffer solution as the source of fluoride ion will have better effect, because the concentration of fluoride ion will be present in the contact replacement solution at a solid concentration, and the concentration of fluoride ion will not decrease rapidly due to the consumption of fluoride ion. Then, a tempering step is performed to increase the density of the copper atoms in the copper wire 20, thereby reducing the resistance of the copper wire 20 itself. This tempering step is, for example, between about 200 t to 50 ° C High-temperature tempering under inert gas is a preferred temperature of about 400. (:, The best inert gas is nitrogen, and the process time required for this tempering step is about 20 minutes to 90 minutes. Since copper atoms are only selectively deposited in the trench 14, therefore, they are formed on the copper wire 20 After completion, the subsequent process can be performed directly without chemical mechanical polishing, thus simplifying the process steps, and avoiding the problems of dishing and dielectric layer 12 wear caused by grinding copper.

451445 五、發明說明(7) 【發明之特徵與效果】 綜上所述,本發明至少具有下列優點: 1.利用本發明所形成的鋼導線’不需藉由電鍍法來形 成,故不需形成晶種層,因此可以避免因線寬縮小使晶種 層覆蓋不均的問題。 2.由於本發明的銅導線係藉由矽層經接觸置換反應轉 換而成’再加上形成的矽層之溝填效果佳,因此極適合於 高寬比大的次微米製程中之鑲嵌製程。 3.本發明在形成銅導線的過程中,不需經過銅金屬的451445 V. Description of the invention (7) [Features and effects of the invention] In summary, the present invention has at least the following advantages: 1. The steel wire formed by the present invention is not required to be formed by electroplating, so it is not necessary Since the seed layer is formed, the problem of uneven coverage of the seed layer due to the reduction of the line width can be avoided. 2. Since the copper wire of the present invention is converted by the silicon layer through a contact displacement reaction, and the formed silicon layer has a good trench filling effect, it is very suitable for the damascene process in a submicron process with a large aspect ratio. . 3. In the process of forming the copper wire of the present invention, it is not necessary to pass through the copper metal.

化學機械研磨製程’故可以避免因研磨鋼金屬所衍生的碟 化和介電層耗損等問題。 ' 雖然本發明已以較佳實施例揭露如上,然其並非用以 ^ i本發明,任何熟習此項技藝者,在不脫離本發明 ㈣,當可做更動與调飾,因此本發明之 田事後附之申請專利範圍所界定者為準。 #固The CMP process can avoid problems such as dishing and dielectric loss caused by grinding steel. 'Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to ^ i the present invention. Any person skilled in the art can make changes and decorations without departing from the present invention. Therefore, the field of the present invention What is attached after the event is defined by the scope of patent application. #solid

Claims (1)

451445 六、申請專利範圍 1. 一種銅導線的製造方法,包括: 提供一基底,該基底上已形成具有一溝槽之一介電 層; 於該介電層上形成順應性的一阻障層; 於該阻障層上覆蓋一矽層; 剝除部份該矽層,使該矽層僅填入該溝槽中;以及 進行一接觸置換反應,使該矽層轉為一銅導線。 2·如申請專利範圍第1項所述之銅導線的製造方法, 其中該阻障層係選自由钽、鈕/氮化鈕、鈦和鈦/氮化鈦所 組成的族群。 3. 如申請專利範圍第1項所述之銅導線的製造方法, 其中於剝除部份該矽層後,進行該接觸置換反應之前,更 包括剝除該介電層上之該阻障層,使該阻障層僅位於該溝 槽中。 4. 如申請專利範圍第1項所述之銅導線的製造方法, 其中該矽層包括一非晶矽層。 5. 如申請專利範圍第1項所述之銅導線的製造方法, 其中該矽層包括一多晶矽層。 6. 如申請專利範圍第1項所述之銅導線的製造方法, 其中該接觸置換反應係於一含銅離子和氟離子的水溶液中 進行。 7. 如申請專利範圍第6項所述之鋼導線的製造方法’ 其中該銅離子係由硫酸鋼提供。 8. 如申請專利範圍第6項所述之銅導線的製造方法’451445 6. Scope of patent application 1. A method for manufacturing a copper wire, comprising: providing a substrate on which a dielectric layer having a trench has been formed; and forming a compliant barrier layer on the dielectric layer Covering a silicon layer on the barrier layer; stripping off part of the silicon layer so that the silicon layer fills only the trench; and performing a contact replacement reaction to turn the silicon layer into a copper wire. 2. The method for manufacturing a copper wire as described in item 1 of the scope of the patent application, wherein the barrier layer is selected from the group consisting of tantalum, button / nitride button, titanium, and titanium / titanium nitride. 3. The method for manufacturing a copper wire as described in item 1 of the scope of patent application, wherein after stripping a part of the silicon layer and before performing the contact replacement reaction, the method further includes stripping the barrier layer on the dielectric layer. So that the barrier layer is located only in the trench. 4. The method for manufacturing a copper wire according to item 1 of the scope of the patent application, wherein the silicon layer includes an amorphous silicon layer. 5. The method for manufacturing a copper wire according to item 1 of the scope of the patent application, wherein the silicon layer includes a polycrystalline silicon layer. 6. The method for manufacturing a copper wire according to item 1 of the scope of the patent application, wherein the contact displacement reaction is performed in an aqueous solution containing copper ions and fluoride ions. 7. The method for manufacturing a steel wire according to item 6 of the scope of the patent application, wherein the copper ion is provided by sulfuric acid steel. 8. Manufacturing method of copper wire as described in item 6 of the scope of patent application ’ 451445451445 第12頁Page 12
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE202015105540U1 (en) 2014-12-05 2015-10-29 Yuan-Hung WEN brake disc
DE202017103541U1 (en) 2016-08-30 2017-07-10 Yuan-Hung WEN brake disc

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE202015105540U1 (en) 2014-12-05 2015-10-29 Yuan-Hung WEN brake disc
DE102015117790A1 (en) 2014-12-05 2016-06-09 Yuan-Hung WEN brake disc
DE202017103541U1 (en) 2016-08-30 2017-07-10 Yuan-Hung WEN brake disc
DE102017113040A1 (en) 2016-08-30 2018-03-01 Yuan-Hung WEN brake disc

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