447064 A7 5629twf.doc/008 gy 五、發明説明（I ) 本發明是有關於一種可於半導體封裝時之分辨不良 品（Defective Unit)的基板結構與分辨方法 (Identification)，且特別是有關於一種可於迷你球格陣列 (Mini Ball Grid Array，Mini BGA)之封膠陣列（Array Molding)中分辨不良品之迷你球格陣列基板與辨識方 .法。 半導體晶片的封裝技術，爲因應電子產品輕、薄、短' 小之趨勢，已由八零年代初期，僅爲將晶片安裝於印刷電 路板（Printed Circuit Board)上之插腳式（Insertion Mount)封 裝方式，在短短十幾年間，進展至高密度之晶片尺寸封裝 (Chip Scale Package 或 Chip Size Package，CSP)技術。 其中，隨著超細間距(Ultra-Fine-Pitch)的發展，以往 利用導線架（Lead Frame)來完成晶片封裝的技術，已不能 達到其要求，而球格陣列式(Ball Grid Array，BGA)封裝展 現了強而有力的優勢，隱然成爲目前最主要的封裝方式。 經濟部智慧財產局員工消費合作社印製 所謂的迷你球格陣列式封裝，就是在一基板上形成多 個陣列排列的封裝區塊(Package Site)，然後，分別將晶片 分別與此些封裝區塊形成電性連接，之後，再以封膠 (molding compound)來保護晶片，則晶片可藉由形成於此 些封裝區塊上之陣列方式排列的接觸腳，與外界來進行訊 號的傳遞。 第1圖係繪示傳統迷你球格陣列式封裝所使用之基板 的上視示意圖。 請參照第1圖，一般的迷你球格陣列式封裝，是先在 3 ¥紙張尺度適用中國國家標準（CNS > A4规格（210X297公釐） " 447064 A7 5629twf.doc/0 08 g-y 五、發明説明（> ) —迷你球格陣列基板100的電路區102中，形成複數個陣 列排列之封裝區塊104。 接著，將複數個晶片分別與各個封裝區塊104形成電 性連接，然後，再進行模注，以使晶片受到封膠的保護。 .之後，將各個封裝區塊104切割分離，完成迷你球格陣列 .封裝製程。 其中，於迷你球格陣列基板100中形成封裝區塊104 之後，以及將複數個晶片分別與各個封裝區塊104形成電 性連接之後，通常會對各個封裝區塊104進行外觀檢測， 以初步判定這些封裝區塊104以及晶片之電性連接是否良 好，同時，會在被判定爲不良的封裝區塊l〇4a以及晶片表 面做成標記（Mark)，例如在第1圖中以「X」來表示，以 與判定爲良品之封裝區塊區分。 然而，用於區別不良品的標記，會在模注製程進行之 後，被用於保護晶片的封膠所覆蓋，導致在封裝完成後， 無法確實得知標記所在，進而無法辨識何者爲不良品。 因此本發明就是在提供一種可於封膠陣列中分辨不 良品之迷你球格陣列基板，其結構包括：一電路區與一周 邊區。其中電路區還包括數個排列呈一第一陣列之封裝區 塊。而周邊區則包括數個排列呈一第二陣列之檢測標籤， 其中，第二陣列與第一陣列之排列相同，且每一檢測標籤 相對應一相對位置相同之一封裝區塊。 本發明提供一種封膠陣列中不良品之辨識方法，此方 法簡述如下：首先提供一迷你球格陣列基板，此迷你球格 4 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 447064 5629twf.doc/008 A7 B7 五 經濟部智慧財產局員工消費合作社印製 發明説明㈠） 陣列基板具有一電路區與一周邊區，其中電路區還包括數 個呈第一陣列排列之封裝區塊，而於周邊區中具有數個呈 一第二陣列排列之檢測標籤。此外，第一陣列與第二陣列 之排列相同，且每一檢測標籤相對應一相對位置相同之一 封裝區塊。接著，分別對封裝區塊進行第一外觀測試步 驟’當發現一不良之封裝區塊時，於與不良封裝區塊相對 應之檢測標籤之一上做一標記。之後，提供複數個晶片， 繼之，分別電性連接每一晶片與每一封裝區塊。續之，分 別對封裝區塊進弟一外觀測試步驟，當發現一不良之 晶片與封裝區塊之電性連接時，於與不良電性連接相對應 之檢測標籤之一上做一標記。最後進行一封膠製程，以形 成覆蓋晶片與封裝區塊之封膠材料，而封膠並不覆蓋周邊 區，且可藉由檢測標籤辨識封裝區塊中的不良裝區塊與不 良電性連接的位置。 依照本發明的一較佳實施例，檢測標籤之材質例如是 金屬金，而封裝區塊之數目與檢測標籤之數目相等。 由於本發明所用於辨識不良品的檢測標籤陣列，可以 在形成電路區的同時’於迷你球格陣列基板之周邊形成， 而且檢測標鑛陣列可視爲封裝區塊的縮影，亦即是檢測標 籤陣列中的每一檢測標籤係與其相對應之封裝S塊的相 對位置相同，而且在封膠製程中不會被封膠覆蓋，因此， 在完成封膠製程之後’仍可從周邊區上的標示情形’輕易 辨識出模注陣列中的不良品。 再者，由於檢測標籤陣列係以活性較低的金屬金爲材 請 閲 意 事 項 再厂 f- 本 頁 裝 η ci 本紙張尺度適用中國國家標準（CNS ) A4規格（2Η)X297公瘦） Λ47 06 4 A7 B7 5629twf.doc/008 五、發明説明（4) 質製成，因此不易受到蝕刻侵害。此外檢測標籤陣列如同 封裝區塊陣列之縮影，因此具有標示簡單明瞭以及明顯淸 晰的優點’不必於每一迷你球格陣列封裝件出貨時，隨貨 附上不良品標示單據。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特舉一較佳實施例，並配合所附圖式，作詳 細說明如下： n 圖式之簡單說明： 弟1圖係繪不傳統迷你球格陣列式封裝所使用之基 板的上視示意圖； 第2圖係繪示依據本發明之較佳實施例之迷你球格 陣列基板的上視示意圖： 桌3圖係繪不第2圖中檢測標鑛210的放大示官圖. 以及 第4圖爲根據本發明之封膠陣列中之不良品之檢測 方法流程圖。 其中，各圖標號與構件名稱之關係如下： 100、200 :迷你球格陣列基板 102、202a :電路區 經濟部智慧財產局員工消費合作社印製 104、204 :封裝區塊 104a、204a :不良的封裝區塊 202b :周邊區 208 :焊罩層 210:檢測標籤陣列 210a:標示爲不良品的檢測標籤 6 本紙張尺度適用中國國家標率（CNS ) A4規格（210X297公釐） 經濟部智慧財產局員工消費合作社印製 147064 A7 5 629twf.doc/0〇^ 37 五、發明説明（（） 400:形成電路區之封裝區塊 402、408 :外觀測試 404、410 :於檢測標籤上標示出不良品 406 :晶片與封裝區塊電性連接 412 :封膠製程 實施例 第2圖係繪示依據本發明之較佳實施例之迷你球格陣 列基板的上視示意圖。 請參照第2圖，一迷你球格陣列基板200可區分爲電 路區202a與周邊區202b。此迷你球格陣列基板200譬如 是用樹脂片（Prepreg)製成，例如是以玻璃環氧基樹脂爲材 質之FR-4基板、以雙順丁烯二酸醯亞胺(Bismaleimide-Triazine, BT)樹脂爲材質之基板等。而於電路區202a中形 成有複數個陣列排列的封裝區塊204，此封裝區塊204係 用於經由焊墊分別與晶片電性連接。。 接著，在迷你球格陣列基板200上，形成有一層焊罩 層208，僅暴露出接點及標籤陣列210，作爲基板接點鍍 金時之隔離層，並用於保護基板上的線路區域，以免除線 路區域在封裝製程中氧化。此焊罩層208之形成方法包括 滾筒塗佈法（Roller Coating)、簾幕塗佈法（Curtain Coating)、網版印刷法（Screeil Priming)、浸染法(Dip)以及 乾膜(Dry Film)形成方法等。 此焊罩層208在封裝區塊204中裸露出於後續與外界 7 本紙張尺度適用中國國家;CNS ) A4規格_( 21〇χ 297公釐） (.請先閎讀背面之注意事項再填寫本頁)447064 A7 5629twf.doc / 008 gy V. Description of the Invention (I) The present invention relates to a substrate structure and identification method for identifying a defective unit in a semiconductor package, and more particularly to a method for identifying a substrate. Mini Ball Grid Array (Mini BGA) Mini Grid Array (Array Molding) can be used to distinguish defective mini ball grid array substrates and identification methods. Semiconductor chip packaging technology, in response to the trend of lighter, thinner and shorter electronic products, has been installed in the printed circuit board (Insertion Mount) package since the early 1980s. In a short period of more than ten years, it has progressed to high-density chip scale package (Chip Size Package or Chip Size Package, CSP) technology. Among them, with the development of Ultra-Fine-Pitch, the previous technology of using lead frames to complete chip packaging has failed to meet its requirements, and Ball Grid Array (BGA) Encapsulation shows a strong and powerful advantage, and has suddenly become the main packaging method. The consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs prints a so-called mini-ball grid array package, which is to form a plurality of arrayed package sites (Package Sites) on a substrate. After forming an electrical connection, and then protecting the chip with a molding compound, the chip can transmit signals with the outside world through contact pins arranged in an array manner on the packaging blocks. Figure 1 is a schematic top view of a substrate used in a conventional mini-ball grid array package. Please refer to Figure 1. For the general mini ball grid array package, the Chinese national standard (CNS > A4 size (210X297 mm)) is applied to the 3 ¥ paper size first. 447064 A7 5629twf.doc / 0 08 gy 5. [Explanation of Invention]-A plurality of arrayed packaging blocks 104 are formed in the circuit area 102 of the mini ball grid array substrate 100. Next, a plurality of chips are electrically connected to each of the packaging blocks 104, and then, Then, injection molding is performed to protect the chip with the sealant. After that, each package block 104 is cut and separated to complete the mini ball grid array. The packaging process is performed. Among them, the package block 104 is formed in the mini ball grid array substrate 100. After that, and after the plurality of chips are electrically connected to each of the packaging blocks 104, the appearance inspection of each of the packaging blocks 104 is usually performed to determine whether the electrical connection between the packaging blocks 104 and the chip is good, and at the same time, , Marks will be made on the package block 104a and the wafer surface that are judged to be defective, for example, "X" is shown in the first figure, and Packaging block differentiation. However, the mark used to distinguish defective products will be covered by the sealant used to protect the wafer after the injection molding process is performed, so that after the packaging is completed, it is impossible to know exactly where the mark is, and thus cannot be identified. Which is a defective product. Therefore, the present invention is to provide a mini ball grid array substrate capable of distinguishing defective products in a sealant array. The structure includes a circuit area and a peripheral area. The circuit area also includes a plurality of arrays arranged in a first order. An array of packaging blocks, and the peripheral area includes a plurality of detection tags arranged in a second array, wherein the second array is the same as the first array, and each detection tag corresponds to one of the same relative positions. Package block. The present invention provides a method for identifying defective products in a sealant array. The method is briefly described as follows: First, a mini ball grid array substrate is provided. The mini ball grid 4 is a paper size that is applicable to China National Standard (CNS) A4 specifications. (210X297 mm) 447064 5629twf.doc / 008 A7 B7 Five printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, the Consumers' Cooperatives printed invention notes㈠) Array A circuit board having a region and a peripheral region, wherein the circuit further comprises a plurality of package regions were arranged in blocks of a first array, and having a second plurality of array detection tag was arranged in the peripheral region. In addition, the arrangement of the first array is the same as that of the second array, and each detection tag corresponds to a packaging block with the same relative position. Next, the first appearance test step is performed on each of the packaging blocks'. When a defective packaging block is found, a mark is made on one of the detection labels corresponding to the defective packaging block. After that, a plurality of chips are provided, and then, each chip and each package block are electrically connected separately. Continuing, each of the packaging blocks is subjected to an appearance test step. When a bad electrical connection between the chip and the packaging block is found, a mark is made on one of the detection tags corresponding to the bad electrical connection. Finally, a glue process is performed to form a sealant material covering the chip and the packaging block, and the sealant does not cover the peripheral area, and the badly mounted block and the bad electrical connection in the packaged block can be identified by detecting the label. s position. According to a preferred embodiment of the present invention, the material of the detection tag is, for example, metal gold, and the number of packaging blocks is equal to the number of detection tags. Because the detection label array used for identifying defective products in the present invention can be formed 'on the periphery of the mini ball grid array substrate while forming the circuit area, and the detection target array can be regarded as a miniature of the packaging block, that is, the detection label array Each detection tag in the package is in the same relative position with its corresponding package S block, and it will not be covered by the sealant during the sealant process. Therefore, after the sealant process is completed, it can still be marked from the surrounding area. 'Easily identify defective products in the injection array. In addition, since the detection tag array is made of metal with a lower activity, please read the notes. F- This page is installed η ci This paper size is applicable to China National Standard (CNS) A4 size (2Η) X297 male thin Λ47 06 4 A7 B7 5629twf.doc / 008 5. Description of the invention (4) Made of high quality, so it is not easy to be attacked by etching. In addition, the inspection label array is like a miniature of a packaged block array, so it has the advantages of simple and clear labeling and obvious clarity. It is not necessary to attach a defective product identification document with each mini ball grid array package when it is shipped. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is described below in detail with the accompanying drawings as follows: n Brief description of the drawings: Brother 1 Figure 2 is a schematic top view of a substrate used in a conventional mini ball grid array package; Figure 2 is a schematic top view of a mini ball grid array substrate according to a preferred embodiment of the present invention: Table 3 is a drawing Fig. 2 is a magnified image showing the detection of the target ore 210. Fig. 4 is a flowchart of a method for detecting a defective product in a sealant array according to the present invention. Among them, the relationship between each icon number and component name is as follows: 100, 200: Miniature ball grid array substrate 102, 202a: Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Circuits, 104, 204: Packaging blocks 104a, 204a: Bad Package block 202b: Peripheral area 208: Solder mask layer 210: Detection label array 210a: Detection label marked as defective 6 This paper size applies to China National Standards (CNS) A4 specification (210X297 mm) Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the employee consumer cooperative 147064 A7 5 629twf.doc / 0〇 ^ 37 V. Description of the invention (() 400: Packaging blocks forming the circuit area 402, 408: Appearance test 404, 410: Marking defective products on the inspection label 406: The chip and the package block are electrically connected. 412: The embodiment of the sealing process. Figure 2 is a schematic top view of a mini ball grid array substrate according to a preferred embodiment of the present invention. Please refer to Figure 2, a mini The ball grid array substrate 200 can be divided into a circuit area 202a and a peripheral area 202b. The mini ball grid array substrate 200 is, for example, made of a resin sheet (Prepreg), for example, a FR-4 base material made of glass epoxy resin. , Substrates made of bismaleimide-triazine (BT) resin, etc., and a plurality of arrayed packaging blocks 204 are formed in the circuit area 202a, and this packaging block 204 is used The wafers are electrically connected to the wafers via solder pads. Then, a solder mask layer 208 is formed on the mini ball grid array substrate 200, and only the contacts and the label array 210 are exposed as an isolation layer when the substrate contacts are plated with gold. And used to protect the circuit area on the substrate to prevent the circuit area from being oxidized during the packaging process. The formation method of the solder mask layer 208 includes a roll coating method, a curtain coating method, and a screen plate. Printing method (Screeil Priming), dip method (Dip) and dry film (Dry Film) forming method, etc. This solder mask layer 208 is exposed to the outside and the outside in the encapsulation block 204. This paper size is applicable to China; CNS) A4 specifications_ (21〇χ 297 mm) (. Please read the precautions on the back before filling in this page)
447064 A7 5629twf.doc/008 β? 五、發明説明（乙） 電性連接之焊墊(未繪示）。而於周邊區202b上，則有與封 裝區塊2(M陣列排列相同的檢測標籤陣列210裸露出焊罩 層208之外。其中檢測標籤陣列210中的標籤數目與封裝 區塊204之數目，且檢測標籤陣列210之每一檢測標籤係 相對應於與其相對位置相同之每一封裝區塊204。 此與封裝區塊204陣列排列相同的檢測標籤210之形 成方法，可以是在形成迷你球格陣列基板200之表層電路 區202a時，同時於迷你球格陣列基板200之周邊區202b 上定義形成，並於焊罩層208形成時，裸露出焊罩層208 之外。而檢測標籤210之材質例如是活性較低的材質，較 佳的包括金屬金。 第3圖係繪示第2圖中檢測標籤210的放大示意圖。 第4圖爲根據本發明之封膠陣列中之不良品之檢測方法流 程圖。 經濟部智葸財產局員工消費合作社印製 請參照第3圖與第4圖，在形成封裝區塊204之後(第 4圓中之步驟400)以及將晶片與封裝區塊電性連接(第4圖 中之步驟4〇6)之後，當封裝區塊204中之一封裝區塊 2〇4a，經由外觀檢測(第4圖中之步驟402與408)之後，發 現爲不良品（包括封裝區塊之線路不正常，或是封裝區塊與 晶片電性連接不正確），則可在周邊區2〇2b上的;fe測標籤 210中’與封裝區塊204a相同相對位置的檢測標籤210a 上，做出標記（第4圖中之步驟4〇4與410)，例如是以油性 筆勾出。之後再進行封膠製程412。 由於迷你球格陣列基板200在與晶片完成電性連接之 8 本紙張尺度適用中國國家襟率（CNS ) A4規格（210X297公釐） 447064 A7 5629twf.doc/008 __ B7 五、發明説明（1) 後’其所進行之封膠製程（encapsulation process)，只會將 封膠材料（未繪示）形成於封裝區塊204之上，而周邊區 202b上所形成用來代表各個封裝區塊204檢測標籤陣列 210’並不會被封膠所覆蓋，因此，在封膠製程進行之前， .被標示爲不良品的檢測標籤210a，不會被封膠所覆蓋，因 此不良品在模注製程之後仍可輕易辨識。 本發明係在迷你球格陣列基板之未形成陣列封裝區 塊之周邊區上，形成與封裝區塊排列相同之檢測標籤陣列 210，所以當陣列封裝區塊或是晶片與封裝區塊之電性連 接經檢視而發現爲不良品時，可在周邊區上之相對的標籤 做上記號，進而在封膠製程之後，得以辨識封膠陣列中的 不良品。 由於本發明所用於辨識不良品的檢測標籤陣列，可以 在形成電路區的同時，於迷你球格陣列基板之周邊形成， 並且裸露於焊罩層之外，而且檢測標籤陣列可視爲封裝區 塊的縮影，亦即是檢測標籤陣列中的每一檢測標籤係與其 相對應之封裝區塊的相對位置相同，而且在封膠製程中不 會被封膠覆蓋，因此，在完成封膠製程之後，仍可從周邊 區上的標示情形，輕易辨識出模注陣列中的不良品。再 者，困於檢測標籤陣列係以活性較低的金屬金爲材質製 成，因此不易受到蝕刻侵害。此外檢測標籤陣列如同封裝 區塊陣列之縮影，因此具有標示簡單明瞭以及明顯淸晰的 優點，不必於每一迷你球格陣列封裝件出貨時，隨貨附上 不良品標示單據。 9 本紙張尺度適用中國國家榇準（CNS ) A4规格（210X297公釐） (請先閲讀背面之注意事頃再f:馬本頁) .，裝- 經濟部智慧財產局員工消费合作社印製 447064 A7 5629twf,doc/008 五、發明説明（？） 雖然本發明已以一較佳實施例揭露如上，然其並非用 以限定本發明，任何熟習此技藝者，在不脫離本發明之精 神和範圍內，當可作各種之更動與潤飾，因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 (請先閱讀背面之注意事項再於寫本頁) :裝· 訂 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐）447064 A7 5629twf.doc / 008 β? 5. Description of the invention (B) Pads for electrical connection (not shown). On the peripheral area 202b, there are detection tag arrays 210 that are the same as the package block 2 (M array arrangement) and exposed outside the solder mask layer 208. The number of tags in the detection tag array 210 and the number of the package blocks 204, And each detection tag of the detection tag array 210 corresponds to each packaging block 204 with the same relative position. This method of forming the detection tags 210 with the same array arrangement of the packaging blocks 204 may be forming a mini ball grid. When the surface circuit area 202a of the array substrate 200 is defined and formed on the peripheral area 202b of the mini ball grid array substrate 200 at the same time, when the solder mask layer 208 is formed, the solder mask layer 208 is exposed. The material of the detection label 210 For example, it is a material with low activity, and preferably includes metal gold. Figure 3 is an enlarged schematic diagram showing the detection label 210 in Figure 2. Figure 4 is a method for detecting defective products in the sealant array according to the present invention. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, please refer to Figures 3 and 4, after forming the packaging block 204 (step 400 in the fourth circle), After connection (step 406 in Fig. 4), one of the package blocks 204a in the encapsulation block 204 was found to be defective after appearance inspection (steps 402 and 408 in Fig. 4) ( The circuit including the package block is abnormal, or the package block and the chip are electrically connected incorrectly), then it can be detected in the peripheral area 202b; the same relative position of the package test block 210 and the package block 204a On the label 210a, make a mark (steps 404 and 410 in FIG. 4), for example, using an oil-based pen. After that, the sealing process 412 is performed. Because the mini-ball grid array substrate 200 is electrically connected to the wafer, Connected 8 This paper size is applicable to China National Standard (CNS) A4 specification (210X297 mm) 447064 A7 5629twf.doc / 008 __ B7 V. Description of the invention (1) 'The encapsulation process performed by it , Only the sealing material (not shown) is formed on the packaging block 204, and the detection label array 210 'formed on the peripheral region 202b to represent each packaging block 204 is not covered by the sealing compound, Therefore,. Is marked as not before the sealing process. The good product detection label 210a will not be covered by the sealant, so the bad product can be easily identified after the molding process. The present invention is formed on the peripheral area of the mini ball grid array substrate where the array packaging block is not formed. The packaged blocks are arranged in the same detection tag array 210, so when the arrayed packaged block or the electrical connection between the chip and the packaged block is inspected and found to be defective, the relative labels on the peripheral area can be marked. After the sealing process, defective products in the sealing array can be identified. Since the detection label array used for identifying defective products in the present invention can be formed on the periphery of the mini ball grid array substrate while forming the circuit area, and exposed outside the solder mask layer, the detection label array can be regarded as a package block. Miniature, that is, each detection label in the detection label array is at the same relative position as its corresponding packaging block, and will not be covered by the sealing compound during the sealing process. Therefore, after the sealing process is completed, Defects in the injection array can be easily identified from the markings on the peripheral area. Furthermore, the detection tag array is made of metallic gold, which is a less active material, and is therefore less vulnerable to etching. In addition, the inspection label array is the epitome of a packaged block array, so it has the advantages of simple and clear labeling and obvious clarity. It is not necessary to attach a defective product identification document with each shipment when each mini ball grid array package is shipped. 9 This paper size applies to China National Standards (CNS) A4 (210X297 mm) (please read the notes on the back before f: page). Packing-Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 447064 A7 5629twf, doc / 008 V. Description of the Invention (?) Although the present invention has been disclosed above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art will not depart from the spirit and scope of the present invention. In addition, various modifications and retouching can be made, so the protection scope of the present invention shall be determined by the scope of the appended patent application. (Please read the precautions on the back before writing this page): Binding and printing. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. The paper size applies to the Chinese National Standard (CNS) A4 specification (210X297 mm).