441002 5340twf.doc/006 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（/) 本發明是有關於一種半導體元件的製造方法，且特別 是有關於〜種金屬內連線的製造方法。 隨著積體電路元件的高度積集化，元件的尺寸逐漸縮 小，其所需的金屬內連線數目也隨之而增加。然而，尺寸 .的縮小以及金屬內連線數目的增加，將使得製程的困難度 增加’特別是在提供良率佳以及可靠度好的金屬內連線製 程上。因此，如何使超大型積體電路的內連線，在極小的 接觸面積下’仍具有良好的導電性質與操作效能，是目前 半導體工業所積極努力的方向。 對半導體元件後段（backend)製程而言，隨著金屬線寬 的曰漸縮小，金屬線所承受之電流密度（current density)， 相對地逐漸增大，使得傳統以鋁金屬爲主所形成之金屬 線，遭受到電遷移（electron migration，EM)效應的影響，進 而導致元件之可靠度（reliability)降低。 爲解決上述半導體元件進入深次微米（sub-quarter micron)製程時所遭遇之課題，使用電遷移效應極小之銅金 屬，就成了所有半導體元件製造者一致的選擇。銅金屬由 於其本身具有低電阻率、高抗電遷移性以及可以以化學氣 相沈積與電鍍方式成長的優點，因此在深次微米元件其多 層金屬連線的運用上備受矚目。 然而，銅金屬本身具有不易被一般蝕刻氣體所蝕刻的 特性，因此銅金屬導線的製作，就不能再以傳統之製造方 法來完成。針對此課題，一種雙重金屬鑲嵌的製程於是被 提出。 3 i^i^n ^^1 (請先閲讀背面之注意事項再填寫本頁) ，τ 本紙張尺度遑用中國國家樣牟（CNS > Α4規格（210X297公釐） 5340twf.doc/006 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（A ) 第丨A圖至第1C圖爲習知一種雙重金屬鑲嵌的製造流 程剖面示意圖。 首先，請參照第1A圖，形成一介電層104覆蓋基底 100，此基底100中已形成有一銅金屬導線102，而且此銅 金屬導線102的表面102a是裸露於外的。其中，介電層1〇4 的形成方法比如依序在基底100上形成一氧化矽層、一氮 化矽層和一氧化矽層。其中，氧化矽層與氮化矽層具有不 同之蝕刻率。而在一般的雙重金屬鑲嵌製程中，於介電層 104形成之前可包括在基底100上先形成一層氮化矽層，以 防止銅原子擴散至介電層104中，而造成元件失效或是金 屬連線間不當之橋接。 請參照第1B圖，接著在介電層104中形成雙重金屬 鑲嵌開口的溝渠106與接觸窗開口 110，且接觸窗開口 110 位於溝渠106的下方。 而形成雙重金屬鑲嵌開口的典型方法係在介電層104 上先形成一層光阻層（未繪示於圖），用以定義溝渠所需的 圖案。然後，以此光阻層爲蝕刻罩幕，介電層104中的氮 化矽層爲蝕刻終止層，利用微影蝕刻技術，鈾刻介電層 104，以在此介電層104中形成一溝渠106。 之後，去除上述光阻層，再於介電層104上形成另--層具有開口圖案的光阻層108,此開口即爲預定形成之接 觸窗開口所在的位置，其對應於銅金屬導線102的上方。 接著，進行一蝕刻程序，以將開口的圖案轉移，形成穿透 介電層104且裸露出銅金屬導線102之表面102a的接觸窗 4 (請先閱讀背面之注意事項再填寫本頁)441002 5340twf.doc / 006 A7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the Invention (/) The present invention relates to a method for manufacturing a semiconductor element, and in particular, to the manufacture of ~ metal interconnects method. With the integration of integrated circuit components, the size of the components has gradually decreased, and the number of metal interconnects required has also increased. However, the reduction in size and the increase in the number of metal interconnects will increase the difficulty of the process, especially in the process of providing metal interconnects with good yields and reliability. Therefore, how to make the internal wiring of a very large integrated circuit have good conductive properties and operating efficiency under a very small contact area is the current active direction of the semiconductor industry. For the backend process of semiconductor devices, as the width of the metal line is gradually reduced, the current density of the metal line is gradually increased, which makes the traditional metal formed mainly of aluminum metal. Line, subject to the effects of electromigration (EM) effects, which in turn reduces the reliability of the device. In order to solve the above-mentioned problems encountered when semiconductor devices enter the sub-quarter micron process, the use of copper metal with minimal electromigration effect has become a consistent choice for all semiconductor device manufacturers. Copper metal has attracted much attention in the application of multi-layer metal connections for deep sub-micron devices due to its advantages of low resistivity, high resistance to electromigration, and chemical vapor deposition and electroplating. However, copper metal itself is not easily etched by general etching gas, so the production of copper metal wires cannot be completed by the traditional manufacturing method. To solve this problem, a dual metal inlaying process was proposed. 3 i ^ i ^ n ^^ 1 (Please read the notes on the back before filling in this page), τ This paper size uses the Chinese national sample (CNS > Α4 size (210X297mm) 5340twf.doc / 006 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the Invention (A) Figures 丨 A to 1C are schematic cross-sectional diagrams of the manufacturing process of a conventional double metal inlay. First, please refer to Figure 1A to form an introduction. The electrical layer 104 covers the substrate 100. A copper metal wire 102 has been formed in the substrate 100, and the surface 102a of the copper metal wire 102 is exposed. The dielectric layer 104 may be formed on the substrate in order. A silicon oxide layer, a silicon nitride layer, and a silicon oxide layer are formed on 100. Among them, the silicon oxide layer and the silicon nitride layer have different etch rates. In a general dual metal damascene process, the dielectric layer 104 Before forming, it may include forming a silicon nitride layer on the substrate 100 to prevent copper atoms from diffusing into the dielectric layer 104, which may cause component failure or improper bridging between metal connections. Please refer to FIG. 1B, and then Double layers are formed in the dielectric layer 104 The trench 106 of the metal mosaic opening and the contact window opening 110 are located below the trench 106. A typical method of forming a dual metal mosaic opening is to first form a photoresist layer on the dielectric layer 104 (not shown in FIG. Figure), used to define the required pattern of the trench. Then, the photoresist layer is used as the etching mask, the silicon nitride layer in the dielectric layer 104 is used as the etching stop layer, and the lithography is used to etch the dielectric layer. 104 to form a trench 106 in the dielectric layer 104. Then, the photoresist layer is removed, and another layer of photoresist layer 108 having an opening pattern is formed on the dielectric layer 104, and this opening is intended to be formed The position of the contact window opening corresponds to the position above the copper metal wire 102. Next, an etching process is performed to transfer the pattern of the opening to form a layer 102 that penetrates the dielectric layer 104 and exposes the surface 102a of the copper metal wire 102. Contact window 4 (Please read the precautions on the back before filling this page)
T β % 本紙張尺度逍用中國國家標準（CNS ) A4规格（210X297公釐) 441002 5340twf.doc/006 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（2) 開口 110。 請參照第1C圖，接著進行光阻層丨08的去除步驟， 其係利用氧電漿灰化(ashing)的方式，於高溫且〇2流速約爲 2000-3000 seem的條件下去除光阻層108。其原理在於利用 氧電漿氧化含C、Η、N、◦等有機成分之光阻層1以 將光阻層108形成氣態的C〇2，H2〇與Να，再藉由幫浦予 以抽走。其中’製程中的尚濫將有助於提高光阻層氧化的 速率，進而加速光阻層的去除。 目前應用於雙重金屬鑲嵌製程中，去除光阻層的灰化 反應室（ashing chamber)溫度一般爲250度。然而，在此高 溫下，接觸窗開口 110所裸露出的銅金屬導線102之表面 102a會遭受到氧電漿的破壞，致使銅金屬導線102表面 l〇2a的銅會與氧電漿反應而氧化生成鬆散之氧化銅（CiuO 或CuO〇,導致多重金屬連線的導電性降低以及阻値增加的 問題發生。 雖然此種如氧化銅之金屬氧化物可溶於一般鹼性溶 劑(base solvent)而被去除，但此舉會造成接觸窗開口 110 所裸露出的銅金屬導線102表面102a形成孔洞112(void)， 如第1C圖所示。而此孔洞112將會造成後續所形成之阻障 層(bard打layer)與植種層（seed Layer)不能平整地共形覆蓋 溝渠106與接觸窗開口 110’致使植種層於後續高溫回火製 程中，容易因表張力的緣故而斷線（contact open)，進而使 得後續電鏟銅或無電鍍銅製程中，在未被植種層覆蓋之處 不會形成銅金屬，導致雙重金屬鑲嵌開口中的銅金屬層不 5 本紙張尺度逍用中國國家標率（匚阳>入4規格（21〇><297公*) ----：-------装------訂------線 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 4 41 0 0 2 5340twf.doc/006 β7 五、發明説明（分） 能均勻地生成，致使多重金屬連線的阻値升高。 有鑑於此，本發明提出一種雙重金屬鑲嵌的製造方 法，其作法係在具有銅金屬導線之基底上形成一層介電 層。之後，於介電層中形成接觸窗開口以及溝渠以暴露出 銅金屬導線之表面，且此接觸窗開口位於溝渠的下方。然 後，利用低溫且以Ν2Η2(Η2:4%)/〇2爲氣體源之混合電漿來進 行光阻層的去除。接著，再配合以Ν2Η2(Η2:4%)爲氣體源， 將因氧電漿與金屬銅氧化生成的氧化銅還原成金屬銅。之 後，形成一阻障層共形地覆蓋此溝渠與接觸窗開口。接著， 再於基底上沈積一層第一銅金屬層，使其平整且共形地覆 蓋溝渠與接觸窗開口。續利用此第一銅金屬層做爲植種 層，進行一電鍍銅或無電鍍銅製程，以形成一塡滿溝渠與 接觸窗開口之第二銅金屬層。 依照本發明所提出之一種雙重金屬鑲嵌的製造方 法，其係利用低溫且以Ν2Η2(Η2:4%)/02爲氣體源之混合電漿 來進行光阻層的去除，以減低裸露之金屬銅導線因氧電漿 而氧化生成氧化銅的情況發生。 依照本發明所提出之一種雙重金屬鑲嵌的製造方 法，其在光阻層剝除之後，再配合以Ν2Η2(Η2:4%)爲氣體源 將氧化銅還原成金屬銅，而避免多重金屬連線的阻値增加 的問題發生。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特舉一較佳實施例，並配合所附圖式，作詳 細說明如下： 6 本紙張尺度適用中國®家標準（CMS > Α4規格（2Ι0Χ 297公釐） 1--------Η------------線 (請先閱讀背面之注意事項再填寫本頁) 4 410 0 2 A7 5340twf-.doc/006_^ 五、發明説明（Γ ) 圖式之簡單說明： 第1A圖至第1C圖爲習知一種雙重金屬鑲嵌的製造流 程剖面示意圖； 第2A圖至第2D圖爲依照本發明之一較佳實施例，一 種雙重金屬鑲嵌的製造流程剖面示意圖； 第3A圖與第3B圖所繪示的分別是銅金屬導線在利用 習知之高溫氧電漿灰化的方式去除光阻層且配合溶劑淸洗 前後的比較圖； 第4A圖與第4B圖所繪示的分別是銅金屬導線在依照 本發明之一較佳實施例，利用低溫之N2H2 (H2:4%)/〇2混合 電漿灰化光阻層，再配合以N2H2(H2:4%)爲氣體源還原金屬 氧化物且經過溶劑淸洗步驟前後的比較圖；以及 第5圖所繪示的是另一種形成雙重金屬鑲嵌的剖面 示意圖。 圖式標記說明·_ 100、200 :基底 102、202 :銅金屬導線 102a、202a *銅金屬導線表面 104、204 :介電層 106、206 :溝渠 108、208、209 :光阻層 110、210 :接觸窗開口 112 :孔洞 211 :雙重金屬鑲嵌開口 7 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ---..-------β---i--IT------$ (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 44 彳 002 5340twf.doc/006 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（匕） 2)2 :阻障層 214 :第一銅金屬層 216 :第二銅金屬層 實施例 第2A圖至第2D圖爲依照本發明之一較佳實施例，一 種雙重金屬鑲嵌的製造流程剖面示意圖。首先，請參照第 2A圖，形成一層介電層204覆蓋一已形成有銅金屬導線202 之基底200，且此銅金屬導線202的表面202a是裸露於外 的。其中，介電層204的形成方法比如是依序在基底200 上形成一氧化矽層、一氮化矽層和一氧化矽層，其中氧化 矽層與氮化矽層具有不同之蝕刻率。此外，在本實施例中’ 於介電層204形成之前可包括在基底200上形成一做爲擴 散阻擋層之氮化矽層，以防止銅原子擴散至介電層204 中，而造成元件失效或是金屬連線間不當之橋接。接著， 平坦化此介電層204。 請參照第2B圖，接著在介電層204中形成雙重金屬 鑲嵌開口 211的溝渠206與接觸窗開口 210,且此接觸窗開 口 210位於溝渠206的下方。 形成雙重金屬鑲嵌開口 211的典型方法係在介電層 204上先形成一層光阻層(未繪示於圖），用以定義溝渠所需 的圖案。然後，以此光阻層爲蝕刻罩幕，介電層204中的 氮化矽層爲蝕刻終止層，利用微影蝕刻技術，蝕刻介電層 204，以在此介電層204中形成一溝渠206。 8 <#先閲讀背面之注意事項再填寫本頁) - 本紙乐尺度適用中國國家棣準（CNS >A4規格（210X297公釐） A7 B7 441 002 5340twf.doc/006 五、發明説明（7) 之後，去除上述光阻層’再於介電層204上形成另一 層具有開口圖案的光阻層208，此開口即爲預定形成接觸 窗開口所在的位置’其對應於銅金屬導線202的上方°接 著，進行一蝕刻程序，以將開口的圖案轉移，形成穿透介 電層204且暴露出銅金屬導線202之表面202a的接觸窗開 □ 210 = 上述雙重金屬鑲嵌開口 211的形成方式係爲本發明一 較佳實施例，其亦可先形成接觸窗開口再形成溝渠(如第5 圖所示），即先在介電層204中形成接觸窗開口 210 ’再於 介電層204上形成光阻層209,以在介電層204中形成溝渠 2〇6，其中溝渠206與接觸窗開口 210共組成雙重金屬鑲嵌 開口 211，或者介電層只是單純的氧化矽層甚至是具有低 介電常數之介電層時，此溝渠之形成方法’可以時間模式 (Hme mode)來控制其深度。此外，金屬鑲嵌開口的形成方 式亦適用於本發明。 請參照第2C圖，接著進行去除光阻層208的步驟。 此步驟係以流速分別約爲100-300 seem的N2H2與約200-600 seem的α爲氣體源，在溫度約爲30-90度、壓力約200-600mT' 工作功率（source power)約 800-1300 瓦（2.54GHz)與 RF功率約100-400瓦（13.56MHz)的條件下利用 (H2:4%)/Ch之混合電槳以低溫灰化（ashing)的方式進行光阻 層208的去除。 雖然本發明利用低溫且以N2：Hh(H2:4%)/〇2爲氣體源之 混合電漿去除光阻層208可以有效地降低裸露之金屬銅因 9 本紙張尺度適用中國國家標準（CNS > A4規格（210X297公釐） ----^-------β---„-----ΐτ------.^ (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 A7 B7 Λ 41 0 0 2 5340twf.doc/006 五、發明説明（》） 氧電漿而氧化生成氧化銅的情況發生。但是，由於所裸露 出的銅金屬導線202之表面202a仍會遭受到氧電漿的破 壞，而與氧電漿反應生成鬆散之氧化銅’導致多重金屬連 線的阻値仍稍受影響。所以在本發明中，於形成雙重金屬 鑲嵌開ΓΙ 21 1與去除光阻層2〇8之後，則利用爲氣體 .源，還原銅金屬導線202表面202a的氧化銅’以回復銅金 屬導線202的表面202a，使其保持平整。而此步驟係以流 速約100-300 seem的NiHXHd%)爲氣體源，在溫度約爲 30-90度、壓力約200-60〇mT、工作功率約800-1300瓦 (2.54GHz)與RF功率約100-400瓦（13.56MHz)的條件下將氧 化銅還原成金屬銅，如此便可避免多重金屬連線阻値增加 的問題發生。 在本實施例中，於氧化銅還原之後，更包括一溶劑淸 洗步驟。 接著，在去除光阻層208之後’於基底200上先形成 一層共形的阻障層212,以覆蓋介電層204之上表面以及雙 重金屬鑲嵌開口 211之溝渠206與接觸窗開口 210。其中， 此阻障層212之材質爲可以防止後續銅金屬層之銅原子擴 散至介電層204者，故較佳的阻障層212例如是由化學氣 相沈積法所形成之氮化钽，因爲氮化鉅的抗擴散能力高， 其可防止銅原子擴散至介電層204中。 繼之，在基底200上形成一層共形的第一銅金屬層 214，以覆蓋於介電層204之上表面，以及溝渠206與接觸 窗開口 210。其中，第一銅金屬層214做爲植種層之用，以 本紙張尺度適用中國國家橾準（CNS ) A4規格（210X297公釐） ----:-------!i衣------IT------0 (請先閱讀背面之注項再填寫本頁} 經濟部智慧財產局員工消費合作社印製 A7 B7 441 002 5340twf.doc/006 五、發明説明（7) 供後續銅金屬層的生成。而第一銅金屬層214的形成方法 譬如是使用物理氣相沉積法或化學氣相沉積法。T β% This paper size is in accordance with Chinese National Standard (CNS) A4 specification (210X297 mm) 441002 5340twf.doc / 006 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (2) Opening 110. Please refer to FIG. 1C, and then perform the photoresist layer removal step 08, which uses an oxygen plasma ashing method to remove the photoresist layer at a high temperature and a flow rate of about 2000-3000 seem. 108. The principle is to use an oxygen plasma to oxidize the photoresist layer 1 containing organic components such as C, ytterbium, N, and ◦ to form the photoresist layer 108 into gaseous C02, H20, and Nα, and then pump it away by the pump. . Among them, the excess in the process will help increase the rate of photoresist layer oxidation, and then accelerate the removal of the photoresist layer. At present, the temperature of the ashing reaction chamber (ashing chamber) for removing the photoresist layer is generally 250 degrees in the double metal damascene process. However, at this high temperature, the surface 102a of the copper metal wire 102 exposed by the contact window opening 110 will be damaged by the oxygen plasma, so that the copper of the surface 102a of the copper metal wire 102 will react with the oxygen plasma to oxidize. The formation of loose copper oxide (CiuO or CuO0) causes problems such as reduced conductivity and increased resistance of multi-metal connections. Although such metal oxides as copper oxide are soluble in general base solvents, It is removed, but this will cause a hole 112 (void) to be formed on the surface 102a of the copper metal wire 102 exposed by the contact window opening 110, as shown in FIG. 1C. The hole 112 will cause a subsequent barrier layer to be formed. The bard layer and the seed layer cannot cover the trench 106 and the contact window opening 110 'flatly and conformally. As a result, the seed layer is easily disconnected due to surface tension during the subsequent high temperature tempering process. open), so that in the subsequent process of electric shovel copper or electroless copper, copper metal will not be formed where it is not covered by the seed layer, resulting in the copper metal layer in the double metal inlaid opening not being used in China. Home standard rate (Liyang > into 4 specifications (21〇 > < 297) *) ----: ------------------------- Order Please read the notes on the back before filling in this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 4 41 0 0 2 5340twf.doc / 006 β7 5. Description of the invention (min) Can be uniformly generated, resulting in multiple metal connections In view of this, the present invention proposes a method for manufacturing a dual metal damascene, which comprises forming a dielectric layer on a substrate having a copper metal wire. Then, a contact window opening is formed in the dielectric layer and The trench is to expose the surface of the copper metal wire, and the contact window opening is located below the trench. Then, the photoresist layer is removed by using a low temperature mixed plasma with N2Ν2 (Η2: 4%) / 〇2 as the gas source. . Then, using N2Η2 (Η2: 4%) as a gas source, the copper oxide generated by the oxidation of oxygen plasma and metal copper is reduced to metal copper. After that, a barrier layer is formed to cover this trench and contact conformally. Window opening. Next, a first copper metal layer is deposited on the substrate to cover it flat and conformally Channels and contact window openings. Using this first copper metal layer as a seed layer, a copper plating or electroless copper plating process is performed to form a second copper metal layer that fills the trench and the contact window openings. The proposed manufacturing method of a double metal inlay uses a low-temperature and mixed plasma with N2Η2 (Η2: 4%) / 02 as a gas source to remove the photoresist layer, so as to reduce the exposed metal copper wires from oxygen. Occurrence of oxidization by plasma to generate copper oxide. According to a manufacturing method of double metal inlay proposed by the present invention, after the photoresist layer is stripped off, the copper oxide is combined with N2Η2 (Η2: 4%) as a gas source. Reduction to metallic copper avoids the problem of increased resistance of multi-metal connections. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings to make a detailed description as follows: 6 This paper standard applies to China® home standards (CMS > Α4 specification (2Ι0χ 297 mm) 1 -------- Η ------------ line (please read the precautions on the back before filling this page) 4 410 0 2 A7 5340twf-.doc / 006_ ^ V. Brief description of the invention (Γ) diagrams: Figures 1A to 1C are schematic cross-sectional views showing the manufacturing process of a conventional double metal inlay; Figures 2A to 2D In accordance with a preferred embodiment of the present invention, a cross-sectional schematic diagram of a manufacturing process of a dual metal inlay; FIG. 3A and FIG. 3B respectively illustrate the removal of copper metal wires by a conventional high-temperature oxygen plasma ashing method. Comparison of photoresist layer before and after cleaning with solvent; Figures 4A and 4B show the copper metal wire in accordance with a preferred embodiment of the present invention, using low temperature N2H2 (H2: 4%) / 〇2 mixed plasma ashing photoresist layer, and then using N2H2 (H2: 4%) as a gas source to reduce metal oxides Comparison diagram before and after the solvent washing step; and Fig. 5 shows another cross-sectional schematic diagram of forming a double metal damascene. Symbol description · 100, 200: substrate 102, 202: copper metal wires 102a, 202a * Copper metal wire surfaces 104, 204: dielectric layers 106, 206: trenches 108, 208, 209: photoresist layers 110, 210: contact window openings 112: holes 211: double metal inlaid openings 7 This paper size applies to Chinese national standards (CNS) A4 specification (210X297 mm) ---..------- β --- i--IT ------ $ (Please read the precautions on the back before filling this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 44 彳 002 5340twf.doc / 006 A7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (dagger) 2) 2: Barrier layer 214: First copper metal Layer 216: Second copper metal layer embodiment FIGS. 2A to 2D are schematic cross-sectional views illustrating a manufacturing process of a dual metal damascene according to a preferred embodiment of the present invention. First, referring to FIG. 2A, a dielectric layer 204 is formed to cover a substrate 200 on which a copper metal wire 202 has been formed, and a surface 202a of the copper metal wire 202 is exposed. The method for forming the dielectric layer 204 is, for example, sequentially forming a silicon oxide layer, a silicon nitride layer, and a silicon oxide layer on the substrate 200. The silicon oxide layer and the silicon nitride layer have different etch rates. In addition, in the present embodiment, before the formation of the dielectric layer 204, a silicon nitride layer as a diffusion barrier layer may be formed on the substrate 200 to prevent copper atoms from diffusing into the dielectric layer 204 and cause the device to fail. Or improper bridging between metal connections. Then, the dielectric layer 204 is planarized. Referring to FIG. 2B, a trench 206 and a contact window opening 210 of a double metal mosaic opening 211 are formed in the dielectric layer 204, and the contact window opening 210 is located below the trench 206. A typical method of forming the dual metal damascene opening 211 is to first form a photoresist layer (not shown) on the dielectric layer 204 to define the desired pattern of the trench. Then, the photoresist layer is used as an etching mask, and the silicon nitride layer in the dielectric layer 204 is used as an etch stop layer. The lithography technique is used to etch the dielectric layer 204 to form a trench in the dielectric layer 204. 206. 8 <#Read the notes on the back before filling this page)-This paper scale is applicable to Chinese national standards (CNS > A4 specification (210X297 mm) A7 B7 441 002 5340twf.doc / 006 V. Description of the invention (7 ) Then, the photoresist layer is removed, and another layer of photoresist layer 208 with an opening pattern is formed on the dielectric layer 204. This opening is the position where the opening of the contact window is to be formed. This corresponds to the copper metal wire 202 above ° Next, an etching process is performed to transfer the pattern of the opening to form a contact window opening penetrating the dielectric layer 204 and exposing the surface 202a of the copper metal wire 202. 210 = The formation method of the above dual metal damascene opening 211 is In a preferred embodiment of the present invention, a contact window opening may be formed first and then a trench is formed (as shown in FIG. 5), that is, a contact window opening 210 ′ is first formed in the dielectric layer 204 and then is formed on the dielectric layer 204. A photoresist layer 209 to form a trench 206 in the dielectric layer 204, where the trench 206 and the contact window opening 210 together form a double metal damascene opening 211, or the dielectric layer is simply a silicon oxide layer or even has a low dielectric constant In the dielectric layer, the formation method of the trench can be controlled in the time mode (Hme mode). In addition, the formation method of the metal mosaic opening is also applicable to the present invention. Please refer to FIG. 2C, and then remove the photoresist layer 208 This step is based on N2H2 with a flow rate of about 100-300 seem and about 200-600 seem α as the gas source, at a temperature of about 30-90 degrees and a pressure of about 200-600mT 'working power (source power) Use a hybrid electric paddle (H2: 4%) / Ch at a temperature of about 800-1300 watts (2.54GHz) and RF power of about 100-400 watts (13.56MHz) for low-temperature ashing Removal of 208. Although the present invention uses a low temperature mixed plasma with N2: Hh (H2: 4%) / 〇2 as the gas source to remove the photoresist layer 208, it can effectively reduce the bare metal copper. 9 This paper is applicable to China National Standard (CNS > A4 Specification (210X297mm) ---- ^ ------- β --- „----- ΐτ ------. ^ (Please read the Please fill in this page again for attention) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 Λ 41 0 0 2 5340twf.doc / 006 V. Description of the invention (") Oxidation generates copper oxide. However, because the exposed surface 202a of the copper metal wire 202 will still be damaged by the oxygen plasma, and the reaction with the oxygen plasma generates loose copper oxide, which causes multiple metal connections. Obstruction is still slightly affected. Therefore, in the present invention, after forming the double metal damascene 21 and removing the photoresist layer 208, it is used as a gas source to reduce the copper oxide on the surface 202a of the copper metal wire 202 to restore the copper metal wire 202. The surface 202a keeps it flat. In this step, the gas source is NiHXHd%) with a flow rate of about 100-300 seem. At a temperature of about 30-90 degrees, a pressure of about 200-60mT, a working power of about 800-1300 watts (2.54GHz), and RF power. The copper oxide is reduced to metallic copper under the condition of about 100-400 watts (13.56MHz), so that the problem of increased resistance of multiple metal connections can be avoided. In this embodiment, after the copper oxide is reduced, a solvent washing step is further included. Next, after the photoresist layer 208 is removed, a conformal barrier layer 212 is formed on the substrate 200 to cover the upper surface of the dielectric layer 204 and the trenches 206 and the contact window openings 210 of the double heavy metal mosaic opening 211. The material of the barrier layer 212 is to prevent the copper atoms of the subsequent copper metal layer from diffusing into the dielectric layer 204. Therefore, the preferred barrier layer 212 is, for example, tantalum nitride formed by chemical vapor deposition. Because the nitride has a high anti-diffusion ability, it can prevent copper atoms from diffusing into the dielectric layer 204. Next, a conformal first copper metal layer 214 is formed on the substrate 200 to cover the upper surface of the dielectric layer 204, and the trench 206 and the contact window opening 210. Among them, the first copper metal layer 214 is used as a seed layer, and the Chinese paper standard (CNS) A4 (210X297 mm) is applied to this paper size. ----: ------! ------ IT ------ 0 (Please read the note on the back before filling out this page} Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 441 002 5340twf.doc / 006 V. Description of the Invention (7) For subsequent generation of the copper metal layer. The method for forming the first copper metal layer 214 is, for example, a physical vapor deposition method or a chemical vapor deposition method.
然後，以介電層204爲硏磨終止層，去除位於介電層 204上之第一銅金屬層214與阻障層212，以形成如第2C 圖所示之結構。 本發明由於利用N2H2將銅金屬導線202表面202a的 氧化銅還原成金屬銅，使其表面保持平整，故可免除習知 利用溶劑淸除氧化銅而在銅金屬導線202的表面202a產生 孔洞的情形發生。也因爲沒有孔洞的產生，所以第一銅金 屬層214可平整且共形地覆蓋溝渠206與接觸窗開口 210， 而避免後續於高溫回火製程中發生植種層斷線的問題。 請參照第2D圖，以此第一銅金屬層214爲植種層， 進行一電鍍銅或無電鍍銅製程，使第二銅金屬層216由第 一銅金屬層214的表面生成，覆蓋此第一銅金屬層214且 塡滿溝渠206與接觸窗開口 210。 第3A圖與第3B圖所繪示的分別是銅金屬導線在利用 習知之高溫氧電漿灰化的方式去除光阻層且配合溶劑淸洗 前後的比較圖。由於習知以高溫氧電漿灰化的方式去除光 阻層之後，銅金屬導線中的銅會與氧電漿反應而氧化生成 氧化銅，故隨後即利用一般鹼性溶劑去除此氧化銅。但由 圖中可看出，此舉將致使銅金屬導線表面遭受破壞而產生 似孔洞之凹凸不平的表面。 第4A圖與第4B圖所繪示的分別是銅金屬導線在依照 本紙張尺度適用中國國家標準（（：呢）八4说格（210父297公釐> ----：-------装-------訂------線 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局貝工消費合作杜印製 A7 B7 “10 0 2 5340twf.doc/〇〇6 五、發明説明（⑺） 本發明之一較佳實施例’利用低溫之N2H2 (出:4%)/〇2混合 電漿灰化光阻層，再配合以N2H2(H2:4%)爲氣體源還原金屬 氧化物且經過溶劑淸洗步驟前後的比較圖。由於以低濫之 fshH」（Η::4%)/(λ>混合電漿灰化的方式去除光阻層之後，銅 金屬導線表面仍會生成少許的氧化銅，故隨後即利用 N2H?(H2:4%〇爲氣體源還原該氧化銅。之後，再進行一溶劑 淸洗步驟。由圖中可看出’銅金屬導線未遭受破壞，仍保 持平整的表面。因此，由圖可知本發明確實可以避免習知 裸露之銅金屬導線產生孔洞的問題，進而可防止植種層發 生斷線所導致之多重金屬連線阻値增加的問題。 本發明的特徵在於利用低溫之N2H2(H2:4%)/Ch混合電 漿來進行光阻層的去除，以有效地降低裸露之銅金屬導線 與氧電漿反應而氧化生成氧化銅的情況發生。接著，再配 合以Ν2Η2(Η〃4%)爲氣體源將氧化銅還原成金屬銅，以保持 銅金屬導線表面的平整，進而可避免習知裸露之銅金屬導 線產生孔洞，致使後續所形成之植種層發生斷線，導致多 重金屬連線阻値增加的問題發生。 雖然本發明已以較佳實施例揭露如上，然其並非用以 限定本發明，任何熟習此技藝者，在不脫離本發明之精神 和範圍內，當可作各種之更動與潤飾，因此本發明之保護 範圍當視後附之申請專利範圍所界定者爲準。 本紙張尺度適用中國國家榡準（CNS )八4说格（210X297公嫠） I H n I ^ ^ (請先閱讀背面之注意事項再填寫本f ) 經濟部智慧財產局員工消費合作社印製Then, using the dielectric layer 204 as a honing stop layer, the first copper metal layer 214 and the barrier layer 212 on the dielectric layer 204 are removed to form a structure as shown in FIG. 2C. The present invention uses N2H2 to reduce the copper oxide on the surface 202a of the copper metal wire 202 to metal copper and keep the surface flat. Therefore, it is possible to avoid the situation where holes are formed on the surface 202a of the copper metal wire 202 by using conventional solvents to remove copper oxide. occur. Because there are no holes, the first copper metal layer 214 can cover the trench 206 and the contact window opening 210 flatly and conformally, thereby avoiding the problem of disconnection of the seed layer during the subsequent high-temperature tempering process. Referring to FIG. 2D, using the first copper metal layer 214 as a seed layer, a copper plating process or electroless copper plating process is performed, so that the second copper metal layer 216 is generated from the surface of the first copper metal layer 214 and covers the first copper metal layer 214. A copper metal layer 214 fills the trench 206 and the contact window opening 210. Figures 3A and 3B are comparison diagrams of copper metal wires before and after the photoresist layer is removed using a conventional high-temperature oxygen plasma ashing method, and solvent washing is performed. Since it is known to remove the photoresist layer by means of high-temperature oxygen plasma ashing, the copper in the copper metal wires will react with the oxygen plasma to oxidize to form copper oxide, so this copper oxide is subsequently removed using a general alkaline solvent. However, it can be seen from the figure that this action will cause the surface of the copper metal wire to be damaged and produce an uneven surface like a hole. Figures 4A and 4B show that the copper metal wires are in accordance with the Chinese national standard in accordance with the paper size ((:?) 8 4 grid (210 parent 297 mm > ----: --- ---- Install ------- Order ------ line (please read the notes on the back before filling this page) DuPont A7 B7 “10 0 2 5340twf.doc / 〇〇6 V. Description of the invention (ii) A preferred embodiment of the present invention is to use a low temperature N2H2 (out: 4%) / 〇2 mixed plasma to ash the photoresist layer, and then mix it with N2H2 (H2: 4%) is a comparison chart before and after the reduction of metal oxides by a gas source before and after the solvent washing step. Because it is removed by a low fshH "(Η :: 4%) / (λ > mixed plasma ashing method) After the photoresist layer, a small amount of copper oxide will still be formed on the surface of the copper metal wire, so the N2H? (H2: 4% 0 is used as a gas source to reduce the copper oxide. Then, a solvent washing step is performed. From the figure It can be seen that the copper metal wire has not been damaged and still has a flat surface. Therefore, it can be seen from the figure that the present invention can indeed avoid the problem of holes caused by the conventional bare copper metal wire. Furthermore, the problem of increasing the resistance of the multiple metal connection caused by the disconnection of the seed layer can be prevented. The invention is characterized by using a low temperature N2H2 (H2: 4%) / Ch mixed plasma to remove the photoresist layer, In order to effectively reduce the reaction between the exposed copper metal wire and the oxygen plasma to generate copper oxide, the N2 配合 2 (Η〃4%) gas source is then used to reduce the copper oxide to metallic copper to maintain the copper metal. The surface of the wire is flat, which can avoid holes in the conventional bare copper metal wires, which will cause the subsequent seed layer to be broken and cause the problem of increased resistance of multiple metal wires. Although the present invention has been better implemented The example is disclosed as above, but it is not intended to limit the present invention. Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be attached as the following. The scope of the patent application shall be as defined. This paper size is applicable to China National Standards (CNS) 8 and 4 (210X297 cm) IH n I ^ ^ (Please read the precautions on the back before filling in this f) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs