TW437111B - Structure and fabrication method of photodiode - Google Patents

Structure and fabrication method of photodiode Download PDF

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Publication number
TW437111B
TW437111B TW87113316A TW87113316A TW437111B TW 437111 B TW437111 B TW 437111B TW 87113316 A TW87113316 A TW 87113316A TW 87113316 A TW87113316 A TW 87113316A TW 437111 B TW437111 B TW 437111B
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Taiwan
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layer
patent application
item
manufacturing
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TW87113316A
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Chinese (zh)
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Jeng-Hung Chian
Ren-Yau Shiu
Ruei-Shiang Pan
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United Microelectronics Corp
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Abstract

There is disclosed a structure and a fabrication method of photodiode. The method comprises: first, providing a substrate having a device region and an isolation region; forming a silicon nitride passivation layer on the substrate after performing ion implantation and annealing, wherein the passivation layer has to cover regions including the active region, isolation region and all regions at the interface; then, depositing inter-layer dielectrics, such as borate phosphate tetraethylorthosilicate or borate phosphate silicon glass, etc.; and performing a post-processing, such as opening the defined contact window and sputtering metal on this passivation layer.

Description

437飞飞飞 3485twf.d〇c/005 A7 B7 經濟部中央標準局員工消費合作社印聚 五、發明説明(/ ) 本發明是有關於一種半導體元件的結構與方法,且特 別是有關於一種光二極體的結構與製造方法。 光二極體是利用P-N接面(P-N Junction),將光能轉換 成電子信號的半導體受光元件(或稱爲光偵檢元件)。在沒 有光線入射的情況下,P層中電洞與N層中的電子會遠離 接面面處的方向移動並且堆積形成一空乏區(Depletion Layer),此空乏區就如同電路中的電容器具有電場方向。 當入射光強度可激發產生電子-電洞對時,兩者均向結合面 處擴散,當到達接面部位時,由於空乏區之電場作用造成 電荷分離,電子向N層而電洞向P層移動,因此在P-N接 面間發生電流。理想上,光二極體在黑暗中相當於開路 (Open circuit),亦即沒有光電流的產生。 光二極體多應用於影像感測器(Imaging Sensor)等產 品,例如電荷耦合照相機(Charge-Coupled Device Camera ; CCD Camera),PC照相機與數位式照相機(Digital Camera) 等。習知光二極體通常存在因內介電層(Inter-Layer Dieletric;ILD)、開啓接觸窗口與濺鑛金屬等後製程戶斤造成 的電漿損害(Plasma Damage),引發影像感測器產品的暗電 流(Dark Current)不一致,圖素不均勻’並且在營幕顯像時’ 容易產生不正常之亮點(Spot Light)。 請參照第1A圖至第1C圖,其所繪製爲習知一種光二 極體的製造流程剖面圖。如第1A圖所示,在基底1〇〇上’ 例如是P型基底或是N型基底的P井上,形成一層已定義 的氮化矽(Si3N4)層102,此氮化矽層主要是用來作爲區域 3 (讀先閱讀背面之注意事項再填寫本页) 裝-437 Feifei 3485twf.d〇c / 005 A7 B7 Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the Invention (/) The present invention relates to the structure and method of a semiconductor element, and in particular to a photodiode Structure and manufacturing method of polar body. A photodiode is a semiconductor light-receiving element (also called a light-detecting element) that converts light energy into electronic signals using a P-N junction. In the absence of light incident, the holes in the P layer and the electrons in the N layer will move away from the interface and accumulate to form a depletion layer. This depleted area is like a capacitor in a circuit with an electric field direction. When the intensity of the incident light can be excited to generate an electron-hole pair, both diffuse to the junction surface. When the junction area is reached, the charge is separated due to the electric field in the empty region, and the electrons are directed to the N layer and the holes are directed to the P layer. Movement, so that current flows between the PN junctions. Ideally, a photodiode is equivalent to an open circuit in the dark, that is, no photocurrent is generated. Photodiodes are mostly used in products such as Imaging Sensors, such as Charge-Coupled Device Cameras (CCD Cameras), PC Cameras and Digital Cameras. It is known that photodiodes usually have plasma damage caused by inter-layer dielectric (ILD), contact windows, and splattered metal after the opening process, which leads to the damage of image sensor products. The Dark Current is inconsistent, and the pixels are not uniform 'and when the camp screen is developed, it is easy to produce abnormal light spots (Spot Light). Please refer to FIGS. 1A to 1C, which are drawn as cross-sectional views of a conventional manufacturing process of a photodiode. As shown in FIG. 1A, a defined silicon nitride (Si3N4) layer 102 is formed on a substrate 100, such as a P-type substrate or an N-type P well. This silicon nitride layer is mainly used for Come as zone 3 (read the precautions on the back before filling out this page)

•1T 本紙張尺度適用中國國家標準(CNS ) Λ4規格(210X297公犮) 4371 1 1 3485twfdoc/005 A7 B7 經濟部中央標嗥局員工消费合作社印聚 五、發明説明(y) 氧化法(Local Oxidation of Silicon ; LOCOS)製程之罩幕, 緊接著進行區域氧化法的隔離製程,亦即以濕式氧化法, 在含有水氣的環境中,進行隔離區的場氧化層104之成 長。 由於水分子與氧不易透過氮化矽層102,因此在氮化 矽層所覆蓋的矽表面不會有二氧化矽生成,而其他未被氮 化矽覆蓋的矽表面,會被氧化形成由二氧化矽所組成的場 氧化層104。但由於水分子與氧對氮化矽角落的部分,依 然會進行水平方向的擴散,造成位於氮化矽下的部分基底 矽材,仍有程度不同的氧化,形成鳥嘴(Bird’sBeak)106之 外觀。 請參照第1B圖,以濕式蝕刻法剝除氮化矽層102,接 著,進行與基底100之P型離子摻雜電性相反的離子佈植, 亦即在基底100之主動區域(Active Area)進行N+濃離子摻 雜。然後,進行回火(Annealing)步驟,將前述所摻雜之N+ 濃離子往下趨入,形成濃離子摻雜區11〇〇 接著請參照第1C圖,在前述的瘍氧化區104及N+濃 離子摻雜區110上,沉積一層硼磷矽酸四乙酯(Borate Phosphate Tetraethylorthosilicate ; BPTEOS)或硼磷砂玻璃 (B orate Phosphate Silicon Glass ; BPSG)之內介電層 112, 緊接著在介電層112上開啓一接觸窗116。之後,再以濺 鍍法沉積一金屬層(未繪示)以及蝕刻定義金屬層圖案,形 成一接觸插塞114,塡入接觸窗116之中,完成接觸。 皮習知之光二極體結構中,內介電層、開啓接觸窗口 (請先鬩讀背面之注意事項再填寫本頁) U3 --° 本紙張尺度適用中國國家標率(〇奶)八4規格(2!0><297公蝥) \437飞" A7 34S5twf.doc/005 ηη 經濟部中央標準局員工消費合作社印^ 五、發明说明(4) 以及_鍍金屬等後製程步驟的電榮損害(Plasma Damage), 造成影像感測器的暗電流不一致、圖素遺漏(Pixel Leakage) 不均与,並且在螢幕顯像時’容易產生不正常之亮點。 有鑑於此本發明的主要目的’就是在提供一種光二極 體的結構與製造方法’以解決習知之後續製程步驟造成電 漿損害,所引發感測器暗電流不一致,以及圖素不均等缺 點。 根據本發明上述目的提出一種光二極體的結構,其包 括一第一導電型的基底、一隔離區、一第二導電型的摻雜 區、一防止電漿損害的保護贗、一內介電層以及一金屬插 塞。隔離區位於第一導電型的基底之上。第二導電型的摻 雜區位於基底之上’並與隔離區相鄰。防止電漿損害的保 護層覆蓋於隔離區與第二導電型的摻雜區之上。內介電層 位於防止電漿損害的保護層之上。金屬插塞,穿透內介電 層及防止電漿損害的保護層而與第二導電型的摻雜區電性 連接。 根據本發明上述目的提出一種光二極體的製造方法。 此製造方法包括:首先,提供一具有元件區與隔離區的半 導體基底,經過離子摻雜佈植以及回火處理後,再在此基 底上形成氮化矽保護層,此保護層必須完全覆蓋在包括主 動區、隔離區以及交界處的所有區域上。然後在此保護層 上進行硼磷矽酸四乙酯或硼磷矽玻璃等內介電層的沉積、 開啓已定義接觸窗及濺鍍金屬的後製程工作。 爲讓本發明之上述和其他目的、特徵、和優點能更明 5 ---------^.------訂------絲 11* (諳先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標隼(CNS 兄格(210X297公楚) C57U t 丨 3485twf.doc/005 A7 B7 五、發明説明(^ ) 顯易懂,下文將特舉一較佳實例,並配合所附圖式,作詳 細說明如下= 圖式之簡單說明: 第1A圖至第1C圖,其所繪示的爲習知一種光二極體 的製造流程剖面圖;以及 第2A圖到第2D圖,其所繪示的爲根據本發明較佳實 施例,一種光二極體的結構製造流程剖面圖。 其中,各圖式結構標記說明如下: {請先閱讀背面之注意事項再填寫本頁) 裝- 丁 -so 100, 200 : 基底 102, 202 : 氮化矽層 104, 204 : 場氧化層 106, 206 : 鳥嘴區 110, 210 : N+濃離子摻雜區 112 > 212 : 內介電層 114, 214 : 金屬層 116, 216 : 接觸窗口 208 : 氮化矽保護層 218 : 接觸插塞 經濟部中央標卑局貝工消費合作社印1i 實施例 第2A圖至第2D圖所示,爲根據本發明一較佳實施例 之一種光二極體製造流程結構剖面圖。 請參照第2A圖,在基底200上,例如是P型基底或 是N型基底的P井上,形成一層已定義的氮化矽層202, 此氮化矽層202主要是用來作爲區域氧化法製程之罩幕。 6 本紙張尺度適用中國囤家標準(CNS ) A4規格(2丨0X 297公犮)• 1T This paper size applies Chinese National Standards (CNS) Λ4 specifications (210X297 gong) 4371 1 1 3485twfdoc / 005 A7 B7 Printed by the Consumers' Cooperative of the Central Standardization Bureau of the Ministry of Economic Affairs. 5. Description of the invention (y) Oxidation method (Local Oxidation) of Silicon; LOCOS) process, followed by the isolation process of the area oxidation method, that is, the wet oxidation method, the growth of the field oxide layer 104 in the isolation region in an environment containing water vapor. Since water molecules and oxygen cannot easily pass through the silicon nitride layer 102, no silicon dioxide will be formed on the silicon surface covered by the silicon nitride layer, and other silicon surfaces not covered by the silicon nitride will be oxidized to form a silicon dioxide layer. A field oxide layer 104 composed of silicon oxide. However, water molecules and oxygen still diffuse horizontally to the corners of the silicon nitride, causing the underlying silicon material under the silicon nitride to still oxidize to varying degrees, forming a bird's beak. 106 Its appearance. Referring to FIG. 1B, the silicon nitride layer 102 is stripped by a wet etching method, and then an ion implantation opposite to the P-type ion doping of the substrate 100 is performed, that is, in the active area of the substrate 100 (Active Area ) Do N + concentrated ion doping. Then, an annealing step is performed, and the aforementioned doped N + concentrated ions are drawn down to form a concentrated ion doped region 1100. Then, referring to FIG. 1C, in the aforementioned ulcer oxidation region 104 and the N + concentrated region, On the ion-doped region 110, a dielectric layer 112 is deposited in a layer of Borate Phosphate Tetraethylorthosilicate (BPTEOS) or Borate Phosphate Silicon Glass (BPSG), followed by the dielectric layer. A contact window 116 is opened on 112. After that, a metal layer (not shown) is deposited by sputtering and a metal layer pattern is defined by etching to form a contact plug 114, which is inserted into the contact window 116 to complete the contact. In the light diode structure of the skin, the inner dielectric layer and the contact window are opened (please read the precautions on the back before filling out this page) U3-° This paper size is applicable to China National Standard (〇 奶) 8 4 specifications (2! 0 > < 297 Gong) \ 437 飞 " A7 34S5twf.doc / 005 ηη Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs ^ V. Description of the Invention (4) and _ metal plating and other post-processing steps Plasma Damage causes the dark current of the image sensor to be inconsistent, pixel leaks (Pixel Leakage) uneven, and it is easy to produce abnormal bright spots when the screen is displayed. In view of this, the main purpose of the present invention is to provide a structure and a manufacturing method of a photodiode to solve the defects of plasma damage caused by conventional subsequent process steps, inconsistent dark current of the sensor, and uneven pixels. According to the above object of the present invention, a photodiode structure is provided, which includes a substrate of a first conductivity type, an isolation region, a doped region of a second conductivity type, a protective layer to prevent plasma damage, and an internal dielectric. Layer and a metal plug. The isolation region is located on the substrate of the first conductivity type. The doped region of the second conductivity type is located on the substrate 'and is adjacent to the isolation region. A protective layer for preventing plasma damage covers the isolation region and the doped region of the second conductivity type. The inner dielectric layer is on top of a protective layer that prevents plasma damage. The metal plug penetrates the inner dielectric layer and the protective layer to prevent damage to the plasma and is electrically connected to the doped region of the second conductivity type. According to the above object of the present invention, a method for manufacturing a photodiode is proposed. The manufacturing method includes: first, providing a semiconductor substrate having an element region and an isolation region; forming a silicon nitride protective layer on the substrate after ion doping implantation and tempering treatment; the protective layer must be completely covered on the substrate; Including the active zone, the quarantine zone and all areas of the junction. After this, the inner dielectric layers such as tetraethyl borophosphosilicate or borophosphosilicate glass are deposited on this protective layer, and the defined contact windows and post-sputtered metal are opened. In order to make the above and other objects, features, and advantages of the present invention clearer 5 --------- ^ .------ Order ------ Silk 11 * (谙 Read the back first Please pay attention to this page and fill in this page) This paper size is applicable to Chinese national standard (CNS Brother (210X297)) C57U t 丨 3485twf.doc / 005 A7 B7 V. The description of the invention (^) is easy to understand. A preferred example, in conjunction with the attached drawings, is explained in detail as follows: Brief description of the drawings: FIGS. 1A to 1C, which are cross-sectional views of a conventional manufacturing process of a photodiode; and Figures 2A to 2D are cross-sectional views of the structure manufacturing process of a photodiode according to a preferred embodiment of the present invention. Among them, the structure marks of each figure are described as follows: {Please read the note on the back first Please fill in this page again)-Ding-so 100, 200: substrate 102, 202: silicon nitride layer 104, 204: field oxide layer 106, 206: bird's beak region 110, 210: N + concentrated ion doped region 112 & gt 212: inner dielectric layers 114, 214: metal layers 116, 216: contact window 208: silicon nitride protective layer 218 Central Bureau of Standard Peel contact plug HIGHLAND Economic Co-op plate portion 1i plug embodiment shown in FIGS. 2A through 2D of FIG embodiment, a configuration according to a cross-sectional view of a light diode manufacturing process of a preferred embodiment of the present invention. Referring to FIG. 2A, a defined silicon nitride layer 202 is formed on a substrate 200, such as a P-type substrate or an N-type substrate P well. This silicon nitride layer 202 is mainly used as a region oxidation method. The veil of the process. 6 This paper size is applicable to China Store Standard (CNS) A4 (2 丨 0X 297 cm)

oc/002 A7 __B7 _ 明(夂) 緊接著進行區域氧化法的隔離製程,亦即以濕式氧化法, 在含有水氣的環境中,進行隔離區的場氧化層204之成長^ 同樣的,由於水分子與氧不易透過氮化矽層202,因此 在氮化矽層所覆蓋的矽表面不會有二氧化矽生成,而其他 未被氮化矽覆蓋的矽表面,會被氧化形成由二氧化矽所組 成的場氧化層204。再加上水分子與氧對氮化矽角落的部 分,依然會進行水平方向的擴散、氧化,因此形成鳥嘴206 之外觀。 請參照第2Β圖,以濕式蝕刻法剝除氮化矽層202,接 著,進行與基底200之Ρ型離子摻雜電性相反的離子佈植, 亦即在基底200之主動區域(Active Area)進行Ν+濃離子摻 雜。然後,進行回火(Annealing)步驟,將前述所摻雜之N+ 濃離子往下趨入,形成N+濃離子摻雜區210。 接著請參照第2C圖,在基底200上方形成氮化矽層 208,覆蓋整個基底200表面,此氮化矽層之最佳厚度大於 100A,作爲保護層之用,以阻擋由後續進行內介電層之沉 積、開啓接觸窗口與金屬濺鍍等後製程時所造成的電漿損 害。 請參照第2D圖,在前述的氮化矽保護層上’以化學氣 相沉積法(Chemical Vapor Deposition ; CVD)’ 沉積一層硼 磷矽酸四乙酯(BPTEOS)或硼磷矽玻璃(BPSG)之內介電層 (1LD)212,此步驟例如是以電漿強化型化學氣相沉積法 (Plasma Enhanced CVD ; PECVD)在攝氏溫度 3〇〇 度到 400 il --------訂---------線 (請先閱讀背面之;1意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 表紙張尺度適用中國國家標準(CNS)A4規格(2〗0 X 297公釐) 11 3485twf.doc/005 A7 B7 經濟部中央標準局貝工消費合作社印裝 五、發明説明(心) 度,操作壓力5到O.ltorr的條件下進行沉積》緊接著,進 行微影與蝕刻步驟,在介電層2丨2上形成一層光阻(未繪 示),並定義光阻層的圖案,然後再以此光阻面爲罩幕,蝕 刻內介電層212及已定義之氮化矽保護層208,露出主動 區之部分表面,而形成一接觸窗口 。之後,再以濺鍍 法沉積一金屬層(未繪示)以及蝕刻定義金屬層圖案,形成 一接觸插塞214,塡入接觸窗216之中,完成接觸》 在本發明的較佳實例中,在進行內介電層沉積前,在 摻雜區210、場氧化層304與鳥嘴區206上,形成氮化砂 層208爲保護,因此可以避免因爲後續內介電層、微影餓 刻接觸窗口以$金屬層沉積等製程所造成的電漿損害’如 此一來可以改善因電漿損害所產生的暗電流情況,以及圖 素的不均勻,螢幕顯像時容易產生不正常亮點的缺點。 綜上所述,本發明的特徵在於: 1. 本發明之光二極體釣結構與製程中,在離子摻雜佈 植回火完成後,進行內介電層沉鲁之前,在摻雜區、場氧 化層舆鳥嘴區上,先覆蓋上氮化矽層爲保護,如此一來’ 可避免因爲「之後內介電層、微影蝕刻接觸窗口以及金屬層 沉積等後續製程所造成的電漿損害,以改善因電漿損害所 產生的暗電流與圖素的不均勻,螢幕顯像容易產生不正常 亮點之缺點。 2. 本發明的製程與現有的製程相容,極適合廠商的生 產安排。 雖然本發明已以一較佳實施例揭露如上,然其並非用 8 c請先閱讀背面之注意事項再填寫本頁) 裝- 订 本紙乐尺度適用中國國家標準(CNS ) A4规枋(210X297公oc / 002 A7 __B7 _ Ming (夂) Immediately following the isolation process of the area oxidation method, that is, the wet oxidation method, the growth of the field oxide layer 204 in the isolation zone in an environment containing water vapor ^ Similarly, Since water molecules and oxygen cannot easily pass through the silicon nitride layer 202, no silicon dioxide will be formed on the silicon surface covered by the silicon nitride layer, and other silicon surfaces not covered by the silicon nitride will be oxidized to form a silicon dioxide layer. A field oxide layer 204 composed of silicon oxide. In addition, water molecules and oxygen will still diffuse and oxidize the silicon nitride corners in the horizontal direction, thus forming the appearance of the bird's beak 206. Referring to FIG. 2B, the silicon nitride layer 202 is stripped by a wet etching method, and then an ion implantation opposite to the P-type ion doping of the substrate 200 is performed, that is, in the active area of the substrate 200 (Active Area ) Perform N + concentrated ion doping. Then, an annealing process is performed, and the aforementioned doped N + concentrated ions are drawn downward to form an N + concentrated ion doped region 210. Next, referring to FIG. 2C, a silicon nitride layer 208 is formed over the substrate 200 to cover the entire surface of the substrate 200. The optimal thickness of the silicon nitride layer is greater than 100A, and is used as a protective layer to prevent the subsequent internal dielectric. Plasma damage caused by post-processes such as layer deposition, opening of contact windows and metal sputtering. Please refer to FIG. 2D, and deposit a layer of tetraethyl borophosphosilicate (BPTEOS) or borophosphosilicate glass (BPSG) on the aforementioned silicon nitride protective layer 'by Chemical Vapor Deposition (CVD)' Dielectric layer (1LD) 212, this step is, for example, plasma enhanced chemical vapor deposition (Plasma Enhanced CVD; PECVD) at 300 degrees Celsius to 400 il -------- order --------- line (please read the back first; please fill in this page before filling out this page) The printed paper size of the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs applies the Chinese National Standard (CNS) A4 specification (2) 0 X 297 mm) 11 3485twf.doc / 005 A7 B7 Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. 5. Description of the invention (heart), deposition at operating pressure 5 to O.ltorr. Perform lithography and etching steps to form a photoresist (not shown) on the dielectric layer 2 丨 2, define the pattern of the photoresist layer, and then use the photoresist surface as a mask to etch the inner dielectric layer 212 And the defined silicon nitride protective layer 208, exposing part of the surface of the active area, and forming a contact window. After that, a metal layer (not shown) is deposited by sputtering and a metal layer pattern is defined by etching to form a contact plug 214, which is inserted into the contact window 216 to complete the contact. In a preferred example of the present invention, Before the inner dielectric layer is deposited, a nitrided sand layer 208 is formed on the doped region 210, the field oxide layer 304, and the bird's beak region 206 for protection, so it is possible to avoid contact with the window due to subsequent internal dielectric layers and lithography. Plasma damage caused by processes such as metal layer deposition can improve the dark current caused by plasma damage and the unevenness of the pixels. It is easy to produce abnormal bright spots when the screen is displayed. In summary, the present invention is characterized by: 1. In the photodiode fishing structure and process of the present invention, after the ion-doped fabric is tempered, and before the internal dielectric layer is settled, the doped region, The field oxide layer is first covered with a silicon nitride layer to protect the bird's beak area. In this way, 'plasma caused by subsequent processes such as the subsequent dielectric layer, lithographic etching contact window, and metal layer deposition is avoided. Damage to improve the unevenness of dark current and pixels caused by plasma damage, and the screen display is prone to produce abnormal bright spots. 2. The process of the present invention is compatible with the existing process and is very suitable for the production arrangements of manufacturers. Although the present invention has been disclosed as above with a preferred embodiment, it is not used in 8c. Please read the notes on the back before filling out this page.) Binding-The size of the paper is applicable to the Chinese National Standard (CNS) A4 regulations (210X297) public

, 經濟部中央栋準局貝工消费合作社印衆 A 4371 1 1 五、發明説明()) 以限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍內,當可作各種之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 (請先閱讀背面之注意事項再填寫本頁) %, Central Construction Bureau of the Ministry of Economic Affairs, Shellfish Consumer Cooperatives, India A 4371 1 1 V. Description of the Invention ()) To limit the present invention, anyone skilled in the art can make various kinds without departing from the spirit and scope of the present invention. Changes and retouching, therefore, the scope of protection of the present invention shall be determined by the scope of the appended patent application. (Please read the notes on the back before filling this page)%

、1T 本紙張尺度適用中國囷家標準(〇奶)八4規格(21(^297公耷>、 1T This paper size is applicable to Chinese standard (〇 奶) 8 4 size (21 (^ 297 公 297 >

Claims (1)

A371 1 1 3485twfdoc/005 A8 BB C8 D8 經濟部中央標準局貞工消費合作社印裂 六、申請專利範圍 1. 一種光二極體之結構,其包栝: 一第一導電型的基底 ; 一隔離區,位於該第一導電型的基底之上; 一第二導電型的摻雜區,位於該基底之上,並與該隔 離區相鄰; 一防止電漿損害的保護層,覆蓋於該隔離區與該第二 導電型的摻雜區之上; 一內介電層,位於該防止電漿損害的保護層之上,以 及 一金屬插塞,穿透該內介電層及該防止電漿損害的保 護層而與該第二導電型的摻雜區電性連接。 2. 如申請專利範圍第1項所述之結構,其中該防止電 漿損害的保護層包括一氮化矽層。 3. 如申請專利範圍第1或2項所述之結構 底包括一摻雜的井區。 4. 如申請專利範圍第1或2項所述之結構 一導電型與該第二導電型的電性相反。 5. 如申請專利範圍第1或2項所述之結構 化矽層厚度約大於100A。 6·如申請專利範圍第1或2項所述之結構 介電層包括一硼磷矽酸四乙酯層 7. 如申請專利範圍第1或2項所述之結構 介電層包括一硼磷矽玻璃層。 8. —種光二極體的製造方法’包括: 請 先 閲 讀 背 本 裝 訂 其中該基 其中該第 其中該氮 其中該內 其中該內 10 本紙張尺度適用中國國家橾牟(CNS ) A4規格(21〇5<297公釐) ]T • l ^5t\yQ.(〇, )c/002 · 6號專利範圍修IHK Α8 BS C8 D8 修正日期89/6/26 經濟部智慧財產局員工消費合作社印製 六、申請專利範圍 提供一第一導電型的基底; 於該基底h形成一隔離區’用以作爲絕緣之用; 於該基底上進行離子摻雜隨後進行回火’形成一第二 導電型離子摻雜區; 在該第一導電型的基底上方覆蓋一防止電漿損害的保 護層; 於該防止電漿損害的保護層上形成一內介電層; 蝕刻該內介電層與該防止電漿損害的保護層,定義裸 露出該第二導電型離子摻雜區之一接觸窗口;以及 形成一接觸插塞,塡入該接觸窗口內。 9.如申請專利範圍第8項所述之製造方法,其中該防止 電漿損害的保護層包括一氮化矽層。 < 10.如申請專利範圍第8或9項所述之製造方法,其中 該基底包括一摻雜的井區。 Π.如申請專利範圍第8或9項所述之製造方法,其中 該隔離區形成方法包括區域氧化法。 12.如申請專利範圍第8或9項所述之製造方法,其中 該隔離區包括場氧化層。 〖3.如申請專利範圍第8或9項所述之製造方法,其中 該第一導電型與該第二導電型之電性相反。 H,如申請專利範圍第9項所述之製造方法,其中該氮 化矽層厚度約大於100A。 15 ‘如申請專利範圍第8或9項所述之製造方法,其中 該內介電層包括一硼磷矽酸四乙酯層。 本紙張尺度通用中國國豕標準(CNSM4規格(210 X 297公釐) l·---.---------^---------訂---------線 <請先閱讀背面之注意事項再填寫本頁) 心” A8 3485twf.doc/005 荒 C8 D8 六、申請專利範圍 16. 如申請專利範圍第8或9項所述之製造方法,其中 該內介電層包括一硼磷矽玻璃層。 17. 如申請專利範圍第8或9項所述之製造方法,其中 該內介電層之形成方法包括電漿強化型化學氣相沉積法。 18. 如申請專利範圍第8或9項所述之製造方法,其中 該內介電層之形成方法包括常壓化學氣相沉積法。 19. 如申請專利範圍第8或9項所述之製造方法,其中 係以乾式蝕刻法定義該接觸窗口。 20. 如申請專利範圍第8或9項所述之製造方法,其中 形成該接觸插塞方法更包括: 以濺鍍法於該基底上方形成一金屬層,塡入該接觸窗 口內;以及 蝕刻定義該金屬層圖案。 訂 線 (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本紙張尺度逍用中國國家標準(CNS ) A4規格(210 X 297公釐)A371 1 1 3485twfdoc / 005 A8 BB C8 D8 Printed by the Zhengong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 6. The scope of patent application 1. A photodiode structure, which includes: a substrate of the first conductivity type; an isolation zone Is located on the substrate of the first conductivity type; a doped region of the second conductivity type is located on the substrate and is adjacent to the isolation region; a protective layer to prevent plasma damage covers the isolation region Above the doped region of the second conductivity type; an inner dielectric layer on the protective layer to prevent plasma damage, and a metal plug penetrating the inner dielectric layer and the plasma damage prevention Is electrically connected to the doped region of the second conductivity type. 2. The structure according to item 1 of the scope of patent application, wherein the protective layer for preventing plasma damage comprises a silicon nitride layer. 3. The bottom of the structure as described in item 1 or 2 of the patent application scope includes a doped well region. 4. The structure described in item 1 or 2 of the scope of patent application. One conductivity type has the opposite electrical property to the second conductivity type. 5. The thickness of the structured silicon layer as described in item 1 or 2 of the scope of patent application is greater than 100A. 6. The structure dielectric layer according to item 1 or 2 of the scope of patent application includes a tetraethyl borophosphosilicate layer 7. The structure dielectric layer according to item 1 or 2 of the scope of patent application includes a boron phosphorus Silica glass layer. 8. —Manufacturing method of a kind of photodiodes' includes: Please read the back binding first, the first, the first, the nitrogen, the inner, the inner and the inner 10 paper sizes applicable to the Chinese National Mould (CNS) A4 specification (21 〇5 < 297mm)] T • l ^ 5t \ yQ. (〇,) c / 002 · No. 6 Patent Scope Revised IHK Α8 BS C8 D8 Revision Date 89/6/26 Printed by the Consumers ’Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 6. The scope of the patent application provides a substrate of a first conductivity type; an isolation region is formed on the substrate h for insulation; an ion doping on the substrate is followed by tempering to form a second conductivity type. An ion-doped region; a protective layer for preventing plasma damage is formed over the first conductive type substrate; forming an internal dielectric layer on the protective layer for preventing plasma damage; etching the internal dielectric layer and the prevention The protective layer damaged by plasma is defined to expose one of the contact windows of the second conductive ion-doped region; and a contact plug is formed to be inserted into the contact window. 9. The manufacturing method according to item 8 of the scope of patent application, wherein the protective layer for preventing plasma damage comprises a silicon nitride layer. < 10. The manufacturing method as described in claim 8 or 9, wherein the substrate includes a doped well region. Π. The manufacturing method according to item 8 or 9 of the scope of patent application, wherein the isolation region forming method includes a region oxidation method. 12. The manufacturing method according to claim 8 or 9, wherein the isolation region includes a field oxide layer. [3. The manufacturing method according to item 8 or 9 of the scope of patent application, wherein the electrical conductivity of the first conductivity type is opposite to that of the second conductivity type. H. The manufacturing method as described in item 9 of the scope of patent application, wherein the thickness of the silicon nitride layer is greater than about 100A. 15 'The manufacturing method according to item 8 or 9 of the scope of patent application, wherein the inner dielectric layer includes a tetraethyl borophosphosilicate layer. The size of this paper is in accordance with the Chinese National Standard (CNSM4 specification (210 X 297 mm) l · ---.--------- ^ --------- order ------ --- line < Please read the precautions on the back before filling this page) Heart ”A8 3485twf.doc / 005 CC8 D8 六 、 Application for patent scope 16. Manufacturing method as described in item 8 or 9 of patent scope Wherein the inner dielectric layer includes a borophosphosilicate glass layer. 17. The manufacturing method as described in item 8 or 9 of the scope of patent application, wherein the method for forming the inner dielectric layer includes plasma enhanced chemical vapor deposition 18. The manufacturing method as described in item 8 or 9 of the scope of patent application, wherein the method for forming the inner dielectric layer includes atmospheric pressure chemical vapor deposition. 19. As described in item 8 or 9 of the scope of patent application The manufacturing method, wherein the contact window is defined by a dry etching method. 20. The manufacturing method according to item 8 or 9 of the patent application scope, wherein the method of forming the contact plug further comprises: sputtering over the substrate Forming a metal layer into the contact window; and etching to define the metal layer pattern. Ordering (please read the back first Please fill in this page again.) Printed by the Consumers' Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. The paper size is in accordance with China National Standard (CNS) A4 (210 X 297 mm).
TW87113316A 1998-08-13 1998-08-13 Structure and fabrication method of photodiode TW437111B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102176567A (en) * 2011-02-24 2011-09-07 颜裕峰 Structure of connector terminal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102176567A (en) * 2011-02-24 2011-09-07 颜裕峰 Structure of connector terminal

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