TW436965B - Plasma treatment for ex-situ contact fill - Google Patents

Plasma treatment for ex-situ contact fill Download PDF

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TW436965B
TW436965B TW088109001A TW88109001A TW436965B TW 436965 B TW436965 B TW 436965B TW 088109001 A TW088109001 A TW 088109001A TW 88109001 A TW88109001 A TW 88109001A TW 436965 B TW436965 B TW 436965B
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Lisa Yang
Anish Tolia
Roderick Craig Mosely
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Applied Materials Inc
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855After-treatment introducing at least one additional element into the layer
    • H01L21/76856After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/02Pretreatment of the material to be coated
    • C23C14/024Deposition of sublayers, e.g. to promote adhesion of the coating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0272Deposition of sub-layers, e.g. to promote the adhesion of the main coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76862Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76871Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76873Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76871Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76876Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for deposition from the gas phase, e.g. CVD
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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
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    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/10Applying interconnections to be used for carrying current between separate components within a device
    • H01L2221/1068Formation and after-treatment of conductors
    • H01L2221/1073Barrier, adhesion or liner layers
    • H01L2221/1084Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L2221/1089Stacks of seed layers

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Abstract

The present invention provides a method and apparatus for filling contacts, vias, trenches, and other patterns, in a substrate surface, particularly patterns having high aspect ratios. Generally, the present invention provides a method for removing oxygen from the surface of an oxidized metal layer prior to deposition of a subsequent metal. The oxidized metal is treated with a plasma consisting of nitrogen, hydrogen, or a mixture thereof. In one aspect of the invention, the metal layer is Ti, TiN, Ta, TaN, Ni, NiV, or V and a subsequent wetting layer is deposited using either CVD techniques or electroplating, such as CVD aluminum (A1) or electroplating of copper (Cu). The metal layer can be exposed to oxygen or the atmosphere and then treated with a plasma of nitrogen and/or hydrogen in two or more cycles to remove or reduce oxidation of the surface of the metal layer and nucleate the growth of a subsequent metal layer thereon.

Description

* 4369 6 5 A7 -------- B7_______ 五、發明說明() 發明領域: 本發明係關於一種用來在一具有次微米特徵(feature) 的基材上形成集積的插塞與互連線的設備及方法。更特定 地’本發明係關於用於形成金屬互連線之金屬化程岸,其 中一阻障層或—長晶層於該程序中被曝露於氧中。 發明背景: 半次微米多層金屬化是下一世代超大型積體電路 (’’VLSI”)的關鍵技術之一。此技術核心所在之多層互連線 需要而深寬比之特徵,如插塞及其它互連線,的平坦化。 這些互連線之可靠的形成對於成功的VLSI及對於提高在 一羊一的基材及晶粒上之電路密度與品質之持序的努力 而言是很重要的β 傳統的化學氣相沉積(c V D)及物理氣相沉積(Ρ V D)技 術被用來將導電的金屬沉積於接點孔,介層孔,渠道,或 其έ开/成於該基材上的囷案中。傳統方法的一個問題在 於因為*衾等接點孔或其它的圖案經常都包含高的深寬 比即該等孔的深度對其寬度或直徑的比大於1 ^該等孔 的深寬比會隨著技術的演進所造成之更為靠近的特徵而 提高。 參…、第1圖,一基材丨〇其包括一形成於其上的—電 子絕緣層或介電層1 2 ’如一二氧化矽或氮化矽層,中之孔 11。在一高的深寬比的孔u中形成一均勻的含有金屬的 層是很困難的’因為該含有金屬的層通常會沉積於該等孔 W5頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐>------ (請先閱讀背面之注意事項再填寫本頁) ---11111 ^ i · 經濟部智慧財產局員工消費合作社印製 436965 A7 -……_B7 五、發明說明() 的侧壁1 4上且橫跨過該孔的究度,、.而最終在該孔被宅全 填滿之前即跨越該孔的寬度收斂,因而在該含有金屬的村 料中形成及不連續。之後,包圍在該等空穴周圍之高 活動性的金屬原子造成原子擴散並將形成圓形的空穴之 該等丄八的表面積最小化’如第1圖所示。這些空穴及不 連續會造成不良及不可靠的電氣接點。 被用來降低空穴行成於接電孔,介層孔,渠道或其它 圖案中之一種方法為在高溫下將金屬"平坦化 (planarize)”。在該基材上之一連續的濕層的構成是高溫下 成功的平坦化的關鍵。一薄的保形鋁膜層對於在高溫 350°C )下實施的後續物理氣相沉積及平坦化技術而言為 一良好的濕層。一種方法為使用一用化學氣相沉積(CVD) 技術沉積的濕層,即一鋁層,作為該平坦化的濕層《成功 的CVD鋁或銅沉積已藉由先沉積作為一阻障層及一用來 改善該CVD層之長晶層之用的保形Ti及TiN層而被達 成。最近的實驗顯示保形Ti及TiN層不必是保形的也能 改善該CVD鋁及銅層的沉積及性能。相同地,保形Ta及 TaN層作為銅沉積之阻障層及長晶層的功效同樣良好。 Ni,NiV,及V之成功的濕層亦在磁頭的製造期間被用來 填充圖案** 4369 6 5 A7 -------- B7_______ V. Description of the invention () Field of the invention: The present invention relates to a plug and an interaction for forming an aggregate on a substrate having sub-micron features. Equipment and method for connection. More specifically, the present invention relates to a metallization process bank for forming a metal interconnect, in which a barrier layer or a growth layer is exposed to oxygen during the process. Background of the Invention: Half-micron multi-layer metallization is one of the key technologies for the next generation of very large scale integrated circuits ("VLSI"). The core of this technology is the characteristics of multilayer interconnections that require aspect ratio, such as plugs The planarization of other interconnects. The reliable formation of these interconnects is very important for successful VLSI and for efforts to improve the density and quality of circuits on a substrate and die. Important β Traditional chemical vapor deposition (c VD) and physical vapor deposition (PVD) techniques are used to deposit conductive metals in contact holes, vias, channels, or by hand In the case of substrates, a problem with conventional methods is that contact holes or other patterns, such as * 衾, often contain a high aspect ratio, that is, the ratio of the depth of the holes to their width or diameter is greater than 1 ^ the The aspect ratio of the pores will increase with the closer characteristics caused by the evolution of technology. See Fig. 1, a substrate, which includes an electronic insulation layer or dielectric formed on it. Layer 1 2 'as silicon dioxide or silicon nitride layer, hole 11 in the middle It is very difficult to form a uniform metal-containing layer in a high aspect ratio hole u because the metal-containing layer is usually deposited on the holes. W5 pages This paper applies Chinese National Standard (CNS) A4 Specifications (210 X 297 mm) ------- (Please read the precautions on the back before filling out this page) --- 11111 ^ i · Printed by the Intellectual Property Bureau Staff Consumer Cooperative of the Ministry of Economic Affairs 436965 A7 -... _B7 V. The description of the invention (4) on the side wall 14 and across the hole, and finally converge across the width of the hole before the hole is completely filled, so in the metal-containing Formation and discontinuities in the material. Later, highly mobile metal atoms surrounding the holes cause atom diffusion and minimize the surface area of the holes forming the circular holes, as shown in Figure 1. These holes and discontinuities can cause poor and unreliable electrical contacts. One method used to reduce the formation of holes in electrical holes, vias, channels, or other patterns is to metal at high temperatures. " planarize ". One of the substrates is continuous The composition of the wet layer is the key to successful planarization at high temperatures. A thin conformal aluminum film layer is a good wet layer for subsequent physical vapor deposition and planarization techniques performed at high temperatures of 350 ° C. One method is to use a wet layer deposited using chemical vapor deposition (CVD) technology, that is, an aluminum layer, as the planarized wet layer. "Successful CVD aluminum or copper deposition has been achieved by first depositing as a barrier layer and A conformal Ti and TiN layer for improving the growth of the crystalline layer of the CVD layer is achieved. Recent experiments have shown that conformal Ti and TiN layers need not be conformal to improve the deposition and performance of the CVD aluminum and copper layers. Similarly, the conformal Ta and TaN layers are equally effective as barrier layers and crystal growth layers for copper deposition. The successful wet layers of Ni, NiV, and V were also used to fill the pattern during the manufacturing of the magnetic head *

金屬層,如 Ti,TiN,Ta,TaN,Ni,NiV 或 V,的 氧化被習知為後續金屬層的長晶層的後續使用且可提高 該結合的層之電阻。因此,成功的金屬化程序典型地涉及 了濕層的沉積及後續沒有曝露於氣下之金屬層,如Ti’ TiN 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) itf先閲讀背面之注意事項再填寫本頁> * I n ai I n I» ^ · It I» t— ^ ^ ϋ I ^ 經濟部智慧財產局具工消費合作社印製 436965 A7 B7 五、發明說明() 及銘’或Ta,TaN及铜,的沉積。依、序的沉積步鄉可藉由 將不同的沉積室結合於一整合的平台上,如由設在美國加 州 Santa Clara市的 Applied Materials公司所出產的 Endura™處理系統,而在沒有氧的存在下被實施。然而, 實施該等沉積程序所需之不同的室是在極不相同的時間 期下操作且許多的室可能都沒有被使用。這些室在不同的 整合平台上之安排可改善產能,但會有害地曝露於氧之 下。甚者,金屬層之氧氣電漿處理,如加了 Ti或TiN之 氧氣電漿,及非同地(ex-situ)處理,如爐子退火及快速熱 處理(RTP),已知是對於金屬層有利,像是加強阻障層特 性’但對於後續的金屬層會有不利的影響,如會造成在結 晶方向,晶粒生長,填充特性,及反射性上有不利的影響。 在一氧化的金屬層上沉積一無氧化的金屬薄層已被 提出以改善CVD鋁層的長晶,但需要額外的處理時間及 鵝外的沉積室。鋁或銅的長晶可被改善,如果底下的金屬 層,如Ti,TiN,Ta,TaN,Ni,NiV及V層沒有包含氧 接近該表面。因此,對於能夠在沉積一金屬層填充高深寬 比的接點孔,介層孔,渠道,及其它圖案之前去除或降低 金屬層氧化存在著殷切的需求。 發明目的及椒沭: 本發明提供一種在一具有小特徵尺吋(如四分之一微 米寬度或更小)且具有高的深寬比之應用中形成一互連線 的方法及杜備。大體上,本發明提供一種藉由用氮氣,氫Oxidation of a metal layer, such as Ti, TiN, Ta, TaN, Ni, NiV or V, is known as the subsequent use of a growth layer of a subsequent metal layer and can increase the resistance of the combined layer. Therefore, a successful metallization process typically involves the deposition of a wet layer and subsequent metal layers that are not exposed to the atmosphere, such as Ti 'TiN. This paper is sized to the Chinese National Standard (CNS) A4 (210 X 297 mm) itf Please read the notes on the back before filling in this page > * I n ai I n I »^ · It I» t— ^ ^ ϋ I ^ Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Industrial Cooperatives 436965 A7 B7 V. Description of the invention () And the deposition of Ta, TaN and copper. Sequential deposition steps can be achieved by combining different deposition chambers on an integrated platform, such as the Endura ™ processing system produced by Applied Materials, Inc. of Santa Clara, California, in the absence of oxygen. Next is implemented. However, the different chambers required to perform these deposition procedures are operated at very different time periods and many of the chambers may not be used. The arrangement of these chambers on different integrated platforms can improve productivity, but can be harmfully exposed to oxygen. Furthermore, the oxygen plasma treatment of metal layers, such as the addition of Ti or TiN oxygen plasma, and ex-situ treatments, such as furnace annealing and rapid heat treatment (RTP), are known to be beneficial to the metal layer. , Such as strengthening the characteristics of the barrier layer ', but it will adversely affect the subsequent metal layer, such as it will cause adverse effects on the crystal direction, grain growth, filling characteristics, and reflectivity. Deposition of a thin non-oxidized metal layer on an oxidized metal layer has been proposed to improve the growth of the CVD aluminum layer, but requires additional processing time and a deposition chamber outside the goose. The crystal growth of aluminum or copper can be improved if the underlying metal layers such as Ti, TiN, Ta, TaN, Ni, NiV and V layers do not contain oxygen close to the surface. Therefore, there is an urgent need to be able to remove or reduce the oxidation of the metal layer before depositing a metal layer to fill high aspect ratio contact holes, vias, channels, and other patterns. OBJECTS OF THE INVENTION AND SWEET: The present invention provides a method and apparatus for forming an interconnect in an application having a small feature size (such as a quarter micrometer width or less) and a high aspect ratio. Generally, the present invention provides a

第7X 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (琦先閲讀背面之注意事項再填寫本頁) 裝 訂---------A.. 經濟部智慧財產局員工消費合作社印製 436965 A7 ______B7________ 五、發明說明() 氣,或氮與氫的组合之電漿處理該表、面來去除或降低金屬 長晶或满層’如T i,T i N,T a,T aN,Ni,NiV及V,的氧 化作用。該經過處理的表面提供後續用於填充接點,介層 孔,渠道’及其它圓案之程序期間之CVD或電鍍金屬化 絕佳的長晶。 經濟部智慧財產局員工消費合作社印製 <請先閱讀背面之注意事項再填寫本頁) 在本發明的一態樣中’一 Ti’TiN,Ta或TaN阻障層 是藉由沉積該金屬層及用一氧氣電漿來填塞(stuffing)該 被沉積的金屬層而形成的。然後,一長晶層藉由氫氣,氮 氣,或它們的一混合物的電漿處理而被形成於該阻障層的 表面上,用以去處氧氣及形成該Ti,TiN,Ta或TaN之不 連續層或薄層,其在下文中以e層來表示,其具有的厚度 為從數個原子至數百埃。被沉積於該e層上之上之後績的 金屬層最好是藉由使用化學氣相沉積技術或電鍍技術所 沉積的鋁(A1)或銅(Cu)濕層。該濕層可以是使用PVD或 CVD技術沉積’最好是PVD技術,用以改善所獲得之膜 層的品質及結晶方向,因此,該濕層可在將該阻障層曝露 於氧氣下之後被沉積。該經過電漿處理的ε層藉由在該被 沉積於該e層上之膜層中產生自動對齊效應而提升該膜 層之方相性及形態 圖式簡軍說明: 本發明之一更為特定的描述可藉由參照在附囷中所 示出之較佳實施例而被獲得,使得本發明之前述特徵,優 點及目的可被詳細地瞭解。 第8頁 本紙張尺度適用中圉國家標準(CNS)A4規格(210 * 297公釐) -- 436965 A7 五、發明說明() 然而,應被暸解的是,附圖中所:展示的只是本發明之 典型的實施例’其不應被解讀為本發明之範圍的限制。 第1圖為前技基材之示意的部分剖面囷,其顯示在一具有 介層孔’不連續及一非平坦的表面之基材上的一經 過蝕刻的接點孔中的一隨機定向,晶粒微小的顆粒 沉積層; 第2圖為經過本發明處理之一基材之示意的部分剖面圖, 其顯示被沉積於一基材上且被一 N2/H2電漿處理過 的長晶屠1 第3圖為第2圖中之基材的一示意的部分剖面圖,其顯示 被沉積於該基材上之一保形的濕層; 第4圖為第3圖中之基材的一示意的部分剖面圖,其顯示 在低温下被沉積於該保形濕層上的一金屬層; 第5圖為適合對一基材實施CVD,PVD,及電漿處理之一 整合的多室設備的示意的部分剖面圖;及 第6圖為適合實施本發明之一電漿處理之CVD沉積室的 一示意的部分剖面圖。 圖號對照說明= {請先閲讀背面之泛意事項再填寫本頁) 裝--!11 訂-! — — 經濟部智慧財產局負工消f合作社印製 10 基材 11 孔 12 介電層 14 側壁 20 有圖案的介電質 21 基材 22 ε層(ΤίΝ層) 26 介廣孔 28 濕層(CVD Α1層) 30 銅層(PVD Α1層) 第9頁 私紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公8 ) Λ369 6 5 A77X This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) (Qi first read the precautions on the back before filling this page) Binding --------- A .. Ministry of Economy Wisdom Printed by the Consumer Cooperative of the Property Bureau 436965 A7 ______B7________ V. Description of the invention () Gas, or a combination of nitrogen and hydrogen Plasma treatment of the surface and surface to remove or reduce metal crystals or full layers' such as T i, T i N , Ta, TaN, Ni, NiV and V, oxidation. This treated surface provides excellent crystal growth for subsequent CVD or electroplated metallization processes used to fill contacts, vias, channels ’and other processes. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs < Please read the notes on the back before filling this page) In one aspect of the present invention, the '-Ti'TiN, Ta or TaN barrier layer is deposited by the metal And a layer formed by stuffing the deposited metal layer with an oxygen plasma. Then, a crystalline layer is formed on the surface of the barrier layer by plasma treatment of hydrogen, nitrogen, or a mixture thereof to remove oxygen and form discontinuities of Ti, TiN, Ta or TaN. A layer or a thin layer, which is hereinafter referred to as an e-layer, has a thickness of from several atoms to hundreds of angstroms. The subsequent metal layer deposited on the e-layer is preferably a wet layer of aluminum (A1) or copper (Cu) deposited by using a chemical vapor deposition technique or an electroplating technique. The wet layer can be deposited using PVD or CVD technology. It is best to use PVD technology to improve the quality and crystallization direction of the obtained film layer. Therefore, the wet layer can be exposed after the barrier layer is exposed to oxygen. Deposition. The plasma treated ε layer improves the squareness and morphology of the film layer by generating an automatic alignment effect in the film layer deposited on the e layer. Brief description of the invention: One of the invention is more specific The description of can be obtained by referring to the preferred embodiments shown in the appendix, so that the aforementioned features, advantages, and objects of the present invention can be understood in detail. Page 8 This paper is in accordance with China National Standard (CNS) A4 specification (210 * 297 mm)-436965 A7 V. Description of the invention () However, it should be understood that what is shown in the drawings: A typical embodiment of the invention 'It should not be interpreted as a limitation of the scope of the invention. Figure 1 is a schematic partial cross-section of a prior art substrate, showing a random orientation of an etched contact hole on a substrate with interlayer holes' discontinuous and a non-planar surface, Layers of tiny grain deposits; Figure 2 is a schematic partial cross-sectional view of a substrate that has been treated in accordance with the present invention, showing a wafer grown on a substrate and treated with an N2 / H2 plasma 1 FIG. 3 is a schematic partial cross-sectional view of the substrate in FIG. 2, which shows a conformal wet layer deposited on the substrate; FIG. 4 is a schematic view of a substrate in FIG. 3. A schematic partial cross-sectional view showing a metal layer deposited on the conformal wet layer at a low temperature; FIG. 5 is an integrated multi-chamber device suitable for performing one of CVD, PVD, and plasma treatment on a substrate And FIG. 6 is a schematic partial cross-sectional view of a CVD deposition chamber suitable for performing a plasma treatment according to the present invention. Drawing number comparison description = {Please read the general Italian matter on the back before filling this page) 11 Order-! — — Intellectual Property Bureau of the Ministry of Economic Affairs, Co-operative Printing f Co-operative print 10 Substrate 11 Hole 12 Dielectric layer 14 Side wall 20 Patterned dielectric 21 Substrate 22 ε layer (ΤίΝ layer) 26 Dielectric hole 28 Wet layer (CVD Α1 layer) 30 Copper layer (PVD Α1 layer) Page 9 Private paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 male 8) Λ369 6 5 A7

五、發明說明() 35 設備 36 PV: D 室 40 CVD室 45 室壁 50 室頂 55 處理氣體分佈器 65 基材支撐件 70 支撐件舉升風箱 75 舉升指總成 80 加熱器 95 處理區 105 阻障板 110 排出孔 115 排出系統 1 16 電漿產生器 發明詳細說明: 本發明提供一種形成小特徵尺叶’如四分之一微米寬 度’之典型地具有高的深寬比的插塞及互連線的方法。大 致上’本發明提供一種藉由在一經過處理的金屬廣’如 Tl’ ΉΝ’ Ta’ TaN,Ni,⑽或V,上沉積一金屬來形成 一插塞或互連線的方法。該經過電漿處理過的金屬屢,以 e層來表示,T以是非連續的。該金屬層可在兩步騾,如 包括一濕層,中被沉積用以填充接點,介層孔,渠道,及 其它圖案以形成插塞及互連線。 在本發明的一態樣中,該金屬是被沉積在一基材之一 有圖案的表面上,用以藉由使用PVD或CVD技術,最好 是用PVD技術,來形成一自我對齊層,一高方向性的膜 層可生長於該自我對齊層上。該阻障曾或長晶層然後可藉 由將該基材傳送至一非同地(ex situ)處理,如顧爐子退火 或快速熱處理(RTP)’而被氧化’或可藉由用以包含氧的 第10頁 本纸張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) I ^ I n ^nJ« n I n I i · 經濟部智慧財產局員工消费合作社印規 4369 6 5 A7V. Description of the invention (35) 35 equipment 36 PV: D chamber 40 CVD chamber 45 chamber wall 50 chamber ceiling 55 processing gas distributor 65 substrate support 70 support lifting bellows 75 lifting finger assembly 80 heater 95 processing Zone 105, baffle plate 110, discharge hole 115, discharge system 1 16 Plasma generator Detailed description of the invention: The present invention provides a plug with a small aspect ratio, such as a quarter micron width, which typically has a high aspect ratio. Plugging and interconnecting methods. In essence, the present invention provides a method for forming a plug or an interconnect by depositing a metal on a treated metal such as Tl ', ΉN', Ta, Ta, Ta, Ni, ⑽, or V. The plasma-treated metal is often represented by the e-layer, and T is discontinuous. The metal layer can be deposited in two steps, such as including a wet layer, which is deposited to fill contacts, vias, channels, and other patterns to form plugs and interconnects. In one aspect of the invention, the metal is deposited on a patterned surface of one of the substrates to form a self-aligned layer by using PVD or CVD technology, preferably PVD technology, A highly directional film layer can be grown on the self-aligned layer. The barrier or crystalline layer can then be 'oxidized' by transferring the substrate to an ex situ process, such as a furnace anneal or rapid thermal processing (RTP) or can be used to contain Page 10 of Oxygen This paper size is in accordance with China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) I ^ I n ^ nJ «n I n I i · Consumer Cooperative Cooperative Regulations of the Intellectual Property Bureau of the Ministry of Economic Affairs 4369 6 5 A7

經濟部智慧財產局具工消费合作社印製 五、發明說明() 電槳加以處理而被氧化,用以改善阻.障層特性。該基材然 友用包含氮氣,虱孔,或其混合物的電漿如以處理用以 去除一非連續或薄的e層的表面氧化。藉由將該電菜處理 分割成電漿處理循環並在每個循環之間將室排空而可在 一次大氣壓力下將該電漿處理強化。接下來,一濕層,招 (A1) ’銅(Cu)或其它導電材料’使用化學氣相沉積技術或 電鐘技術來加以沉積用以提供一大致保形的濕層。一金屬 層,如A1或Cu ’然後在一低溫,如$ 38〇。(:,下被沉積 於該濕層上’最好是使用物理氣相沉積技術。然而,化學 氣相沉積’電鐘或其它此技藝中所習知的金屬沉積技術亦 可被使用。 第2-4圖顯示一被形成於一基材21上之有圖案的介 電質20 ’如二氧化矽(Si〇2),的剖面圖,該基材具有被形 成於其上之本發明之依序的級階(step)。根據本發明的一 個態樣,該薄的e層22是被形成於基材的場區上及該介 層孔2 6中。與傳統的觀念相反的是,該可在該被沉積的 金屬以爐子退火或其它含氧的處理加以氧化之後再被形 成’因為該ε層是用氮/氫電漿加以處理,用以去除該表面 的氧化作用。在底層為珍或經摻雜的珍之Cu應用輿接點 應用中,一 TiN之連續的阻障層最好是被沉積用以防止 Cu’Al或其它的金屬擴散至底下的層中。連續的e層的 厚度最好是在50埃至200埃之間》 接下來’一薄的漁層2 8,如一A1或C u廣,係使用 一 CVD技術’如熱CVD處理,或電鍍來加以沉積的。該 第11頁 本紙張尺度適用+國國家標準(CNS)A4規格(210x297公楚> — I.--------- -t--------訂· (諝先Μ讀背面之ii意事項再填寫本頁) 4369 65 A7 B7 經 濟 部 智 慧 財 產 局 員 X 消 费 合 社 印 製 31、發明說明( 濕層被沉積於該場區上及加點’介層孔,或其它有圖案的 特徵中,用以提供在小孔中之良好的底部收斂及連續的級 階收敛’該孔可以是高深寬比的孔。插塞然後可使用PVD 或CVD技術,最好是PVD技術,如—溫熱的PVD A1或 Cu層30,來加以填入,以提供無空穴,低電阻係數的互 連線。最好是,該PVD技術為一溫熱(客38〇^ )金屬沉積 處理’其亦提供在該基材的場區上的平坦化。 詳言之’本發明在下文中將以一種形成一鋁插塞及互 連線的方法及設備來進行說明。然而’應被瞭解的是,本 發明並不局限於下文中所描述之特定的材料或處理。其它 具有相似的特性的材料及被用來沉積這些材料的處理亦 可根據本發明的精神及範圍被使用,首先,一個厚度從數 個原子到200埃之薄的長晶層22被沉積於一有圖案的基 材上,該基材典型地具有一被曝露出來的介電層。該長晶 層22最妤是包含Ti/TiN,但亦可只包含丁以。長晶層 可使用PVD或CVD技術來沉積,但最好是用pvD技術, 用以強化被沉積於其上之後續膜層的品質。PVD技術,如 標準的,瞄準的(c〇Uimated),或離子金屬電漿(IMp或高 批度電装)’都可被使用。IMp提供在非常小的深寬比特徵 中可提供非常良好的底部收斂性。較佳的長晶層順序包含 一 200埃單層的PVD Ti接著在其上沉積一 2〇〇埃單層的 TiN,而結合後的總厚度為4〇〇埃。此長晶層並不一定要 疋連續的,即整個肴圖案的表面比一定要被該長晶材料所 覆蓋。一薄的,不連續的長晶層能夠填充非常小的介層Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 5. Description of the Invention () The electric paddle is oxidized to improve the characteristics of the barrier layer. The substrate may be treated with a plasma containing nitrogen, lice, or a mixture thereof to remove a discontinuous or thin surface of the e-layer. The plasma treatment can be strengthened at one atmospheric pressure by dividing the electric dish treatment into a plasma treatment cycle and evacuating the chamber between each cycle. Next, a wet layer (A1) 'copper (Cu) or other conductive material' is deposited using a chemical vapor deposition technique or a clock technique to provide a substantially conformal wet layer. A metal layer, such as A1 or Cu ', then at a low temperature, such as $ 38. (:, Is deposited on the wet layer 'preferably using physical vapor deposition technology. However, chemical vapor deposition' electric clock or other metal deposition technology known in the art can also be used. 2 -4 shows a cross-sectional view of a patterned dielectric 20 'such as silicon dioxide (SiO2) formed on a substrate 21 having a substrate according to the invention formed thereon. According to an aspect of the present invention, the thin e-layer 22 is formed on the field region of the substrate and in the interstitial holes 26. Contrary to the traditional concept, the It can be formed after the deposited metal is oxidized by furnace annealing or other oxygen-containing treatments, because the ε layer is treated with a nitrogen / hydrogen plasma to remove the oxidation of the surface. On the bottom layer is precious Or in the application of doped precious Cu contacts, a continuous barrier layer of TiN is preferably deposited to prevent Cu'Al or other metals from diffusing into the underlying layer. The continuous e-layer The thickness is preferably between 50 angstroms and 200 angstroms. "Next 'a thin fishing layer 2 8 such as A1 or Cu It is deposited using a CVD technique, such as thermal CVD, or electroplating. The page 11 of this paper applies + National National Standard (CNS) A4 specification (210x297 Gongchu) — I .------ --- -t -------- Order · (I read the second notice on the back and then fill out this page) 4369 65 A7 B7 Member of the Intellectual Property Bureau of the Ministry of Economic Affairs X Printed by Consumer Cooperative 31. Description of the invention ( A wet layer is deposited on the field and dots are interstitial holes, or other patterned features, to provide good bottom convergence and continuous step convergence in small holes. The hole can be a high aspect ratio The plug can then be filled using PVD or CVD technology, preferably PVD technology, such as warm PVD A1 or Cu layer 30, to provide void-free, low-resistance interconnect lines. Preferably, the PVD technology is a warm (38 ^^) metal deposition process which also provides planarization over the field region of the substrate. In particular, the present invention will be described below in a form of forming an aluminum The method and equipment for plugs and interconnections are described. However, it should be understood that the present invention is not limited to the following The specific materials or processes described herein. Other materials with similar characteristics and processes used to deposit these materials can also be used in accordance with the spirit and scope of the present invention. First, a thickness ranging from several atoms to 200 angstroms. A thin growth layer 22 is deposited on a patterned substrate, which typically has an exposed dielectric layer. The growth layer 22 most preferably contains Ti / TiN, but may also contain only Ti / TiN Ding Yi. The crystal growth layer can be deposited using PVD or CVD technology, but it is best to use pvD technology to enhance the quality of subsequent film layers deposited on it. PVD technology, such as standard, targeted (c. Uimated), or ionic metal plasma (IMp or high-level electrical equipment) can be used. IMp provides very good bottom convergence in very small aspect ratio features. The preferred growth layer sequence includes a 200 Angstrom single layer of PVD Ti and then a 200 Angstrom single layer of TiN is deposited thereon, and the combined thickness is 400 Angstroms. This growth layer does not have to be continuous, that is, the surface ratio of the entire food pattern must be covered by the growth material. A thin, discontinuous growth layer can fill very small interposers

笫12T —----------_t--------訂. <靖先閲讀背面之;!.意事項再填寫本頁> 經濟部智慧財產局員工消費合作社印製 4369 65 A7 -----B7__五、發明說明() 孔。 、 該基材然後可被送至另一平台或被曝露於氧中用以 氧化該TiN層22。TiN層22的氧化是藉由用一含有氛, 氫,或它們的混合物之電漿對其處理而加以去除的。該電 漿最好是藉由施加在200KHZ至16MHz之500至2000瓦 的射頻而產生的。對於200mm的基材而言,氮氣的流率 最好是在1 00至5OOsccxn的範圍内及氫氣的流率最好是在 100至500seem的範圍内。該電漿處理有效地在! 〇到15〇 秒之内清洗,處理,及/或改變該TiN層表面。最好是該 氮/氫電漿在一或多個處理循環中被產生且在每一循環之 間被清除。四個超過3 5秒鐘的處理循環可有效地從被曝 露於一氡電漿中之TiN表面上去除掉氧。 接下來,CVD A1層28被沉積於該長晶廣上,使用 DMAH作為先驅物氣體之熱解離。最好是10〇埃至2〇〇〇 埃的CVD A1(視介層孔的尺吋而定)被保形地沉積於該有 圖案的表面上用以提供一連續的濕層2 8以供後續圖案的 填充之用。 接下來,一 CVD A1層30或合金使用溫熱的PVD技 術在基材溫度低於380°C的溫度下被沉積使得溫熱的A1 被沉積於該基材上然後流入該接點,介層孔,渠道,或其 它的圖案中。該PVD溫熱的A1處理最好是在一基材溫度 低於38CTC的條件下所實施的一低溫沉積處理。該PVD處 理是藉由將該基材加熱至250°C至500°C的溫度範圍内來 實施的。一從〇.2mTorr至1 OmTorr的壓力被保持且一.隋 第13貫 本紙張尺度適用中國國家標準(CNS^4規格(210 * 297 f爱] " ' (請先閱讀背面之沒意事項再填寫本頁) 436965 A7 五、發明說明() 性氣體,如氬氣,於5SCcm至80sccrn的速率下被引入。 來自於100瓦至20千瓦的一直流偏壓能量被供應至該標 靶’而該基材支撐件及該室的室壁則被接地。一鋁標靶被 进射約 3000Ws 至 6〇0〇〇〇〇Wse 一鋁銅膜層或其它經過摻雜的材料被沉積於該所獲 得的金屬層以允許銅或其它的摻質遷移於整個金屬層。在 本文中被描述的處理程序特別適用於將一高方向性之導 電材料結晶層沉積於被蝕刻於絕緣層(如二氧化矽,硼磷 玻璃(PSG)或硼磷矽玻璃(bpSG)層)中之高深寬比接點及 介層孔中。 該被平坦化的金屬PVD層最好是在大於1 50°C,更佳 的是大於250°C ’但低於38〇t的處理溫度下形成°為了 要達到該金屬層的平坦化,該PVD金屬膜層最好是緊接 於該濕式CVD金屬膜層的沉積之後。於大於250°C的溫度 下形成的該PVD金屬層的晶粒生長表現出可吸收於CD金 屬沉積期間於該基材的場區所形成的結瘤塊或其它的瑕 疵之晶粒生長。該溫熱的PVD金屬層可包含銅或其它摻 質的痕跡(trace)數量。 經濟部智慧財產局員工消費合作社印製 .II:---------裝--------訂. (請先閲讀背面之注意事項再填寫本頁) 適於實施本發明的CVD,PVD,及電漿處理步驟之一 多室處理設備35的示意圖被示於第5®中。該設備為一 設在美國加州Santa Clara市的Applied Materia丨s公司所 出產的”Endura"系統。示於本文中之設備35之該特定的實 施例適於處理平面基材’如半導體基材,且是被用來說明 本發明’且不應被用來限制本發明的範圍。設備3 5典型 第14頁 本紙張尺度適用中囷a家標準(CNS>A4規格(210 X 297公釐) 436965 A7 B7 經濟部智慧財產局貝工消費合作社印製 五、發明說明( 地包含一叢集的互連處理室,例如,、CVD及PVD沉積及 快速熱退火室。 社備3 5最好是包含至少一圍起來的PVD沉積室3 6 用以實施PVD處理,如濺射。該PVD室36包含一濺射標 把(未示出)用以賤射面向該基材的滅射材料。該標把與該 室被電氣地隔離且作為一處理電極用以產生一濺射電 漿。在歲射處理期間,一嫂艘氣艘,如氬或兔,被引入該 室36中。一直流偏壓被施加於該漱射標乾上,在該室中 之基材支撑件則被接地。在該室3 6中所獲得的電場將液 射氣體離子化用以形成一濺射該標靶造成該材料沉積於 該基材上之一濺射電漿。在賤射處理中,該電漿典型地是 藉由施加一直流電或功率在100至20000瓦之間,更特定 地是在100至10000瓦之間,之射頻電壓而產生的。 該設備亦包含一 CVD沉積室40(示於第5及6圏中), 其具有環繞的侧壁45及室頂50。該室40包含—處理氣體 分佈器55用來將處理氣體分佈於該室中。質量液控制器 及氣動閥被用來控制流入該處理室40中之處理氣體的流 量°該基材是經由一在該室40的側壁45中的—基材装載 入口而被引入該室40中且被置於該支撐件65上。該支撑 件65可被支撐舉升風箱70升高或降低,使得介於該基材 與該氣體分佈器55之間的間隙可被加以調整。—勺含了 被插入到該支轉件65的透孔中之舉升指之舉升指:總成 75可被用來將該基材升高或降下至該支撐件上以方便該 基材裝入該室40中或由該室40中取出 第15頁 私紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公爱) 如熱器8〇 ί;--------- ' Κ.--------訂- (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 436965 A7 ___B7__五、發明說明() 被提供於該室中用以快速地對該基计加熱。基材的快速加 熱及冷卻對於提高處埋的產出率是較佳的,且可允許在相 同的室65中的不同的溫度下操作之連續的處理之間•的快 速循環。該基材的溫度是由該支撐件65的溫度加以大致 的估計》 該基材是在一位在一水平的有孔的阻障板1〇5之上之 處理區95中被處理的。該阻障板丨05具有排出孔11〇其 與一用來將使用過的處理氣體從該室40中排出之排出系 統Π 5成流體的聯通。一典型的排出系統1丨5包括一能夠 達到一最’]、真空為lOmTorr之輪葉真空幫浦(未示出),及 非必要地一滌氣系統用以濾除掉副產物氣體。在該室4〇 中的壓力是在基材侧被偵測且藉由調整在該排出系統1 i 5 中的一節流閥來加以控制的。 一電漿產生器Π6被提俜來產生在該室40中之處理 區95内的一電漿’用以電漿處理該TiN層或電漿強化的 化學氣相沉積處理。該電漿產生器116可⑴藉由施加一射 頻電流至一環繞該沉積室之電感線圏(未示出)而電感地產 生一電漿,(ii)藉由施加一射頻電流至在該室中之處理電 極而電阻地產生一電漿,或(iii)在該室的室壁或其它的電 極被接地時,同時電感地及電阻地產生一電漿。一在功率 介於750至2 000瓦之間的一直流或射頻電流可被施加至 —電感線圈(未示出)用以電感地將能量耦合至該沉積智中 用以在該處理區95中產生電漿。當一射頻電流被使用時, 射頻電流的頻率典型地是由400KHz至16MHz,及更佳地 第16頁 <諳先Μ讀背面之泫意事項再填寫本頁> 本紙張尺度適用中國囿家標準(CNS)A4規格(21〇 X 297公釐〉 Α7 Β7 五、發明說明() 為13.56MHz。非必要地,一氣體污染或電漿聚焦環(未示 出)’典型地是由鋁氧化物或石英所製成,可被用來容納 處理氣體流或環繞在該基材的電漿^ 銅可藉由無電極的電鍍而被沉積於該基材上用以形 成接線及互連線。首先,一阻障層可使用PVD或CVD的 方法而被形成於一有圖案的基材上。該阻障層是是由TiN 所組成且可防止銅擴散至該二氧化矽層或其它的介電唐 中。此外,該阻障層可作為一長晶層,在該無電極電鍍處 理中的銅可生長於其上。當該基材具有—阻障層及一長晶 層被形成於其上時,該基材即被引入—電鍍浴中,沉積即 在該電鍍浴中進行。該銅最好是從一包含四甲接化氮氧 (TMAH)的溶液中被沉積的。該無電極沉積溶液的成分於 表I中列出。 l·,-裝--------訂 C請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局具工消費合作社印製 表I 成分 功用 數量(範圍) CuS045H20 供應铜離子 0.05-0.1M ---— N(CH3)4〇H 供應電子 0.05-1 0M EDTA 絡合劑 0 1 Μ HCOH(或) 還原劑 0 01-0 1 Μ N(CH3)4CH 絡合劑 0-0.01Μ 影響形態表面活化呼| GAF RE-610 降低表面張力 0.5-2% 第17頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐ΐ — 經濟部智慧財產局員工消費合作社印製 436965 A7 _ 87_五、發明說明() 從一含有TMAH的溶液被沉積'的銅被發現可產出具 有低於1.7 // Ω cm的電阻係數之品質良好的薄膜。此無電 極的電鍍沉積處理被進一步說明於期刊Thin Solid Films 第 262 期(1995)93-103 頁的"Electroless Copper Deposition for ULSI1’一文中。 例1 本發明的一個例子是用兩個分開來由 Applied Materials公司所出產的的ENDURA®平台來實施的。第一 個平台包含一 IMP鈦室及一相連貫的TiN室"第二個平台 包含一 CVD電漿處理室,一 CVD A1室及一 PVD A1室。 一具有次0.3微米之具有24:1的深寬比的接點'介層孔, 渠道,及其它圖案被引入該系統中。一約400埃的鈦於該 Coh-Ti室中被沉積於該有圖案的晶圓上。該Ti對於形成 在該互連線的底部上之氧而是作為一吸氣(getter)材 料。接下來,該晶圓被移入該TiN室,一 150埃的ΉΝ層 於該室中被沉積於該Ti層上用以提供阻障層及£屠。基 下來’該晶圓從該室中被移出约30分鐘讓該ήν層氧化。 該晶圓然後用四個3 5秒鐘的循環用氮/氩電聚來處理 達140秒鐘,每一循環形成該ε層於該阻障層的表面上, 在每一電漿循環之後,反應產物從該室中被清除β氮的流 率為200sccm及氫的流率為300sccm。電漿是用在350ΚΗΖ 下的7 5Ό射頻功率來產生的◊該晶圓然後被送至該該c v D A1室,一 9〇〇〇埃的AI在晶圓溫度為450°C的條件下用2Kw 第18頁 — I.--------- _t--------訂· (諳先閲讀背面之注恚事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS)A4規袼(2〗0 X 297公釐) 4369 6 5 A7 _B7__ 五、發明說明() 的功率施加約260秒於該室中被沉積。電子顯微照像顯示 良好的級階覆蓋性及接點,介層孔,渠道,及其它圖案的 無空穴填充。 例2 (比較) 為了比較,例1在沒有氫/氮電漿處理步驟之下被重 復。電子顯微照像顯示接點,介層孔,渠道及其它圖案的 填充性能顯著地降低,很可能是CVD A1層在該氧化的TiN 層上的長晶降低所造成的結果。 雖然前述是有關於本發明的較佳實施例,但本發明之 其它及進一步的實施例可在不偏離本發明的基本範圍下 被完成。本發明的範圍是由以下的申請專利範圍所界定。 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消f合作社印製 第19頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)笫 12T -----------_ t -------- Order. ≪ Jing first read the back;!. Implement matters before filling out this page > Intellectual Property Bureau Staff Consumer Cooperatives Printing 4369 65 A7 ----- B7__ V. Description of the invention () Hole. The substrate may then be sent to another platform or exposed to oxygen to oxidize the TiN layer 22. The oxidation of the TiN layer 22 is removed by treating it with a plasma containing atmosphere, hydrogen, or a mixture thereof. The plasma is preferably generated by applying a radio frequency of 500 to 2000 watts at 200 kHz to 16 MHz. For a 200 mm substrate, the flow rate of nitrogen is preferably in the range of 100 to 500 scccxn and the flow rate of hydrogen is preferably in the range of 100 to 500 seem. The plasma treatment effectively works! The TiN layer surface is cleaned, treated, and / or changed within 0 to 15 seconds. Preferably, the nitrogen / hydrogen plasma is generated in one or more processing cycles and is purged between each cycle. Four processing cycles of more than 35 seconds can effectively remove oxygen from the surface of TiN exposed to a stack of plasma. Next, a CVD A1 layer 28 is deposited on the crystals, and thermal dissociation is performed using DMAH as a precursor gas. CVD A1 (depending on the size of the via hole), preferably between 100 angstroms and 2000 angstroms, is deposited conformally on the patterned surface to provide a continuous wet layer 28 for For the filling of subsequent patterns. Next, a CVD A1 layer 30 or alloy is deposited using warm PVD technology at a substrate temperature below 380 ° C so that warm A1 is deposited on the substrate and then flows into the contact, interposer. Holes, channels, or other patterns. The PVD warm A1 treatment is preferably a low-temperature deposition treatment carried out under the condition that the temperature of the substrate is lower than 38CTC. The PVD treatment is performed by heating the substrate to a temperature range of 250 ° C to 500 ° C. -The pressure from 0.2mTorr to 1 OmTorr is maintained and one. The 13th Sui paper size applies the Chinese national standard (CNS ^ 4 specifications (210 * 297 f love) " '(Please read the unintentional matter on the back first) (Fill in this page again) 436965 A7 V. Description of the invention () A gas such as argon is introduced at a rate of 5SCcm to 80sccrn. A DC bias energy from 100W to 20kW is supplied to the target ' The substrate support and the wall of the chamber are grounded. An aluminum target is injected at about 3000Ws to 60,000Wse. An aluminum-copper film or other doped material is deposited on the substrate. The obtained metal layer allows copper or other dopants to migrate throughout the metal layer. The processing procedure described herein is particularly suitable for depositing a highly directional layer of a crystalline layer of conductive material on an insulating layer (such as two High aspect ratio contacts and vias in silicon oxide, borophosphosilicate glass (PSG) or borophosphosilicate glass (bpSG) layers. The planarized metal PVD layer is preferably greater than 150 ° C, It is more preferable to form ° at a processing temperature greater than 250 ° C but below 38 ° t. To achieve planarization of the metal layer, the PVD metal film layer is preferably immediately after the deposition of the wet CVD metal film layer. The grain growth performance of the PVD metal layer formed at a temperature greater than 250 ° C Grain growth that can absorb nodules or other defects formed in the field region of the substrate during CD metal deposition. The warm PVD metal layer may contain copper or other doped traces Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. II: --------- Installation -------- Order. (Please read the precautions on the back before filling this page) Suitable for implementation A schematic diagram of the multi-chamber processing equipment 35 of one of the CVD, PVD, and plasma processing steps of the present invention is shown in Section 5®. This equipment is manufactured by Applied Materia 丨 s, Santa Clara, California, USA. " Endura " System. This particular embodiment of the device 35 shown herein is suitable for processing planar substrates such as semiconductor substrates and is used to illustrate the invention and should not be used to limit the scope of the invention. Equipment 3 5 typical p. 14 This paper is in accordance with China Standard (CNS > A) 4 Specifications (210 X 297 mm) 436965 A7 B7 Printed by Shelley Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the Invention (The ground contains a cluster of interconnected processing chambers, such as CVD and PVD deposition and rapid thermal annealing chambers The equipment 35 preferably includes at least a surrounding PVD deposition chamber 3 6 for performing PVD processing, such as sputtering. The PVD chamber 36 includes a sputtering target (not shown) for facing the surface. Emissive material for the substrate. The marker is electrically isolated from the chamber and acts as a processing electrode to generate a sputtering plasma. During the firing process, an airship, such as argon or rabbit, is introduced into the chamber 36. A DC bias is applied to the shower target and the substrate support in the chamber is grounded. The electric field obtained in the chamber 36 ionizes the liquid gas to form a sputtering plasma that sputters the target and causes the material to be deposited on the substrate. In low-frequency processing, the plasma is typically generated by applying a radio frequency voltage of DC power or power between 100 and 20,000 watts, more specifically between 100 and 10,000 watts. The apparatus also includes a CVD deposition chamber 40 (shown in Sections 5 and 6), which has surrounding sidewalls 45 and a ceiling 50. The chamber 40 contains a process gas distributor 55 for distributing the process gas in the chamber. A mass liquid controller and a pneumatic valve are used to control the flow rate of the process gas flowing into the processing chamber 40. The substrate is introduced into the chamber via a substrate loading inlet in the side wall 45 of the chamber 40 40 and placed on the support 65. The support member 65 can be raised or lowered by the support lifting bellows 70 so that the gap between the substrate and the gas distributor 55 can be adjusted. —The spoon contains the lifting fingers inserted into the through holes of the support member 65. The lifting fingers: the assembly 75 can be used to raise or lower the substrate onto the support to facilitate the substrate. Installed in or removed from the chamber 40. The private paper size on page 15 applies to China National Standard (CNS) A4 (210 X 297 public love), such as a heater 8〇ί; -------- -'Κ .-------- Order- (Please read the notes on the back before filling this page) Printed by the Intellectual Property Bureau Staff Consumer Cooperative of the Ministry of Economic Affairs 436965 A7 ___B7__ V. Description of Invention () is provided on This chamber is used to quickly heat the meter. The rapid heating and cooling of the substrate is better for increasing the yield of the burial, and may allow a rapid cycle between successive processes operating at different temperatures in the same chamber 65. The temperature of the substrate is roughly estimated from the temperature of the support member 65. The substrate is processed in a processing area 95 above a horizontal perforated barrier plate 105. The barrier plate 05 has a discharge hole 11 which is in fluid communication with a discharge system Π5 for discharging the used processing gas from the chamber 40. A typical exhaust system 1-5 includes a vane vacuum pump (not shown) capable of reaching a maximum ', a vacuum of 10 mTorr, and optionally a scrubbing system for filtering out by-product gases. The pressure in the chamber 40 is detected on the substrate side and is controlled by adjusting the throttle valve in the discharge system 1 i 5. A plasma generator Π6 is lifted to generate a plasma ' in a processing area 95 in the chamber 40 for plasma treatment of the TiN layer or plasma enhanced chemical vapor deposition process. The plasma generator 116 can inductively generate a plasma by applying a radio frequency current to an inductance line (not shown) surrounding the deposition chamber, and (ii) by applying a radio frequency current to the chamber. In the process, the electrode generates a plasma resistively, or (iii) when the wall of the chamber or other electrodes are grounded, a plasma is generated inductively and resistively. A DC or RF current between 750 and 2,000 watts of power can be applied to an inductive coil (not shown) to inductively couple energy to the deposition chamber for use in the processing area 95 Generate plasma. When a radio frequency current is used, the frequency of the radio frequency current is typically from 400 KHz to 16 MHz, and more preferably on page 16 < read the intentions on the back before filling out this page > Home Standard (CNS) A4 specification (21 × 297 mm> A7 B7 V. Description of the invention () is 13.56MHz. Unnecessarily, a gas pollution or plasma focus ring (not shown) 'is typically made of aluminum Made of oxide or quartz, which can be used to hold a process gas stream or a plasma surrounding the substrate ^ Copper can be deposited on the substrate by electrodeless plating to form wiring and interconnects First, a barrier layer can be formed on a patterned substrate using PVD or CVD. The barrier layer is composed of TiN and can prevent copper from diffusing into the silicon dioxide layer or other Dielectric Tangzhong. In addition, the barrier layer can be used as a growth layer on which copper can be grown in the electrodeless plating process. When the substrate has a barrier layer and a growth layer formed on When it is there, the substrate is introduced into the electroplating bath, and the deposition is conducted in the electroplating bath. OK. The copper is preferably deposited from a solution containing tetramethylene nitrogen oxide (TMAH). The composition of the electrodeless deposition solution is listed in Table I. --- Order C, please read the notes on the back before filling out this page) Printed by I, Intellectual Property Bureau, Ministry of Economic Affairs, Industrial Cooperatives, Co., Ltd. I Component Function Quantity (Range) CuS045H20 Supply Copper Ions 0.05-0.1M ----- N ( CH3) 4〇H Supply electrons 0.05-1 0M EDTA complexing agent 0 1 Μ HCOH (or) reducing agent 0 01-0 1 Μ N (CH3) 4CH complexing agent 0-0.01Μ Affect morphological surface activation | GAF RE-610 Reduce surface tension by 0.5-2%. Page 17 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mmΐ) — printed by the Consumers ’Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 436965 A7 _ 87_ V. Description of the invention ( ) Copper was deposited from a solution containing TMAH and was found to produce good quality films with a resistivity below 1.7 // Ω cm. This electrodeless electrodeposition process is further described in the journal Thin Solid Films. 262 (1995) 93-103 " Electroless Copper Deposition for ULS I1 '. Example 1 An example of the present invention was implemented using two separate ENDURA® platforms produced by Applied Materials. The first platform includes an IMP titanium chamber and a continuous TiN chamber & quot The second platform includes a CVD plasma processing chamber, a CVD A1 chamber, and a PVD A1 chamber. A contact, interposer, channel, and other pattern with an aspect ratio of 24 to 1 having a sub-0.3 micron is introduced into the system. About 400 Angstroms of titanium was deposited on the patterned wafer in the Coh-Ti chamber. The Ti acts as a getter for oxygen formed on the bottom of the interconnect. Next, the wafer was moved into the TiN chamber, and a 150 Angstrom layer was deposited on the Ti layer in the chamber to provide a barrier layer and a wafer. Basically, the wafer is removed from the chamber for about 30 minutes to allow the price layer to oxidize. The wafer was then treated with nitrogen / argon electropolymerization in four 35-second cycles for 140 seconds. Each cycle formed the ε layer on the surface of the barrier layer. After each plasma cycle, The flow rate of β nitrogen from the reaction product being removed from the chamber was 200 sccm and the flow rate of hydrogen was 300 sccm. Plasma is generated using 7 5 RF power at 350KΗZ. The wafer is then sent to the cv D A1 chamber. An AI of 9,000 angstroms is used at a wafer temperature of 450 ° C. 2Kw Page 18 — I .--------- _t -------- Order · (谙 Please read the notes on the back before filling out this page) This paper size applies to Chinese National Standards (CNS ) A4 gauge (2〗 0 X 297 mm) 4369 6 5 A7 _B7__ 5. Description of the invention () The power of about (260) seconds was deposited in the chamber. Electron micrographs show good step coverage and void-free filling of contacts, vias, channels, and other patterns. Example 2 (comparative) For comparison, Example 1 was repeated without a hydrogen / nitrogen plasma treatment step. Electron micrographs show that the filling performance of contacts, vias, channels, and other patterns is significantly reduced, most likely as a result of the reduced growth of the CVD A1 layer on the oxidized TiN layer. Although the foregoing relates to the preferred embodiments of the present invention, other and further embodiments of the present invention may be completed without departing from the basic scope of the present invention. The scope of the present invention is defined by the following patent application scope. (Please read the precautions on the back before filling out this page) Printed by the Consumers' Association of Intellectual Property Bureau, Ministry of Economic Affairs, page 19 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

436 9 6 5 經濟部智慧財產局員工消費合作社印製 A8 B8 C8 D8六、申請專利範圍 1. 一種處理一基材的方法,其至少包含以下的步驟: (a) 沉積一長晶層於該基材上, (b) 將該長晶層曝露於一含有氮,氫,或它們的混合 物的電漿中至少兩個循環;及 (c) 將一金屬層沉積於該長晶層上。 2. 如申請專利範圍第1項所述之方法,其中該長晶層在步 驟(b)之前被曝露於氧中。 3. 如申請專利範圍第2項所述之方法,其中該長晶層是藉 由物理氣相沉積技術而被沉積的。 4. 如申請專利範圍第3項所述之方法,其中被沉積於該長 晶層上之該金屬層是一由包含鋁,銅或它們的組合的組 群中所選取的材料所組成的。 5 .如申請專利範圍第1項所述之方法,其中該電漿是由氮 及氩的混合物所構成。 6. 如申請專利範圍第1項所述之方法,其中沉積一金屬層 的步驟包含首先沉積一 CVD濕層及接著沉積一 PVD導 電層。 7. 如申請專利範圍第1項所述之方法,其中該長晶層及該 第20頁 --_--------參------1T------t (請先閱讀背面之注意事項再填寫本f ) 本紙張尺度適用中國國家揉準(CNS )戍4说格(2I0X297公釐) 經濟部智慧財產局員工消費合作社印髮 4369 6 5 a8 B8 CS D8六、申請專利範圍 金屬層是在位於不同的半導體處:理平台上之分開來的 室中被沉積的。 8. —種處理一基材的方法,其至少包含以下的步驟: (a) 沉'積 Ti ’ TiN,Ta,TaN,Ni,NiV 或 V 阻障層於 該基材上; (b) 將該阻障層曝露於氧中; (c) 將該阻障層曝露於一含有氮,氫,或它們的混合 物的電漿中至少兩個循環以形成一長晶層; (d) 沉積一濕層於該長晶層上,及 (e) 沉積一導電層於該濕層上。 9. 如申請專利範圍第8項所述之方法,其中該濕層是由 鋁,銅,或它們的組合所構成。 1 0.如申請專利範圍第9項所述之方法,其中該導電層是由 鋁,銅,或它們的組合所構成。 1 1.如申請專利範圍第8項所述之方法,其中該阻障層是藉 由將該基材從一包含一第一處理區之第一處理平台移 送至一包含一第二處理區之第二處理平台而被曝露於 氧中。 1 2.如申請專利範圍第8項所述之方法,其中該阻障層是在 第21貫 --^-----— 1^.------訂.------^ (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家梯準{ CNS ) A4規格(210X297公釐) 436965 A8 B8 CS D8 經濟部智慧財產局員工消黄合作社印製 々、申請專利範圍 用一包含氧的電漿處理該阻障層期間被曝露於氧中。 1 3 如申請專利範圍第8項所述之方法,其中該阻障層是在 爐子退火期間被曝露於氧中。 1 4.如申請專利範圍第8項所述之方法,其中該電漿是由氮 及氫的混合物所構成。 1 5.如申請專利範圍第8項所述之方法,其中該長晶層包含 TiN。 1 6.如申請專利範圍第8項所述之方法,其中該導電層是在 大於2 5 0 °C的溫度下被沉積的。 17. —種處理一基材的方法,其至少包含以下的步驟: (a) 將一基材導入一第一處理區中; (b) 沉積一 Ti層於該基材上; (c) 將該基材導入一第二處理區中; (d) 沉積一 TiN層於該Ti層上; (e) 將該TiN層氧化: (f) 將該基材導入一第三處理區中; (g) 將該氧化的TiN層曝露於一含有氮,氫,或它們 的混合物的電漿中; (h) 將該基材導入一第四處理區中; 第22頁 ----K--------^丨 — (請先ΜΪ*背面之注意^項再填寫本頁) . 本紙張尺度逋用中國國家揉準(CNS ) A4規格(210X297公釐) 436965 ABCD ~、申請專利範圍 (i) 沉積一 CVD鋁層於該TiN層上; (j) 將該基材導入一第五處理區中;及 (k) 沉積一 PVD鋁層於該CVD層上。 1 8.如申請專利範圍第1 7項所述之方法,其中該TiN層是 藉由將該基材從一包含該第一處理區及該第二處理區 之第一處理平台移送至一包含該第三處理區之第二處 理平台而被曝露於氧中。 1 9.如申請專利範圍第1 7項所述之方法,其中該TiN層是 在用一包含氧的電漿處理該 TiN層期間被曝露於氧 中 。 20.如申請專利範圍第1 7項所述之方法,其中該TiN層是 在爐子退火期間被曝露於氧中。 --,'---------^------ΐτ------.A (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 第23頁 本紙張尺度逍用中國國家標準(CNS) A4規格(210X297公釐)436 9 6 5 Printed by A8, B8, C8, D8, Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 6. Application for a patent 1. A method for processing a substrate, including at least the following steps: (a) depositing a crystal layer on the substrate On the substrate, (b) exposing the crystal growth layer to a plasma containing nitrogen, hydrogen, or a mixture thereof for at least two cycles; and (c) depositing a metal layer on the crystal growth layer. 2. The method as described in item 1 of the scope of patent application, wherein the crystal growth layer is exposed to oxygen before step (b). 3. The method according to item 2 of the scope of patent application, wherein the crystalline layer is deposited by a physical vapor deposition technique. 4. The method as described in claim 3, wherein the metal layer deposited on the crystalline layer is composed of a material selected from the group consisting of aluminum, copper, or a combination thereof. 5. The method according to item 1 of the scope of patent application, wherein the plasma is composed of a mixture of nitrogen and argon. 6. The method according to item 1 of the patent application, wherein the step of depositing a metal layer comprises firstly depositing a CVD wet layer and then depositing a PVD conductive layer. 7. The method according to item 1 of the scope of patent application, wherein the crystal growth layer and the page 20 ----------- see ----- 1T ------ t (Please read the notes on the back before filling in this f) This paper size is applicable to China National Standards (CNS) 戍 4 grid (2I0X297 mm) Issued by the Intellectual Property Bureau Staff Consumer Cooperatives of the Ministry of Economic Affairs 4369 6 5 a8 B8 CS D8 6. Scope of Patent Application The metal layer is deposited in a separate chamber located on a different semiconductor: processing platform. 8. A method for treating a substrate, comprising at least the following steps: (a) depositing a barrier layer of Ti ', Ti, Ta, TaN, Ni, NiV or V on the substrate; (b) applying The barrier layer is exposed to oxygen; (c) the barrier layer is exposed to a plasma containing nitrogen, hydrogen, or a mixture of at least two cycles to form a crystalline layer; (d) a wet deposit is deposited Layer on the growth layer, and (e) depositing a conductive layer on the wet layer. 9. The method of claim 8 in which the wet layer is composed of aluminum, copper, or a combination thereof. 10. The method according to item 9 of the scope of patent application, wherein the conductive layer is composed of aluminum, copper, or a combination thereof. 1 1. The method as described in item 8 of the scope of patent application, wherein the barrier layer is moved by transferring the substrate from a first processing platform including a first processing area to a substrate including a second processing area. The second processing platform was exposed to oxygen. 1 2. The method as described in item 8 of the scope of patent application, wherein the barrier layer is on the 21st-^ ------- 1 ^ .------ order .----- -^ (Please read the notes on the back before filling in this page) This paper size is applicable to China National Standard (CNS) A4 size (210X297 mm) 436965 A8 B8 CS D8 2. The scope of the patent application is exposed to oxygen during the treatment of the barrier layer with a plasma containing oxygen. 13 The method as described in item 8 of the scope of patent application, wherein the barrier layer is exposed to oxygen during furnace annealing. 14. The method according to item 8 of the scope of patent application, wherein the plasma is composed of a mixture of nitrogen and hydrogen. 1 5. The method according to item 8 of the scope of the patent application, wherein the growth layer comprises TiN. 16. The method according to item 8 of the scope of patent application, wherein the conductive layer is deposited at a temperature greater than 250 ° C. 17. A method for processing a substrate, comprising at least the following steps: (a) introducing a substrate into a first processing zone; (b) depositing a Ti layer on the substrate; (c) applying The substrate is introduced into a second processing zone; (d) a TiN layer is deposited on the Ti layer; (e) the TiN layer is oxidized: (f) the substrate is introduced into a third processing zone; (g) ) Exposing the oxidized TiN layer to a plasma containing nitrogen, hydrogen, or a mixture thereof; (h) introducing the substrate into a fourth processing zone; page 22 ---- K --- ----- ^ 丨 — (please note the ^ items on the back of the page before filling in this page). This paper size uses the Chinese National Standard (CNS) A4 specification (210X297 mm) 436965 ABCD ~, patent application scope (i) depositing a CVD aluminum layer on the TiN layer; (j) introducing the substrate into a fifth processing zone; and (k) depositing a PVD aluminum layer on the CVD layer. 18. The method as described in item 17 of the scope of patent application, wherein the TiN layer is transferred from a first processing platform including the first processing region and the second processing region to a substrate including the TiN layer. The second processing platform of the third processing zone is exposed to oxygen. 19. The method according to item 17 of the scope of patent application, wherein the TiN layer is exposed to oxygen during the treatment of the TiN layer with a plasma containing oxygen. 20. The method of claim 17 in the scope of the patent application, wherein the TiN layer is exposed to oxygen during furnace annealing. -, '--------- ^ ------ ΐτ ------. A (Please read the precautions on the back before filling out this page) Employees ’Cooperatives, Intellectual Property Bureau, Ministry of Economic Affairs Printed on page 23 This paper is a Chinese standard (CNS) A4 (210X297 mm)
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EP1084512A1 (en) 2001-03-21
JP2002517903A (en) 2002-06-18
WO1999063593A1 (en) 1999-12-09
KR20010052610A (en) 2001-06-25
US6297147B1 (en) 2001-10-02

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