434809 A7 B7 五、發明説明（ 5 10 15 經濟部中央標準局員工消费合作社印聚 20 、本發明係有關於心於半導體元件中形成—絕緣層的方 法’更特別地，係有關於用於以HSQ (氫石夕倍半曱烧 (hydrogen SliSes取i〇xane))形成一由 s如層（玻璃 上有矽（s：LliC0n 〇n glass))製成之氧化矽層在一具有 半導體元件之晶圓上的方法，俾可防止位元線從以習知 APCVD (大氣壓力化學氣相沉積法）填注在該晶圓上之元件 間之間f時出現的孔洞跨接出來，其中，在該等元件之間 的間P岽疋在〇·18μιη之下巾HSQ係用於填注材料俾 一穩定的内層介電材料。 本發明主要係關於元件藉著將間隙填注SOG攻變成具 有Ar+之離子植入之抗用以打開接觸孔 之熱處理和料則彳之化學藥品的穩定性。 通常，氧化矽係使用於由CVD或者積體電路之矽基體 或多晶石夕之開放部份的氧化/生長所形成的絕緣層。 然而’通常在平坦化製程中，氧化梦層賴著把作為來 源之氧化碎的塗佈材料在積體電路結構上流動來被形成。 象Q(氫石夕倍半甲貌）般之以石夕炫:氫化物為基底的塗 佈材料β為氧化石夕的來源，係被使用於形成一氧化石夕層 在一積體電路結構上。 作為積體電路結構上之塗佈材料㈣炫ll化物或者HSQ ’稱為Η-樹脂，si〇2先驅業已被發現在要被塗佈的表面上 係，動良好’包括階梯表面’並且提供高產量的Si〇2，而 且提供具有低碳含量的si〇2層。該塗佈材料，在初始乾燥 以移去施加該塗佈材料到該積體電路結構時所使用的溶劑 第4頁 11 n^i 1— - t^n ........ —1 (½先閲ti背面之注意事項再填寫本頁) -訂 本紙張尺度適用中圏國家標準（CNS ) M規推（2 j 〇 X297-i>t ) 經清部中央梯準局負工消费合作社印黎 434809 A7 1 ----—>_B7 1五、發明説明（2 ) — ' 之後，係藉著從大約2〇〇°c加熱到1000°c的溫度來被硬化 以形成希望的Si〇2陶層。 雖然使用如此的石夕烷氫化物或者HSQ塗佈材料作為於 積體電路結構上之Si〇2層之形成的先驅係符合某些結果， 5然而，它並非沒有其之問題。在這方面，該材料為該乾燥 塗佈材料至Si〇2之不完全轉換的不完全硬化’在該塗佈材 料被施加到一階梯表面上時業已被注意到。特別地，當該 塗佈材料被施加到緊密分隔的階梯，或者在狹窄的渠溝時 ，在該渠溝之底部的塗佈材料不完全地硬化。亦要注意的 10是，即使在該等階梯係分隔得較遠時，在接近該階梯之角 落之底部的塗佈材料係不完全硬化。 像HSQ般之η -樹脂的硬化係一可逆轉反應，其可以由 下面的方程式表示： HSQe Si02 + η2 个 15 據此，形成希望之氧化矽產物之反應的完成係端視氫氣 離開該塗佈材料的能力而定，藉此驅動上述方程式到完成 氧化矽之形成的右邊。在形成於該基體之渠溝之最深部份 或者在緊密分隔之階梯之間，以及在接近階梯之角落的塗 佈材料，在陷入的氩氣上係具有氩氣可能通過之縮小的擴 2 0 散角度或者細小的體積’藉此導致該塗佈材料之該等部份 的不完全硬化的結果。 因此，無法完全轉換所有HSQ塗佈材料到氧化梦會導 致氫氣在後續的步驟期間從該塗佈枒料釋放或者發射出來 ，包括係不希望有像氩般之還原氣體出現的步驟。再者， 第 本紙張尺度適用中國國家標準（CNS ) Λ4規格（2丨〇χ297公# ) ^表-- (規先閲¾背面之注意事項再填涔本頁) 訂 4348 09 A7 B7 五、發明説明（》） 經濟部中央橾準局貝工消費合作社印敦 HSQ塗佈材料的該不完全辟 哽化導致具有不同膨脹係數的材 t構上的結果，引致來自該完全硬化 :=!刻特性的材料和電也應力的除 sortll彳)之、知技術之料在半導體元件中形成由 S0G製成之絕緣層的方法係如下。 形成字線❹Μ制以躲-已職有元件的半導艘 基體上巾然後封頂層係藉著將氣化物沉積於該沉積 多晶砂上來被形成。-字線係藉著触刻該沉積多晶石夕和該 封頂層的部份來被形成。要成為—側壁間隙壁的氣化物係 藉由LPCVD(低壓化學氣相沉積法）而然後BpSG (石朋麟矽玻 璃）來被沉積於該字線上或者USG係藉由ApcvD來被沉積 以填注在字線間的空間，其中，如果s〇G(旋塗式玻璃）係 取而代之被沉積的話，熱硬化係被施加來填注該空間。 在由該APCVD所形成的層業已以高溫回火進行回火來 15被硬化之後’一封頂層係藉著沉積氧化矽來被形成，其中 ’該封頂層若有需要係被平坦化CMP (化學機械研磨法）。 第至1F圖顯示習知技術在半導體元件中形成絕緣 層以填注在元件或者導線之階梯之間之空間的截面圖。 請參閱第1A圖所示，多晶矽12業已被沉積在一矽基 體11上，然後，一氮化物層I3係藉著LPCVD來被沉積於 該沉積多晶矽12上《該氮化物層的字線圖型係由微影所定 義°然後’ 一字線係藉著將該沉積多晶矽12蝕刻來被 形成" 請參閱第1B圖所示，一氮化物層14係藉著LPCVD來 5 10 20 --------Jf — (¼先閱讀•背面之注意事項再填寫本瓦)434809 A7 B7 V. Description of the invention (5 10 15 The Consumers 'Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs, the Consumers' Union 20, and the present invention relates to the method of focusing on the formation of an insulating layer in a semiconductor element. HSQ (hydrogen SliSes to iOxane) forms a silicon oxide layer made of s such as silicon (s: LliC0n glass) on a semiconductor device The on-wafer method prevents bit lines from jumping across holes that appear when filling the space between elements on the wafer with conventional APCVD (atmospheric pressure chemical vapor deposition). The interval P between these elements is below 18 μm. HSQ is used as a filling material and a stable inner layer dielectric material. The present invention is mainly related to the element by turning the gap-filled SOG to have Ar +. The resistance of ion implantation to the heat treatment used to open the contact hole and the stability of the chemical. Generally, silicon oxide is used in the open part of the silicon substrate or polycrystalline silicon by CVD or integrated circuits. Insulation layer formed by oxidation / growth. And 'Usually in the flattening process, the oxidized dream layer is formed by flowing the coating material of the oxidized debris as a source on the integrated circuit structure to form. Xixuan: The hydride-based coating material β is the source of oxidized stone, which is used to form a layer of monolithic oxide on a integrated circuit structure. As a coating material on the integrated circuit structure Chemical compounds or HSQ's are known as rhenium-resins, and SiO2 pioneers have been found to work on the surface to be coated, move well 'including stepped surfaces' and provide high yields of SiO2, as well as offering low carbon content. SiO2 layer. The coating material is initially dried to remove the solvent used when applying the coating material to the integrated circuit structure. Page 4 11 n ^ i 1--t ^ n ..... ... —1 (½ Please read the notes on the back of ti before filling out this page)-The size of the paper is applicable to the China National Standard (CNS) M standard (2 j 〇X297-i > t) Quasi-office Consumers 'Cooperatives Co., Ltd. Yinli 434809 A7 1 ----— &_; B7 1 V. Invention Description (2) —' After that, by It is heated from about 200 ° C to 1000 ° C to be hardened to form the desired SiO2 ceramic layer. Although such a petrolatum hydride or HSQ coating material is used as the Si on the integrated circuit structure The precursor system of the 〇2 layer meets certain results. 5 However, it is not without its problems. In this regard, the material is the incomplete hardening of the incomplete conversion of the dry coating material to SiO2. The coating material has been noticed when applied to a stepped surface. In particular, when the coating material is applied to a closely spaced step, or in a narrow trench, the coating material is at the bottom of the trench Incompletely hardened. It should also be noted that 10, even when the step systems are separated far away, the coating material at the bottom near the corner of the step is not completely hardened. The hardening of η-resin like HSQ is a reversible reaction, which can be expressed by the following equation: HSQe Si02 + η2 15 15 According to this, the completion of the reaction to form the desired silicon oxide product is based on the hydrogen leaving the coating Depending on the capabilities of the materials, the above equation is driven to the right of completing the formation of silicon oxide. The coating material formed in the deepest part of the trench of the substrate or between closely spaced steps, and near the corners of the steps, has an enlarged argon on the trapped argon, through which it can shrink. Divergence or small volume 'thereby results in incomplete hardening of the portions of the coating material. Therefore, the inability to fully convert all HSQ coating materials to Oxidation Dream will cause hydrogen to be released or emitted from the coating material during subsequent steps, including steps in which a reducing gas like argon is not desired. In addition, the first paper size applies the Chinese National Standard (CNS) Λ4 specification (2 丨 〇χ297 公 #) ^ Table-(read the rules before reading the ¾ notes on the back before filling this page) Order 4348 09 A7 B7 V. Description of the invention (") The incomplete development of the HSQ coating material of the Indochina HSQ coating material by the Central Bureau of Quasi-Ministry of Economic Affairs of the Ministry of Economic Affairs resulted in structural results of materials with different expansion coefficients, resulting from the complete hardening: =! 刻The method of forming the insulating layer made of SOG in a semiconductor device is as follows, except that the material and the electrical stress are sorted. The word line MM system is formed to hide the semi-conductor of the existing element, and then the cover layer is formed by depositing a vapor on the deposited polycrystalline sand. -The word line is formed by touching the portion of the deposited polycrystalline stone and the cap layer. To be-the gas of the sidewall spacer is deposited on the word line by LPCVD (Low Pressure Chemical Vapor Deposition) and then BpSG (Stone Pyrene Silica Glass) or the USG is deposited by ApcvD to fill the word The space between the lines, in which a thermosetting system is applied to fill the space if SOC (spin-on glass) is deposited instead. After the layer formed by the APCVD has been tempered with high temperature tempering to be hardened 15 'a top layer is formed by depositing silicon oxide, wherein' the cap layer is planarized if necessary by CMP (chemical Mechanical grinding method). Figures 1 to 1F are cross-sectional views showing a conventional technique for forming an insulating layer in a semiconductor device to fill a space between steps of the device or a wire. Please refer to FIG. 1A. Polycrystalline silicon 12 has been deposited on a silicon substrate 11. Then, a nitride layer I3 is deposited on the deposited polycrystalline silicon 12 by LPCVD. Is defined by lithography, and then a word line is formed by etching the deposited polycrystalline silicon 12 " Please refer to FIG. 1B, a nitride layer 14 is formed by LPCVD to 5 10 20 --- ----- Jf — (¼Please read the notes on the back before filling in this tile)
、1T ( CNS )以说核（2Ι〇χ297·ί>"^" 4348 Ο 9 A7 B7 五、發明説明（Μ·) 5 經濟部中央標準局貝工消费合作社印裝 被沉積’以形成該階梯式字、線12的側壁間隙壁在該現出的 矽基體11上、在保留於孩字線12上之氮化物層13的側 面上及側面處、和在該字線12的側面處。 請參閱第1C圖所示，該字線12的/側壁間隙壁14係 藉著將該氮化物層14回蝕刻來被形成。 請參閱第1D圖所示，一緩衝氧化物15係藉著LPCVD 來被形成於s紳基體1! <現出的表面上、於該侧壁間隙壁 I4和剩下之氣化物13的表面上。 請參閱第1E圖所示，—中間層16係藉著以ApCVD將 BPSG或者USG沉積至厚収以將該等階梯之間之空間（間 隙）填注來被形纽該緩料化物15上。如果 SOG係取而 代之被施加的話’在該中間層16内部之剩下的溶劑係以熱 硬化f除。該中間層係以高溫回火硬化。 靖參閱第1F圖所示，供平坦化用的封頂層17係以 LPCVD形成於該中間層16上。一般來說’ 與工(中 間層介質）處理係同時進行的。 如果在該中間層16下面之階梯之間的間隙係不足 0.25帅的話，根據習知技術，孔洞·由於半導體元 限制而係無法避免的。 稱 —再者+，由於該溶劑在旋塗式方法的間隙填注處理時並不 完全藉著熱硬化移除’在接觸孔的清潔處理中， 由於輕易以濕化學藥品蝕刻而出現。 、 β據此’氧化物的特性必須被提升俾可彌補該等上述的問 ___ 第.7頁 本紙張尺度適用中國國^^⑽）λ_ ( 21〇χ騰[y (棟先閲读背面之注意Ϋ項再填寫本頁) Η装· •Τ— 五、發明説明（义） 據此，本發明係指向於用於形成絕緣層的方法，其實質 上避免由於相關技術之限制和缺點所引起的一個或者多個 問題。 本發明之其中一個目的是為提供一 SOG層，其具有對 5 抗在開啟接觸孔和熱處理時之濕式蝕刻化學藥品的元件穩 定性以及藉著SOG層之提升的特性防止由於結構限制所引 起的孔洞》 換句話說，本發明藉著使用間隙為極細微之HSQ基底 之非有機材料來控制由於間隙填注之孔洞所引起之爆裂的 10 產生。 4348 0 9 v Μ Β7 本發明透過當在該等階梯之間之剩餘在線間的溶劑被完 全移除時對後面之清潔處理之濕式化學藥品的阻抗來提供 穩定的處理β 再者，本發明提供因為離子植入之輕易的深度控制。 本發明之其他特徵和優點將會被展現於下面的描述而部 份將會由該描述而變得明顯，或者可以藉由本發明的實施 來學習到9本發明之目的和其他優點將會藉由特別於該描 述和其之申請專利範圍與附圖所指出的結構來被實現和達 成。 為了達成所實施和廣泛地描述之本發明的這些和其他優 點’本發明包括形成一由氳矽倍半曱烷製成的S〇G(熒塗式 玻璃）層於一半導體基體上、將離子植入至該SOG層、及使 該離子植入SOG層硬化。 更特別地，本發明包括如下之步驟：以一由氫矽倍半甲 第.8頁 本紙張尺度適用中国 (外先閲说背面之注意事項再填寫本頁) 經濟部中央標率局貝工消費合作社印聚 5 10 15 、發明説明（b) A? B7 經濟部中央標準局貝工消費合作社印聚 20 2成的SOG(旋塗式玻璃）層塗佈一具有元件形成於其上 ^導體基體的不平坦表面、把係從㈣能夠被離子化之 ’、所得到的離子植人至該SQG >|、將該業已植入離子的 S0G層回火俾可在—室中硬化、及形成—封頂層以供該業 已回火之SQG層的平坦化用。 β必須要了解的是，上面大致上的描述和下面詳細的描述 疋為代表性與說明而且係傾向於提供如所主張之本發明的 進一步說明。 s亥等附圖’其係被包括俾提供本發明之進—步了解而且 係被併合及構成本申請案的一部份，描繪本發明的實施例 並且係與該描述一起作用來說明本發明的原理。 在該等圖式中： 第1A至1F圖顯示習知技術在半導體元件中形成絕緣 層於一晶圓上俾可填注在元件或者導線之階梯之間之空間 的橫截面圖； 第2A至2G圖顯示形成一由HSQ製成之SOG絕緣層的 橫截面圖；及 第3A至3C圖顯示在離子植入與高溫硬化時化學黏結 的結構。 現在請詳細地參考本發明的較佳實施例，其之例子係被 描繪於該等附圊中。 通常’在製造半導體元件時，二氧化矽係被使用於絕緣 在它們之間的元件或者層，在其中，氧化物係藉著將多晶 矽或者積體電路之矽基體的暴露部份氧化或者以CVD沉積 第9頁 本紙張尺度適用中國國家標準（CNS ) A4规招（2丨Ox297公^7 ----------- (#'先閎欢背面之注意Ϋ項再填寫本頁) 訂 .— 五、 發明説明（ A7 B7 5 經濟部中央橾率局員工消費合作社印製1T (CNS) to say the core (2Ι〇χ297 · ί > " ^ " 4348 〇 9 A7 B7 V. Description of the invention (M ·) 5 The Central Bureau of Standards of the Ministry of Economic Affairs was printed and deposited in the shellfish consumer cooperatives' to form The side walls of the stepped word and line 12 are on the emerging silicon substrate 11, on the sides and sides of the nitride layer 13 remaining on the child word line 12, and on the side of the word line 12 Please refer to FIG. 1C, and the sidewall spacer 14 of the word line 12 is formed by etching back the nitride layer 14. Please refer to FIG. 1D, a buffer oxide 15 is formed by LPCVD is formed on the surface of the substrate 1! ≪ the surface of the sidewall, the surface of the sidewall spacer I4 and the remaining gaseous material 13. Please refer to Figure 1E, the intermediate layer 16 is borrowed It is necessary to deposit BPSG or USG by ApCVD to a thick harvest to fill the space (gap) between the steps to form the buffer material 15. If SOG is applied instead, 'inside the intermediate layer 16 The remaining solvent is divided by heat hardening f. The intermediate layer is hardened by high temperature tempering. Please refer to Figure 1F for supply. The capping layer 17 for flanking is formed on the intermediate layer 16 by LPCVD. Generally speaking, the process is performed at the same time as the process (intermediate layer medium). If the gap between the steps below the intermediate layer 16 is insufficient 0.25 handsome words, according to the conventional technology, holes are unavoidable due to the limitation of the semiconductor element. Weighing-+, because the solvent is not completely removed by thermal hardening during the gap filling process of the spin coating method. 'In the cleaning process of the contact hole, it appears because it is easily etched with wet chemicals. Β accordingly' The characteristics of the oxide must be improved to compensate for the above-mentioned questions ___ page 7. This paper is applicable to China State ^^ ⑽) λ_ (21〇χ 腾 [y (Do not read the note on the back of the page before filling in this page). Outfitting · • T— V. Description of the Invention (meaning) Accordingly, the present invention is directed to use The method for forming an insulating layer substantially avoids one or more problems caused by the limitations and disadvantages of the related technology. One of the objects of the present invention is to provide a SOG layer having a resistance to 5 when opening a contact hole and During heat treatment Element stability of the etching chemicals and prevention of holes due to structural restrictions by the improved characteristics of the SOG layer "In other words, the present invention controls non-organic materials with a very fine HSQ substrate to control the gap due to the gap. 10 of the burst caused by the filled holes. 4348 0 9 v Μ B7 The present invention provides a method for cleaning the wet chemical after cleaning when the remaining solvent between the steps is completely removed. Impedance to provide stable processing β. Furthermore, the present invention provides easy depth control due to ion implantation. Other features and advantages of the present invention will be shown in the following description and part of it will become apparent from the description, or it can be learned through the implementation of the invention. 9 The purpose and other advantages of the invention will be obtained by In particular, the description and the scope of its patent application and the structures indicated in the drawings are implemented and reached. To achieve these and other advantages of the invention as implemented and broadly described, the invention includes forming a SOG (fluorine-coated glass) layer made of silsesquioxane on a semiconductor substrate, The SOG layer is implanted, and the ion implanted SOG layer is hardened. More specifically, the present invention includes the following steps: The paper size is applied to China with a bismuth of silicon hydrochloride. Page 8 (applies to the notes on the back of the paper before filling out this page) Consumer Cooperative Printing Poly 5 10 15 、 Instructions for Invention (b) A? B7 SOG (spin-coated glass) layer coated with 20% of the SOG (spin-coated glass) layer coated by Shellfish Consumer Cooperative 20 of the Central Standards Bureau of the Ministry of Economic Affairs. The uneven surface of the substrate, the implantation of the system from ㈣ can be ionized, the implanted ions into the SQG > Form-seal the top layer for the planarization of the tempered SQG layer. It must be understood that the above general description and detailed description below are representative and illustrative and are intended to provide further explanation of the invention as claimed. The drawings, such as the drawings, are included to provide a further understanding of the present invention and are incorporated and form a part of this application, depicting embodiments of the present invention and acting in conjunction with this description to illustrate the present invention. The principle. In the drawings: FIGS. 1A to 1F show cross-sectional views of a conventional technique for forming an insulating layer in a semiconductor element on a wafer and filling a space between the steps of the element or a wire; FIGS. 2A to 1F Figure 2G shows a cross-sectional view of a SOG insulating layer made of HSQ; and Figures 3A to 3C show a chemically bonded structure during ion implantation and high temperature hardening. Reference is now made in detail to the preferred embodiments of the present invention, examples of which are depicted in the appendixes. Generally, when manufacturing semiconductor devices, silicon dioxide is used to insulate the components or layers between them. Among them, the oxide system is used to oxidize polycrystalline silicon or the exposed part of the silicon substrate of the integrated circuit or to CVD. Sedimentation Page 9 This paper applies Chinese National Standards (CNS) A4 regulations (2 丨 Ox297) ^ 7 ----------- (# 'Please note the item on the back of Huan before filling this page ) Order. — V. Description of the invention (A7 B7 5 Printed by the Consumers' Cooperative of the Central Government Bureau of the Ministry of Economic Affairs
該氧化物來形成。 然而，就平坦化而言，通常該液態來源材料係在積體電 路的結構上流動以形成一二氧化矽層。 於該半導體積體電路上的二氧化石义層係從作為塗佈材料 之像HSQ般之由氫化矽烷製成的來源材料形成。使用薄膜 陶瓷二氧化矽塗層作為電子元件之保護和介電層在習知技 術中係已知的。如此所形成的塗層提供底層基體良好的環 境保護並有效禁止導電。 雖然有它們的功效，這些習知方法就HSQ樹脂的氧化 和硬化而言係需要使用（溫度X時間）的高熱預算。如此之 高熱預算在很多因它們會損害或者破壞該基體之對溫度敏 感的應用上係不可接受的"例如，美國專利第4,756,977 號一案描述HSQ樹脂衍生二氧化矽瓮層在包括電子元件之 各種基體上的使.用。 氫化矽烷樹脂，有時亦被稱為HSQ或者H-樹脂，在完 全冷凝和水解時，具有公式（H/SiQ3/2)n，其中，n大致上 為大約10-1〇〇〇。典型的1樹脂’當不是完全冷凝或者水 解時，可以具有公式Hsi(〇H)x (‘〇RW“，在其中， x 0 2 y=0-2, z=1_3, x+y+z=3而且該聚合體之所 有單元之y的平均值係大於〇。每個R是為獨立地一個工_ 6碳有機群組，其在經由氧原子黏結至矽時，形成一可水 解代替物。該等氬化矽烷或者HSQ二氧化矽先驅物和它們 作為塗佈材料的使用係在Balance等人之美國專利第 5'14 5'72 3號一案中有更完全的討論。 第10頁 本紙張尺度it用中gjg|家椟準（CNS )八4麟（2|Gx297/々难） ---------— (价先閱讀背面之注意事項再填寫本頁〕This oxide is formed. However, in terms of planarization, the liquid source material usually flows on the structure of the integrated circuit to form a silicon dioxide layer. The dioxide layer on the semiconductor integrated circuit is formed from a source material made of hydrogenated silane like HSQ as a coating material. The use of thin-film ceramic silicon dioxide coatings as protective and dielectric layers for electronic components is known in the art. The coating thus formed provides good environmental protection to the underlying substrate and effectively prohibits electrical conduction. Despite their efficacy, these conventional methods require a high thermal budget (temperature x time) for the oxidation and hardening of HSQ resins. Such high thermal budgets are unacceptable in many temperature-sensitive applications where they can damage or destroy the substrate " For example, U.S. Patent No. 4,756,977 describes that HSQ resin-derived silicon dioxide layers are included in electronic components. Use on various substrates. Hydrogenated silane resins, sometimes referred to as HSQ or H-resins, have the formula (H / SiQ3 / 2) n when fully condensed and hydrolyzed, where n is approximately 10-1000. A typical 1 resin, when not completely condensed or hydrolyzed, may have the formula Hsi (〇H) x ('〇RW ", where x 0 2 y = 0-2, z = 1_3, x + y + z = 3 And the average value of y of all the units of the polymer is greater than 0. Each R is an independent 6-carbon organic group, which forms a hydrolyzable substitute when bonded to silicon via oxygen atoms. These argon silanes or HSQ silica precursors and their use as coating materials are discussed more fully in US Patent No. 5'14 5'72 3 by Balance et al. Page 10 Paper scale it used in gjg | 家 椟 准 （CNS） 八 4 麟 （2 | Gx297 / 々 难） ---------— (Please read the precautions on the back before filling in this page)
l1T 4348 0 9 經濟部中央標準局負工消費合作社印^ kl B7五、發明説明（I ) , 作為與本發明相關的習知技術，美國專利第 5,42 9,990號一案描述以離子植入的SOG平坦化而美國專 利第5,456,952號一案則進行HSQ被使用作為二氧化矽 之先驅物的硬化處理。 5 本發明在半導體元件中透過離子植入形成SOG層的方 法包含如下之步驟：以一作為絕緣中間層之由以HSQ為基 底的樹脂塗佈一具有元件之矽基體的不平坦表面、以能夠 被離子化的原子將離子植入至該SOG層内、在一室中將該 離子植入SOG層回火以硬化、及形成一封頂層於該回火 10 SOG層上以獲得平坦化。 第2A至2G圖顯示形成一由HSQ製成之SOG絕緣層的 橫截面圖而第3A至3C圖則顯示在離子植入與高溫硬化時 化學黏結的結構。 請參閱第2A圖所示，形成一字線的多晶矽22被沉積 15 於一形成有半導體元件的矽基體21上。一氮化物層23或 者一二氧化矽層23係藉由LPCVD形成於該沉積的多晶矽 22上。一字線22係藉著以照相和蝕刻處理將該氮化物層 23和該沉積之多晶矽22的某部份栘除來被形成。 請參閱第2B圖所示，一緩衝二氧化矽層24被形成於 20 該暴露之基體21的表面上，在該剩下之氮化物層23上和 該剩下之氮化物層23的側面處及字線22的側面處。 請參閱第2C圖所示，該緩衝二氧化矽層24係以具有 良好流動特性之以HSG為基底的SOG塗佈，其中，該塗層 SOG 25填注該等在階梯狀字線22之間的間隙並且係自該 第11頁 (贫先閱攻背面之注意事項再填寫本頁) 訂 * I -- - 本紙張尺度適用中國國家標準（CNS ) Λ4規棉（210X 297公漤） 434809 五 、發明説明（， A? B7 5 10 15 經濟部十央橾準局負工消费合作社印製 20 半導體基趙21 ίΛ主_的厚度。的表面起形成^覆蓋該等階梯之Q_05 - SOG的矽®早4曰丄 *上之以HSQ為基底之 ，而且亦分別與一氧原子和一氮原子的共價鍵 原子的兩個共價:係Γ個相鄰之其他石夕原子共享之氧 ⑽i〇3/2bt^’其中，該s〇g之化學方程式為鍵峰㈣m si;SmFTIR分析的話，該si'H 用以中：：咖層26中之分子之間的鍵由於 中，能夠被-以 離子植人而變成激發狀態，其 量係在所有的原子係可利用作植入，而且劑 ， m之上且能量係在其之100EV之上。例如 二，離子植人係'在大約25QKeV之能量和3E15之劑量 的條件下執行。 <削篁 "月參閱對應於第2D圖並且係顯示在Ar離子植入上之 化學黏結之轉移狀態的第3B圖，每個在氫原子與每個矽原 子，間的鍵由於離子植入而振奮。囱此，該等氫原子係报 可旎彼此耦合來形成氫分子。然後，已遺失其之氫原子的 =原子變成追逐狀態，如在第3B圖中之右邊部份處所顯示 身又。即使該Si_H鍵峰在FTIR分析時出現在該si_〇鍵峰 的左邊，該峰的大小係比第3A圖的小，顯示在矽與氫之間 的鍵業已被破壞。 在第2E圖中，隨著該離子植入之S〇G層的密度已降低 第12頁 表紙張尺度制悄SI家轉（CNS ) Ai)聽（加x2m>i -ί 1-I----n 1 I (许先閲面之注意事項再填寫本頁} 經濟部中央梯率局負工消費合作社印聚 4348 0 9 A7 ____ B7五、發明説明（\〇 ) ------- ，硬化的SOG層27係藉著在加熱室中於大約攝氏75〇度 下回火來被形成，其中，回火的大氣為空氣、氣氣、氧氣 或者〇.1~9〇0 seem的水蒸氣而且在該室中的壓力為 0 . 01-1000 Torr ° 5 請參閱顯示業已於第2Ε園中以高溫回火之s〇G層之化 學方程式的第3C圖’經由熱硬化所激發的氫原子變成氫分 子，離開該S0G層。然後，該S0G層係以氧原子代替，變 成純一氧化梦層，藉此該Si -H鍵峰在FTIR分析中不見 了0 請參閱第2F圖所示，由二氧化矽製成的一封頂層28 係由CVD形成於該純二氧化矽層27上。 請參閱第2G圖所示，若有需要，—良好平坦化的氧化 物28係藉由CMP形成。 因此，本發明藉著利用在其中之間隙係極小之以HSQ 為基底的無機材料來控制由於間隙填注時之孔洞所引起之 爆裂的產生、透過當在該等階梯之間之剩餘在線間的溶劑 被完全移除時對後面之清潔處理之濕式化學藥品的阻抗來 提供穩定的處理、而且亦提供因為離子植入之輕易的深度 控制。 對於熟知此項技術的人仕來說，很明顯的是在本發明之 用於形成絕緣層的方法上’各種改變和變化可以在沒有離 開本發明之精神或者範圍下達成。因此，本發明係傾向於 涵蓋屬於申請專利範圍與其之等效物之範圍内之本發明的 改變和變化。l1T 4348 0 9 Printed by the Consumers ’Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs ^ kl B7 V. Description of the Invention (I) As a known technology related to the present invention, U.S. Patent No. 5,42 9,990 describes ion implantation. SOG is flattened and US Patent No. 5,456,952 provides a hardening process where HSQ is used as a precursor to silicon dioxide. 5 The method for forming a SOG layer by ion implantation in a semiconductor device according to the present invention includes the following steps: coating an uneven surface of a silicon substrate having a component with a resin-based HSQ substrate as an insulating intermediate layer, so that The ionized atoms implant ions into the SOG layer, temper the ion implanted SOG layer in a chamber to harden, and form a top layer on the tempered 10 SOG layer to obtain planarization. Figures 2A to 2G show cross-sectional views of the formation of an SOG insulating layer made of HSQ, and Figures 3A to 3C show a chemically bonded structure during ion implantation and high temperature hardening. Please refer to FIG. 2A, a polycrystalline silicon 22 forming a word line is deposited 15 on a silicon substrate 21 having a semiconductor element formed thereon. A nitride layer 23 or a silicon dioxide layer 23 is formed on the deposited polycrystalline silicon 22 by LPCVD. A word line 22 is formed by erasing the nitride layer 23 and a portion of the deposited polycrystalline silicon 22 by a photo and etching process. Referring to FIG. 2B, a buffered silicon dioxide layer 24 is formed on the surface of the exposed substrate 21, on the remaining nitride layer 23, and on the side surfaces of the remaining nitride layer 23. And the side of the word line 22. Please refer to FIG. 2C. The buffered silicon dioxide layer 24 is coated with SOG based on HSG with good flow characteristics. Among them, the coating SOG 25 is filled between the stepped word lines 22 And the gap is from page 11 (Notes on the back of the poor first review, then fill out this page) Order * I--This paper size applies to China National Standard (CNS) Λ4 gauge cotton (210X 297 cm) 434809 5 Description of the invention (, A? B7 5 10 15 Printed by the Ministry of Economic Affairs, the Central Committee of the Central Bureau of Work, Consumer Cooperatives, and the thickness of the semiconductor substrate. The thickness of the semiconductor substrate is 21, and the surface of the Q_05-SOG silicon covering the steps is formed. ® As early as 4th, HS * is based on HSQ and is also covalent with two covalently bonded atoms of one oxygen atom and one nitrogen atom: the oxygen shared by Γ adjacent other Shi Xi atoms 〇3 / 2bt ^ 'Among them, the chemical equation of the sog is the bond peak ㈣m si; In SmFTIR analysis, the si'H is used for :: The bond between molecules in the coffee layer 26 can be- The ion is implanted into the excited state, and its amount is used in all atomic systems for implantation, and the agent, m And the energy is above its 100EV. For example, the ion implantation system is performed under the conditions of an energy of about 25QKeV and a dose of 3E15. ≪ Cutting " Figure 3B of the chemically bonded transition state on ion implantation. Each bond between the hydrogen atom and each silicon atom is excited by the ion implantation. Therefore, these hydrogen atoms may be coupled to each other. A hydrogen molecule is formed. Then, the = atom that has lost its hydrogen atom becomes a chasing state, as shown in the right part of Figure 3B. Even though the Si_H bond peak appears in the si_〇 bond during FTIR analysis To the left of the peak, the size of the peak is smaller than that in Figure 3A, showing that the bond between silicon and hydrogen has been broken. In Figure 2E, the density of the SOG layer has decreased with the ion implantation. Page 12 Table Paper Standard System (SIS) Ai) Listening (plus x2m > i -ί 1-I ---- n 1 I (Notes for reading first, then fill out this page) Central Slope of the Ministry of Economic Affairs Bureau of Industrial and Consumer Cooperatives, India 4348 0 9 A7 ____ B7 V. Description of Invention (\ 〇) -------, Hardened SOG The 27 series is formed by tempering in a heating chamber at about 75 degrees Celsius, where the tempered atmosphere is air, gas, oxygen, or water vapor of 0.1 to 900 seem and is in the chamber. The pressure in the range is 0.01-1000 Torr ° 5 Please refer to Fig. 3C showing the chemical equation of the soG layer tempered at a high temperature in the 2E garden. The hydrogen atom excited by heat hardening becomes a hydrogen molecule, Leave the SOG layer. Then, the SOG layer was replaced with oxygen atoms to become a pure monoxide layer, whereby the Si-H bond peak was missing in the FTIR analysis. 0 Please refer to Figure 2F, a top layer made of silicon dioxide 28 is formed on the pure silicon dioxide layer 27 by CVD. Please refer to Figure 2G, if necessary, a well-planarized oxide 28 is formed by CMP. Therefore, the present invention controls the generation of bursts due to holes in the gap filling by utilizing the HSQ-based inorganic material in which the gap is extremely small. The resistance of the wet chemical to subsequent cleaning processes when the solvent is completely removed provides stable processing and also provides easy depth control due to ion implantation. It will be apparent to those skilled in the art that various changes and modifications in the method for forming an insulating layer of the present invention can be made without departing from the spirit or scope of the present invention. Therefore, the present invention is intended to cover changes and variations of the present invention which fall within the scope of the patent application and its equivalents.
___ 第]3頁 本紙張尺度適财關家轉) Λ4規彳M (使先閲請背面之注意事項再填寫本頁) 訂 —------- 434809 A7 B7 五、發明説明（八） 5 元件標號對照表 11 矽基體 12 多晶矽 13 氮化物層 12 字線 14 氮化物層 15 緩衝氣化物 16 中間層 21 矽基體 22 多晶矽 23 氮化物層 24 緩衝二氧化矽層 25 SOG層 26 SOG層 27 SOG層 (t先閱lit背面之注意事領再填寫本瓦)___ page] 3 pages of this paper are suitable for financial affairs and family transfer) Λ4 rules 彳 M (so please read the notes on the back before filling out this page) Order --------- 434809 A7 B7 V. Description of the invention (8 ) 5 Component reference table 11 silicon substrate 12 polycrystalline silicon 13 nitride layer 12 word line 14 nitride layer 15 buffer gas 16 intermediate layer 21 silicon substrate 22 polycrystalline silicon 23 nitride layer 24 buffered silicon dioxide layer 25 SOG layer 26 SOG layer 27 SOG layer (t read the notice on the back of lit before filling in the tile)
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.-T 經濟部中央標準局員工消费合作社印製 頁 14 本紙張尺度適用中國國家標準（CNS >人4规格（210X297^# ).-T Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs Page 14 This paper size applies to Chinese National Standards (CNS > People 4 Specifications (210X297 ^ #)