經濟部智慧財產局員工消费合作社印數 Γ4 3 2 6 Ο 2 5 I 90twf.doc/006 A7 _B7___ 五、發明說明（^) 本發明是有關於一種半導體製程淺溝渠隔離結構 (shallow trench isolation, STI)的製造方法，且特別 是有關於一種使淺溝渠隔離結構平整（STI level ing)的半 導體製程。 氮化矽層在半導體製程中，由於其材料特性較氧化矽 爲硬’而且與矽材亦不相同，因此常常用來作爲蝕刻或是 化學機械硏磨法（chemical mechanical polish, CMP)的 終止層（stop layer) ’特別是在淺溝渠隔離結構的製程 請參照第1圖’爲一種淺溝渠隔離結構的剖面圖。習 知淺溝渠隔離結構的製程，一般係利用氮化矽層作爲硬罩 幕（hard mask)，而在基底1〇〇上形成淺溝渠1〇2，之後* 在淺溝渠102中塡入絕緣材料，其中絕緣材料一般爲氧化 物。接著，再以氮化矽層爲硏磨終點，利用化學機械硏磨 法磨蝕絕緣材料，而形成如第1圖所示之隔離結構104。 在利用氮化矽層定義基底100,蝕刻絕緣材料形成溝 渠102的製程中，蝕刻絕緣材料的步驟雖可去除絕緣材 料，但也容易造成氮化矽層表面的損害，造成氮化矽層厚 度不甚均勻。另外，在以化學機械硏磨法硏磨絕緣材料的 步驟中，由於氮化矽層材質較氧化物層爲硬，再加上化學 機械硏磨法硏磨的特性，使得晶片的中間部分與邊緣部分 以化學機械硏磨法去除的厚度不一，使得氮化矽層的不均 勻度更形嚴重。最後，更在淺溝渠隔離結構104與基底丨00 交接處形成凹陷（recess)，造成基底100表面與隔離結構 104表面的高低差（step height)h，引起淺溝渠隔離結構 3 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） III — — — — J* — III — - I I I I — I — « — — — — 111 — I 1 (請先閱讀背面之注項再填寫本頁) 5 1 9 (4w?(^c^006 2 A7 B7 五、發明說明（之） {請先Μ讀背面之注意事項系填寫本頁) 表面不平整’而對後續形成的元件的臨限電壓（threshold vol Uge),有所影響，此即爲所謂的頸結效應（kink effect) ° 因此’本發明就是在提供一種淺溝渠隔離結構的製造 方法，提高淺溝渠隔離結構的平整度，藉以降低不平整的 表面對臨限電壓的影響。 本發明提供一種淺溝渠隔離結構的製造方法，在一基 底上依序形成一墊氧化物層、一第一硬材料層、一軸刻終 止層與一第二硬材料層，接著，定義第二硬材料層、|虫刻 終止層、第一硬材料層與墊氧化物層，而在基底中形成一 溝渠。之後，對第一硬材料層進行一後退製程，同時以蝕 刻終止層爲蝕刻終點，將第二硬材料層去除。續在溝渠中 形成一絕緣材料’覆蓋融刻終止層，再去除第一硬材料層 上的絕緣材料與蝕刻終止層，之後去除第一硬材料層與墊 氧化物層。 經濟部智慧財產局貝工消费合作社印製 在定義溝渠製程中，蝕刻製程將破壞第二硬材料層， 造成第二硬材料層表面的不平整，因此利用蝕刻終止層爲 独刻終點將第一硬材料層去除，故可使晶片提供一較爲平 整的表面以供後續製程的進行。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特舉一較佳實施例，並配合所附圖式，作詳 細說明如下： 圖式之簡單說明： 第1圖係顯示一種淺溝渠隔離結構的剖面圖； 4 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 32 6 0 2 5 1 90twf.doc/006 A7 B7 經濟部智慧財產局員工消费合作社印製 五、發明說明（5) 第2A-2E圖係顯示根據本發明較佳實施例淺溝渠隔離 結構之製造流程剖面圖；以及 第3A-3D圖係顯示根據本發明較佳實施例一種使材料 層表面平整化的半導體元件製造流程剖面圖。 其中，各圖標號之簡單說明如下： 100、200、300 :基底 102、210 :溝渠 104 :隔離結構 106 :凹陷 202:墊氧化物層 204、204a、302 :第一硬材料層 206、206a、304 :触刻終止層 208、208a、306、306a :第二硬材料層 214、214a :絕緣材料 _富施例 本發明係利用製造一種”三明治（sandw1Ch)”結構，例 如爲第一氮化矽層/氧化物層/第二氮化矽層的結構，而在 基底上形成一硬罩幕層，利用此硬罩幕層定義基底形成一 溝渠’在溝渠形成時，最上方的第二氮化矽層會受到蝕刻 的損害’造成氮化矽層表面的不均勻，因此續以氧化物層 爲蝕刻終止層，將受損的第二氮化矽層去除。由於控制蝕 刻製程停止在氧化物層將不平整的第二氮化矽層去除，可 提供一平整的表面’因此在後續化學機械硏磨的製程中， 可改善淺溝渠隔離結構的均勻度。 5 ----_---^----' ^ I -- (請先閱讀背面之注意事項再填寫本頁) 言 r ί 本紙張尺度適用中國國家標準<CNS)A4規格（210 χ 297公釐） 經濟部智慧财產局具工消費合作社印製 "4 326 0 2 5 I90cwf.doc/006 A7 ____B7__ 五、發明說明（^) 第2A-2E圖所示，爲根據本發明一較佳實施例淺溝渠 隔離結構之製造流程剖面圖。請參照第2A圖，在一基底 200上形成一墊氧化物層（pad 〇xide)202，基底200例如 爲半導體矽基底’而墊氧化物層202例如以熱氧化法形成 厚度約爲50-100埃左右的氧化物層。之後，在墊氧化物 層202上形成一第一硬材料層2〇4 ,例如爲以化學氣相沉 積法形成氧化砂層’毯覆式地（b丨anke t )覆蓋塾氧化物層 204，其中墊氧化物層202用以增進第一硬材料層204與 基底200之間的附者力（adhesion)。 仍請參照第2A圖，之後，在第—硬材料層204上形成 一触刻終止層206，續在蝕刻終止層2〇4上形成一第二硬 材料層208，第二硬材料層208例如爲氮化矽層，其以化 學氣相沉積法毯覆式形成在蝕刻終止層204上，而蝕刻終 止層204係作爲第二硬材料層208的蝕刻終點，因此其材 質須與第二硬材料層208有所差異，以使蝕刻終止層24 可以發揮其作爲蝕刻終點的功能，其中，當第二硬材料層 2〇8爲氮化矽層時，蝕刻終止層2〇6可爲氧化矽層。 請參照第2B圖，之後，在第二硬材料層208上塗附一 且層（未繪出）’利用微影蝕刻製程以光阻定義第二硬材 料層208、蝕刻終止層206與第一硬材料層204，依序蝕 刻第二硬材料層208、蝕刻終止層206與第一硬材料層 204 ’而形成一預定開口（未繪出），接著，將光阻剝除。 其中触刻第二硬材料層208、蝕刻終止層206與第一硬材 料層204的步驟例如以乾蝕刻法進行，當第一硬材料層204 6 本紙張尺度適用中㈣家標準（CNS)A4規格（210 X 297公爱） — II--I I F I U . - - - - ----* — — — — — — (請先閲讀背面之注意事項再填寫本頁) 3 2 5 I 90twf.doc/006 '— A7 B7 經濟部智慧財產局貝工消费合作社印製 五、發明說明（夕） 與第二硬材料層2〇8培&yi ^ 馬氮化矽時，可以一合適之混合氣體 包括SFh '氣氣及翁贫 作爲蝕刻劑。而鈾刻終止層206跑 墊氧化物層202則以％、 作爲飩刻劑。 _混合物包娜、氧氣及氬氣 隨後’利用第二硬材料層208作爲一硬罩幕層，且以 ^ ] 口，以非％向性蝕刻法（anisotropic etching)封基底2〇〇進行蝕刻的步驟，而在基底2〇〇上形 成一溝渠210 ’如第迚圖所示。其中，基底2〇◦之触刻例 如以反應性離子蝕刻（RIE)進行，以氯氣、氦氣、HBr及氧 氣之混合氣體作爲軸刻劑之乾蝕刻法蝕刻基底2⑻而形成 溝渠2 10。 然而’在進行触刻基底200的製程時，所利用的電漿 I虫刻會破壞第一硬材料層2〇8，而使得其表面不甚均勻， 如第2B圖所示之第二硬材料層2〇8a，以致無法提供—平 坦的表面以供後續製程順利進行，而造成淺溝渠隔離結構 完成時’因表面的不平整而使完成的元件造成臨限電壓的 改變，導致元件的可靠度降低。因此，本發明之較佳實施 例係在第二硬材料層208與第一硬材料層204之間形成了 一蝕刻終止層206 ’利用蝕刻終止層206的存在，將受損 的第二硬材料層208a去除，藉由蝕刻終止層206而使晶 片可以提供具有較佳均勻的表面，如第2C圖所示。其中， 去除第二硬材料層2〇8a的蝕刻劑需具有較高的蝕刻選擇 比，使得蝕刻製程得以停止在蝕刻終止層206a，暴露出蝕 刻終止層206a，而蝕刻終止層206亦需具有足夠的厚度可 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐〉 -------------*'','^,裝！1 — ！1 訂---------線'、'" (請先閲讀背面之生意事項#:填寫本頁) 經濟部智慧財產局員工消费合作社印製 广P4 32 60 2 5190twf.doc/006 A7 B7 -- - 五、發明說明（g) 以抵抗蝕刻劑過度蝕刻。 其中，將第二硬材料層208a去除的步驟可與淺溝渠隔 離結構製程中的，，後退（pull back)”製程一起進行。所謂 的，，後退，，製程係由於半導體設計規則（des i gn ru 1 e )的考 量，溝渠210的尺寸越來越小’而溝渠210開口太小使得 後續的絕緣材料的沉積難以進行，因此’在溝渠210完成 後，即去除溝渠210側壁部分的第一硬材料層204a與蝕 刻終止層206a，而形成如第2C圖標號212所示之第一硬 材料層204a與蝕刻終止層206a，而使溝渠210在基底200 以上的開口變大。而在進行”後退”製程時，例如以HF-EG(氫氟酸+乙二醇）去除部分的第一硬材料層204a。而在 形成第二硬材料層208時控制其厚度，使得在第2B圖中 去除的第二硬材料層208a與”後退”製程中去除的第一材 料層204a厚度相差不多，使得其可同時以相同的蝕刻劑 進行，以節省製程時間與成本。 請參照第2D圖，接著，在溝渠210中形成一絕緣材料 214，覆蓋蝕刻終止層206a，例如在以臭氧TEOS或CVDTEOS 沈積一厚氧化層，而傳統的化學氣相沈積法（CVD)技術包 括常壓化學氣相沈積法（APCVD)、低壓化學氣相沈積法 (LPCVD)及電漿化學氣相沈積法（PECVD)，均可形成絕緣材 料214之氧化物層。續再回蝕刻絕緣材料214，例如以第 一硬材料層204a爲硏磨終點，利用化學機械硏磨法去除 第一硬材料層204a表面上的絕緣材料，而形成如第2E圖 所示的絕緣材料214a。而由於在進行化學機械硏磨法製程 8 (請先閱讀背面之注意事項再填寫本頁) ^1 1 ϋ ^1 ^1 1 n I n ^^1 n D i emt n n n n n ϋ I ϋ ml n 本紙張尺度適用中國國家標準<CNS)A4規格（210 >« 297公釐〉 A7 B7 Γ4 32 6 0 2 5 1 90twf.d〇c/〇〇6 五、發明說明（7) 則’已先將厚度不均的第二硬材料層208ίΐ去除，藉由蝕 刻終止層206a提供了—均勻的表面，因此可改善後續進 行化學機械硏磨法時厚度極度不均的現象。接著，再去除 第一硬材料層214a與墊氧化物層202等，第一硬材料層 214a例如以熱磷酸去除，而墊氧化物層2〇2例如以氫氟酸 去除。 #發明之較佳實施例係在進行化學機械硏磨法前，利 用倉虫刻終止層爲蝕刻終點，將厚度不均的硬材料層去除， 而得以提供一均勻度較佳的平面以供後續製程進行，故可 提局淺溝渠隔離結構表面的平整度，降低臨限電壓變化對 元件的影響。 此外’本發明之較佳實施例雖以淺溝渠隔離結構製程 揭露如上，但並不用以限定本發明。本發明較佳實施例所 提供”第一硬材料層/蝕刻終止層/第二硬材料層，，之結構不 僅可應用在因蝕刻造成表面不平整的半導體製程上，同時 亦可使用在因化學機械硏磨法造成表面均勻度不佳的製 程中。如第3A-3D圖所示，其係顯示一種使材料層表面平 整的半導體元件之製造流程剖面圖。 請參照第3A圖，在一基底300上依序形成—第—硬材 料層302、一蝕刻終止層3〇4與一第二硬材料層3〇6 ’蝕 刻終止層304係形成在第一硬材料層302與第二硬材料層 306之間。之後，爲因應製程所需進行蝕刻或化學機械硏 磨的步驟’例如平坦化或回蝕刻等，而第二:硬材料層3〇6a 表面卻常因長時間的蝕刻遭受破壞，如第3B圖所示，或 9 本紙張尺度適用中囷國家標準（CNS)A4規格（210 X 297公釐） — 1 — lllllliLr — — — — — — — — I— I (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局具工消t合作社印契 -- ^ F4 32 6 Ο 2 Α7 5 1 90twf.d〇c/〇〇6 __B7___ 五、發明說明（ϊ) 因化學機械硏磨法造成晶片中央與邊緣部位厚度相差過 多的情況。因此’在此係利用蝕刻終止層304爲蝕刻終點， 將表面不均的第二硬材料層306a去除，而暴露出蝕刻終 止層304，如第3C圖所示。之後，再利用具有較高蝕刻選 擇比的蝕刻劑，去除蝕刻終止層304,暴露出第一硬材料 層302，但不去除第一硬材料層302，如第3D圖所示。接 著，再繼續進行後續的製程。其中第一硬材料層302與第 二硬材料層306例如爲氮化矽，而蝕刻終止層304則爲氧 化物。 雖然本發明已以一較佳實施例揭露如上，然其並非用 以限定本發明’任何熟習此技藝者，在不脫離本發明之精 神和範圍內，當可作各種之更動與潤飾，因此本發明之保 .護範圍當視後附之申請專利範圍所界定者爲準。 10 本紙張尺度適用中國國家標準（CNS>A4規格（210 X 297公« )Intellectual Property Bureau of the Ministry of Economic Affairs, the number of employees' cooperatives Γ4 3 2 6 Ο 2 5 I 90twf.doc / 006 A7 _B7___ V. Description of the invention (^) The present invention relates to a shallow trench isolation structure (STI) for semiconductor processes. ), And more particularly, to a semiconductor process for making shallow trench isolation structures (STI level ing). In the semiconductor manufacturing process, the silicon nitride layer is often used as a stop layer for etching or chemical mechanical polish (CMP) because its material characteristics are harder than silicon oxide and it is also different from silicon. (Stop layer) 'Especially in the process of the shallow trench isolation structure, please refer to FIG. 1' is a cross-sectional view of a shallow trench isolation structure. The process of the conventional shallow trench isolation structure generally uses a silicon nitride layer as a hard mask to form a shallow trench 102 on the substrate 100. Then, an insulating material is inserted into the shallow trench 102. , Where the insulating material is generally an oxide. Next, the silicon nitride layer is used as a honing end point, and the insulating material is abraded by a chemical mechanical honing method to form an isolation structure 104 as shown in FIG. 1. In the process of using a silicon nitride layer to define the substrate 100 and etching the insulating material to form the trench 102, although the step of etching the insulating material can remove the insulating material, it is also easy to cause damage to the surface of the silicon nitride layer, causing the thickness of the silicon nitride layer to be inconsistent. Very uniform. In addition, in the step of honing the insulating material by the chemical mechanical honing method, since the material of the silicon nitride layer is harder than that of the oxide layer, coupled with the characteristics of the chemical mechanical honing method, the middle part and the edge of the wafer are made. Part of the thickness removed by the chemical mechanical honing method makes the unevenness of the silicon nitride layer worse. Finally, a recess is formed at the junction of the shallow trench isolation structure 104 and the substrate 丨 00, causing a step height h between the surface of the substrate 100 and the surface of the isolation structure 104, causing the shallow trench isolation structure. 3 This paper is applicable to China National Standard (CNS) A4 Specification (210 X 297 mm) III — — — — J * — III —-IIII — I — «— — — — 111 — I 1 (Please read the notes on the back before filling this page ) 5 1 9 (4w? (^ C ^ 006 2 A7 B7 V. Description of the invention (of) {Please read the notes on the back first to fill out this page) The surface is not flat and the threshold voltage of the subsequent components (Threshold vol Uge), has an impact, this is the so-called neck effect (kink effect) ° Therefore, the present invention is to provide a method for manufacturing a shallow trench isolation structure to improve the flatness of the shallow trench isolation structure, thereby reducing The influence of an uneven surface on the threshold voltage. The present invention provides a method for manufacturing a shallow trench isolation structure, in which a pad oxide layer, a first hard material layer, an axial stop layer and a first oxide layer are sequentially formed on a substrate. Second hard Material layer, and then define the second hard material layer, the worm stop layer, the first hard material layer, and the pad oxide layer to form a trench in the substrate. After that, perform a retreat process on the first hard material layer, At the same time, the second hard material layer is removed using the etch stop layer as the end point of the etch. Continue to form an insulating material in the trench to cover the melt stop layer, and then remove the insulating material and the etch stop layer on the first hard material layer, and then remove The first hard material layer and the pad oxide layer. Printed in the process of defining trenches by the Intellectual Property Bureau of the Ministry of Economic Affairs, Shellfish Consumer Cooperative, the etching process will destroy the second hard material layer, causing unevenness on the surface of the second hard material layer, so The first hard material layer is removed by using the etching stop layer as the end point of the single etching, so that the wafer can provide a relatively flat surface for subsequent processes. In order to make the above and other objects, features, and advantages of the present invention more Obviously easy to understand. The following is a detailed description of a preferred embodiment and the accompanying drawings, which are described in detail as follows: Brief description of the drawings: Figure 1 shows a shallow trench isolation junction Sectional drawing of the paper; 4 This paper size is applicable to the Chinese National Standard (CNS) A4 (210 X 297 mm) 32 6 0 2 5 1 90twf.doc / 006 A7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Explanation (5) Figures 2A-2E are cross-sectional views showing the manufacturing process of a shallow trench isolation structure according to a preferred embodiment of the present invention; and Figures 3A-3D are a plan view of flattening the surface of a material layer according to a preferred embodiment of the present invention A cross-sectional view of the semiconductor device manufacturing process. Among them, a brief description of each icon number is as follows: 100, 200, 300: substrate 102, 210: trench 104: isolation structure 106: depression 202: pad oxide layer 204, 204a, 302: A hard material layer 206, 206a, 304: the etch stop layer 208, 208a, 306, 306a: a second hard material layer 214, 214a: an insulating material_rich examples The present invention is used to make a "sandw1Ch" structure For example, it has a structure of a first silicon nitride layer / oxide layer / second silicon nitride layer, and a hard mask layer is formed on the substrate. The hard mask layer is used to define the substrate to form a trench. When the trench is formed, , The top second nitrogen Etching the silicon layer will be damage 'caused by the uneven surface of the silicon nitride layer, the oxide layer is continued to an etch stop layer, the second silicon nitride layer is damaged is removed. Since the controlled etching process stops at the oxide layer to remove the uneven second silicon nitride layer, a flat surface can be provided. Therefore, in the subsequent chemical mechanical honing process, the uniformity of the shallow trench isolation structure can be improved. 5 ----_--- ^ ---- '^ I-(Please read the notes on the back before filling out this page) rr ί The paper size applies to the Chinese National Standard < CNS) A4 Specification (210 χ 297 mm) Printed by the Consumer Goods Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs " 4 326 0 2 5 I90cwf.doc / 006 A7 ____B7__ V. Description of the Invention (^) Figures 2A-2E are shown in accordance with the present invention A manufacturing process sectional view of a shallow trench isolation structure in a preferred embodiment. Referring to FIG. 2A, a pad oxide layer 202 is formed on a substrate 200. The substrate 200 is, for example, a semiconductor silicon substrate, and the pad oxide layer 202 is formed by a thermal oxidation method to a thickness of about 50-100. Angstrom around the oxide layer. After that, a first hard material layer 204 is formed on the pad oxide layer 202, for example, an oxide sand layer is formed by a chemical vapor deposition method to cover the hafnium oxide layer 204, wherein The pad oxide layer 202 is used to enhance adhesion between the first hard material layer 204 and the substrate 200. Still referring to FIG. 2A, after that, an etching stop layer 206 is formed on the first hard material layer 204, and a second hard material layer 208 is formed on the etch stop layer 204. The second hard material layer 208, for example, It is a silicon nitride layer, which is blanket-formed on the etch stop layer 204 by a chemical vapor deposition method, and the etch stop layer 204 serves as an etching end point of the second hard material layer 208, so its material must be the same as that of the second hard material. The layer 208 is different, so that the etch stop layer 24 can perform its function as the end point of the etch. When the second hard material layer 208 is a silicon nitride layer, the etch stop layer 206 can be a silicon oxide layer. . Please refer to FIG. 2B. After that, apply a layer and layer (not shown) on the second hard material layer 208 to define the second hard material layer 208, the etch stop layer 206, and the first hard layer by photolithography using a photolithography process. The material layer 204 sequentially etches the second hard material layer 208, the etch stop layer 206, and the first hard material layer 204 'to form a predetermined opening (not shown), and then strips the photoresist. The steps of engraving the second hard material layer 208, the etch stop layer 206, and the first hard material layer 204 are performed by, for example, a dry etching method. When the first hard material layer 204 6 is in accordance with the Chinese Standard (CNS) A4 Specifications (210 X 297 public love) — II--IIFIU.-------- * — — — — — — (Please read the notes on the back before filling this page) 3 2 5 I 90twf.doc / 006 '— A7 B7 Printed by Shelley Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (Even) and second hard material layer 208 培 & yi ^ When silicon nitride is used, a suitable mixed gas may include SFh 'gas and Weng poor as an etchant. The uranium etch stop layer 206 and the pad oxide layer 202 use %% as an etchant. _ The mixture includes Na, oxygen, and argon. Then, the second hard material layer 208 is used as a hard cover curtain layer, and the substrate is etched by anisotropic etching at 200 mm. Step, and a trench 210 'is formed on the substrate 200 as shown in the second figure. Among them, the substrate 20 is etched by, for example, a dry ion etching method using reactive ion etching (RIE), and a mixed gas of chlorine, helium, HBr, and oxygen gas is used as an etchant to form the substrate 2⑻ to form the trenches 2-10. However, in the process of touching the substrate 200, the plasma I insect etch used will destroy the first hard material layer 208 and make its surface uneven, as shown in the second hard material in FIG. 2B. Layer 208a, so that it cannot be provided-a flat surface for subsequent processes to proceed smoothly, resulting in the completion of the shallow trench isolation structure 'due to the unevenness of the surface, the threshold voltage of the completed component is changed, resulting in component reliability reduce. Therefore, a preferred embodiment of the present invention is to form an etch stop layer 206 between the second hard material layer 208 and the first hard material layer 204. The presence of the etch stop layer 206 will damage the second hard material. The layer 208a is removed, and the wafer can provide a better uniform surface by the etching stop layer 206, as shown in FIG. 2C. Among them, the etchant for removing the second hard material layer 208a needs to have a high etching selection ratio, so that the etching process can be stopped at the etching stop layer 206a, and the etching stop layer 206a is exposed, and the etching stop layer 206 must also have sufficient The thickness of this paper can be adapted to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) ------------- * '', '^, packed! 1 —! 1 Order- -------- Line ',' " (Please read the business matters on the back #: Fill this page first) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs P4 32 60 2 5190twf.doc / 006 A7 B7 --V. Description of the invention (g) To resist overetching by the etchant. The step of removing the second hard material layer 208a may be performed together with the "pull back" process in the shallow trench isolation structure process. The so-called, backward, process is due to the consideration of semiconductor design rules (desi gn ru 1 e), the size of the trench 210 is getting smaller and smaller, and the opening of the trench 210 is too small, which makes subsequent deposition of insulation materials difficult, so 'After the trench 210 is completed, the first hard material layer 20 of the sidewall portion of the trench 210 is removed 4a and the etch stop layer 206a, and the first hard material layer 204a and the etch stop layer 206a are formed as shown in the 2C icon number 212, so that the opening of the trench 210 above the substrate 200 becomes larger. The "backward" process is being performed. In some cases, for example, HF-EG (hydrofluoric acid + ethylene glycol) is used to remove a portion of the first hard material layer 204a. When forming the second hard material layer 208, the thickness is controlled so that the second hard material layer 208 is removed in FIG. 2B. The hard material layer 208a is about the same thickness as the first material layer 204a removed in the "backward" process, so that it can be performed with the same etchant at the same time to save process time and cost. Please refer to Figure 2D, and then, in the trench 210 An insulating material 214 is formed to cover the etch stop layer 206a. For example, a thick oxide layer is deposited with ozone TEOS or CVDTEOS. Traditional chemical vapor deposition (CVD) techniques include atmospheric pressure chemical vapor deposition (APCVD), Both low pressure chemical vapor deposition (LPCVD) and plasma chemical vapor deposition (PECVD) can form an oxide layer of the insulating material 214. The insulating material 214 is etched again, for example, the first hard material layer 204a is Grinding the end, Chemical mechanical honing method is used to remove the insulating material on the surface of the first hard material layer 204a, and an insulating material 214a is formed as shown in FIG. 2E. However, due to the chemical mechanical honing method 8 (please read the note on the back first) Please fill in this page for more information) ^ 1 1 ϋ ^ 1 ^ 1 1 n I n ^^ 1 n D i emt nnnnn ϋ I ϋ ml n This paper size is applicable to Chinese national standard < CNS) A4 specification (210 > «297 Mm> A7 B7 Γ4 32 6 0 2 5 1 90twf.d〇c / 〇〇6 V. Description of the invention (7) Then 'the second hard material layer 208 with uneven thickness has been removed first, and the stop layer is etched by etching 206a provides a uniform surface, which can improve the extremely uneven thickness in the subsequent chemical mechanical honing method. Next, the first hard material layer 214a and the pad oxide layer 202 are removed. The first hard material layer 214a is removed, for example, using thermal phosphoric acid, and the pad oxide layer 202 is, for example, removed using hydrofluoric acid. # The preferred embodiment of the invention is to remove the hard material layer of uneven thickness by using the worm stop layer as the end point of the etching before performing the chemical mechanical honing method, so as to provide a plane with better uniformity for subsequent use. The process is carried out, so the flatness of the surface of the shallow trench isolation structure can be improved, and the influence of the threshold voltage change on the component can be reduced. In addition, although the preferred embodiment of the present invention is disclosed as above with the shallow trench isolation structure process, it is not intended to limit the present invention. The structure of the "first hard material layer / etch stop layer / second hard material layer" provided by the preferred embodiment of the present invention can be applied not only to semiconductor processes with uneven surface due to etching, but also to chemical In the process of poor surface uniformity caused by mechanical honing method, as shown in Figs. 3A-3D, it is a cross-sectional view showing a manufacturing process of a semiconductor device for flattening the surface of a material layer. Please refer to Fig. 3A, a substrate A first hard material layer 302, an etch stop layer 304, and a second hard material layer 306 are sequentially formed on 300. The etch stop layer 304 is formed on the first hard material layer 302 and the second hard material layer. 306. After that, in order to perform the steps of etching or chemical mechanical honing according to the process, such as planarization or etch-back, etc., the second: the surface of the hard material layer 306a is often damaged by long-term etching. As shown in Figure 3B, or 9 paper sizes are applicable to China National Standard (CNS) A4 (210 X 297 mm) — 1 — lllllliLr — — — — — — — — I—I (Please read the (Please fill in this page again) The Ministry of Economic Affairs and the Intellectual Property Bureau of the People's Republic of China Cooperative Cooperative Seal-^ F4 32 6 Ο 2 Α7 5 1 90twf.d〇c / 〇〇6 __B7___ V. Description of the invention (ϊ) The center of the wafer is caused by the chemical mechanical honing method. If the thickness of the edge part differs too much, 'here, the etching stop layer 304 is used as the end point of the etching to remove the uneven second hard material layer 306a, and the etching stop layer 304 is exposed, as shown in FIG. 3C. After that, the etching stopper layer 304 is removed by using an etchant with a higher etching selectivity ratio, and the first hard material layer 302 is exposed, but the first hard material layer 302 is not removed, as shown in FIG. 3D. Then, continue A subsequent process is performed. The first hard material layer 302 and the second hard material layer 306 are, for example, silicon nitride, and the etch stop layer 304 is an oxide. Although the present invention has been disclosed above in a preferred embodiment, the It is not intended to limit the present invention. 'Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be regarded as the scope of the attached patent application. The definition shall prevail. This paper size applies to Chinese national standard (CNS > A4 size (210 X 297 male «)