TW429630B - Using sine cutting-waveform channel erase manner to decrease the generation rate of oxide trapping charge for flash device - Google Patents

Using sine cutting-waveform channel erase manner to decrease the generation rate of oxide trapping charge for flash device

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Publication number
TW429630B
TW429630B TW88119741A TW88119741A TW429630B TW 429630 B TW429630 B TW 429630B TW 88119741 A TW88119741 A TW 88119741A TW 88119741 A TW88119741 A TW 88119741A TW 429630 B TW429630 B TW 429630B
Authority
TW
Taiwan
Prior art keywords
decrease
tunneling oxide
manner
sine
generation rate
Prior art date
Application number
TW88119741A
Other languages
Chinese (zh)
Inventor
Jian-Shing Li
Guo-Ruei Peng
Suei-Hung Chen
Jiau-Ren Shr
Original Assignee
Taiwan Semiconductor Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg filed Critical Taiwan Semiconductor Mfg
Priority to TW88119741A priority Critical patent/TW429630B/en
Application granted granted Critical
Publication of TW429630B publication Critical patent/TW429630B/en

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Abstract

This invention is about a method for decreasing electric charges trapped by the tunneling oxide when electrically erasable and programmable read-only memory device (EEPROM) performs the erasing procedure. During the whole erasing procedure, a voltage bias is added to channel region while source region as well as drain region are floating. At the same time, a voltage with a sine cutting-waveform is added to the control gate such that electrons, which are located on the floating gate, can penetrate tunneling oxide, which is located on top of the channel region, and are removed through channel region. The voltage with a sine cutting-waveform can be used to decrease the electric field intensity of the tunneling oxide so as to reduce the electrons trapped by the tunneling oxide.
TW88119741A 1999-11-11 1999-11-11 Using sine cutting-waveform channel erase manner to decrease the generation rate of oxide trapping charge for flash device TW429630B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW88119741A TW429630B (en) 1999-11-11 1999-11-11 Using sine cutting-waveform channel erase manner to decrease the generation rate of oxide trapping charge for flash device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW88119741A TW429630B (en) 1999-11-11 1999-11-11 Using sine cutting-waveform channel erase manner to decrease the generation rate of oxide trapping charge for flash device

Publications (1)

Publication Number Publication Date
TW429630B true TW429630B (en) 2001-04-11

Family

ID=21643006

Family Applications (1)

Application Number Title Priority Date Filing Date
TW88119741A TW429630B (en) 1999-11-11 1999-11-11 Using sine cutting-waveform channel erase manner to decrease the generation rate of oxide trapping charge for flash device

Country Status (1)

Country Link
TW (1) TW429630B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102945850A (en) * 2012-11-30 2013-02-27 上海宏力半导体制造有限公司 Image flash memory device and operating method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102945850A (en) * 2012-11-30 2013-02-27 上海宏力半导体制造有限公司 Image flash memory device and operating method thereof

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