五、發明說明（1) 【發明領域】 本發明係有關於一種光電壓產生器，尤有關於一種具 有以下優點的光電壓產生器：高光電轉換效率、低串聯電 阻、電路佈局設計簡易、以及可和其他元件整合於同一晶 粒内而無須增加微影製程來作元件隔離。 【習用技術之說明】 光電壓產生器是一種廣泛使用的光電元件，不但可以 用來感測光的存在，亦可以利用光來產生電源。 光電壓產生器主要的操作方式是利用ρ η接面形成的空 乏區（d e ρ 1 e t i ο n r e g i ο η )來操作，當外界光源照射到光電 壓產生器時，元件内部會被此外界光源激發而產生電子電 洞對（electron-hole pairs)，而空乏區内的内建電位 (built-in potential)產生的電場會將空乏區内的電子電 洞對分離，此時就形成了光激發電流（p h 〇 1; 〇 g e n e r a ΐ e d c u r r e n t )。而此光激發電流所形成的電源就可以利用來驅 動外界的電路。 圖1 A是一種典型的習用光電壓產生器的剖面圖，其中 包含：基板Π 、氧化層1 2、ρ型雜質擴散區1 3、高濃度η型 雜質擴散區1 4、氧化層1 5以及金屬層1 6。 在圖1Α中，氧化層12將基板11的表面上各個預定區域 予以隔離，Ρ型雜質擴散區1 3和高濃度η型雜質擴散區1 4則 在各個已隔離的區域内形成ρ η接面，金屬層1 6則將高濃度 η型雜質擴散區U連接到下一ρη接面的ρ型雜質擴散區1 3， 4 1 9 83 4 五、發明說明（2) 因而形成了多個pri接面的串聯，而氧化層15則用來隔離金 屬層1 6以避免同一區域内的p型雜質擴散區1 3和高濃度η型 雜質擴散區14被金屬層16連接而短路在一起。 圖1Β是圖1Α習用光電壓產生器之平面示意圖。在圖1Β 中，1 7代表正極電極，1 8代表負極電極，每個方塊區域是 代表圖1Α中每個隔離的區域（即是包含一個ρη接面的區 域），其中負極電極1 8可以連接到下一級的正極電極1 7， 以達到串聯多個ρ η接面的效果。 由圖1Α中可以清楚看到，每個區域（一個ρη接面的區 域）是利用氧化層12來隔離（isolation)，這種平面隔離製 程不僅製程良率低，製程也比較複雜，而且也在矽基板表 面上浪費了許多面積，因而也提高了製造的成本。 美國專利公報第5，6 3 3 , 5 2 6號中揭露了另一種光電壓 產生器，此光電壓產生器使用了類似SOI(silicon on i n s u 1 a 1; o r )的晶片作基板，而利用S 0 I中的絕緣層當作隔 離，因而解決了習用光電壓產生器的隔離技術所衍生的低 良率以及高成本的問題。然而，此改良之光電壓產生器的 製程過於複雜，而且並未提出更有效的提升光電轉換效率 的方法。另外，此改良式的光電壓產生器使用的同心狀的 平面結構，如圖2，不但難以作平面電路佈局的設計，同 時許多電性應用參數均受限於面積最小的ρ η接面（亦即最 内圈的ρ η接面），如最大光激發電流等等，因而限制了此 種光電壓產生器的應用範圍。 另外，光電壓產生器通常需要和一些外部電路一起配V. Description of the Invention (1) [Field of the Invention] The present invention relates to a photovoltaic voltage generator, and more particularly to a photovoltaic voltage generator having the following advantages: high photoelectric conversion efficiency, low series resistance, simple circuit layout design, and Can be integrated with other components in the same die without the need to increase the lithography process for component isolation. [Explanation of Conventional Technology] Photovoltaic generator is a widely used optoelectronic component. It can be used not only to sense the presence of light, but also to use light to generate power. The main operation mode of the photovoltaic generator is to use the empty area (de ρ 1 eti ο nregi ο η) formed by the ρ η junction. When an external light source shines on the photovoltaic generator, the inside of the component will be excited by the external light source. Electron-hole pairs are generated, and the electric field generated by the built-in potential in the empty region will separate the electron-hole pairs in the empty region. At this time, a photo-excitation current is formed. (Ph 〇1; 〇genera ΐ edcurrent). The power generated by this photo-excitation current can be used to drive external circuits. FIG. 1A is a cross-sectional view of a typical conventional photovoltaic voltage generator, which includes: a substrate Π, an oxide layer 1, 2, a p-type impurity diffusion region 1, 3, a high-concentration n-type impurity diffusion region 1, 4, an oxide layer 15, and Metal layer 1 6. In FIG. 1A, the oxide layer 12 isolates each predetermined region on the surface of the substrate 11, and the P-type impurity diffusion region 13 and the high-concentration n-type impurity diffusion region 14 form ρ η junctions in each of the isolated regions. The metal layer 16 connects the high-concentration η-type impurity diffusion region U to the ρ-type impurity diffusion region 1 of the next ρη junction. 3, 4 1 9 83 4 V. Description of the invention (2) Therefore, a plurality of pri junctions are formed. The oxide layer 15 is used to isolate the metal layer 16 to prevent the p-type impurity diffusion region 13 and the high-concentration n-type impurity diffusion region 14 in the same region from being connected by the metal layer 16 and short-circuited together. FIG. 1B is a schematic plan view of the conventional photovoltaic generator of FIG. 1A. In FIG. 1B, 1 7 represents a positive electrode, and 18 represents a negative electrode. Each square area represents each isolated area (that is, an area including a ρη junction) in FIG. 1A, where the negative electrode 18 can be connected. To the next positive electrode 17 to achieve the effect of connecting a plurality of ρ η junctions in series. It can be clearly seen from FIG. 1A that each region (a region with a ρη junction) is isolated by using the oxide layer 12. This planar isolation process not only has a low process yield, but also has a complicated process, and also A lot of area is wasted on the surface of the silicon substrate, which also increases the cost of manufacturing. US Patent Publication No. 5, 6 3 3, 5 2 6 discloses another photovoltaic voltage generator. This photovoltaic voltage generator uses a wafer similar to SOI (silicon on insu 1 a 1; or) as a substrate, and uses The insulating layer in S 0 I is used as an isolation, thus solving the problems of low yield and high cost derived from the isolation technology of the conventional photovoltaic generator. However, the process of this improved photovoltaic generator is too complicated, and no more effective method for improving the photoelectric conversion efficiency has been proposed. In addition, the concentric planar structure used in this improved photovoltaic generator, as shown in Figure 2, not only makes it difficult to design a planar circuit layout, but many electrical application parameters are limited by the smallest area ρ η junction (also (That is, the innermost ρ η junction), such as the maximum photo-excitation current, etc., thus limiting the application range of this photo-voltage generator. In addition, the photovoltaic generator usually needs to be equipped with some external circuits.
第6頁 4 1 9 83 4 五、 發明說明（3) 合 來 使 用 〇 而 在 習 用 技 術 中 ? 如 果 要 把 光 電 壓 產 生 器 和 -^ 些 電 路 元 件 整 合 在 一 晶 粒 中 5 則 必 須 在 光 電 壓 產 生 器 和 這 電 路 元 件 個 別 的 製 程 之 外 9 加 入 各 元 件 隔 離 的 製 程 > 因 而 造 成 製 程 數 之 增 加 〇 [ 發 明 概 述 有 鑑 於 此 5 本 發 明 的 U 的 在 於 提 供 一 種 光 電 壓 產 生 器 其 具 有 南 光 電 轉 換 效 率 的 優 點 且 無 須 太 過 複 雜 的 製 程 0 本 發 明 另 一 的 在 於 提 供 一 種 光 電 壓 產 生 哭 W 口 > 其 在 平 面 電 路 佈 局 上 易 於 控 制 及 設 計 〇 另 外 本 發 明 另 個 @ 的 在 於 提 供 一 種 光 電 壓 產 生 哭 σσ 其 可 和 其 他 元 件 整 合 於 同 一 晶 粒 内 而 | »Ί、 須 增 加 微 影 製 程 來 作 元 件 隔 離 0 本 發 明 係 有 關 於 一 種 光 電 壓 產 生 器 此 光 電 壓 產 生 器 包 含 一 基 板 1 一 絕 緣 層 -j-rt 置 其 中 延 伸 到 第 一 雜 質 擴 散 層 的 第 三 雜 質 擴 散 層 可 以 增 加ρ η 接 面 的 面 積 同 時 也 增 加 了 光 電 轉 換 效 率 〇 另 外 為 7 提 升 元 件 對 光 的 吸 收 效 率 也 增 加 第 一 和 第 二 雜 質 擴 散 層 在 基 板 垂 直 方 向 的 高 度 5 但 此 時 第 二 雜 質 擴 散 層 因 製 程 上 的 考 量 ? 需 使 用 1¾ 濃 度 雜 質 擴 散 層 〇 為 了 達 成 本 發 明 另 一 實 施 樣 態 第 一 雜 質 擴 散 層 和 該 第 二 雜 質 擴 散 層 是 彼 此 交 互 配 置 而 平 行 線 性 排 列 為 — 光 電 壓 產 生 哭 陣 列 〇 而 此 結 構 的 光 電 壓 產 生 哭 cm 陣 列 對 電 路 佈 局Page 6 4 1 9 83 4 V. Description of the invention (3) Combined use and in the conventional technology? If you want to integrate the photovoltaic generator and some circuit elements in a die, you must use photovoltaic voltage. The generator and the circuit element are manufactured separately from the individual processes. 9 The process of adding the isolation of each element > thus increasing the number of processes. 0 [Summary of the invention In view of this 5 The U of the present invention is to provide a photovoltaic voltage generator which has a South Optoelectronics The advantage of conversion efficiency without having to make the process too complicated. Another aspect of the present invention is to provide a photo-voltage generating circuit. It is easy to control and design on the planar circuit layout. In addition, another @ of the present invention is to provide a light. Voltage produces crying σσ which can be integrated with other components in the same die | »Ί The lithography process must be added to isolate the components. The present invention relates to a photovoltaic voltage generator. The photovoltaic voltage generator includes a substrate, an insulating layer, and a third impurity diffusion layer extending to the first impurity diffusion layer. The layer can increase the area of the ρ η junction and also increase the photoelectric conversion efficiency. In addition, it improves the light absorption efficiency of the element and also increases the height of the first and second impurity diffusion layers in the vertical direction of the substrate. 5 Due to process considerations? A 1¾ concentration impurity diffusion layer is required. In order to achieve another aspect of the invention, the first impurity diffusion layer and the second impurity diffusion layer are alternately arranged with each other and arranged in parallel and linearly as follows: photovoltage generation Cry array. And the photo voltage of this structure generates cry array.
第7頁 4 7 9834 五、發明說明（4) 設計者而言是相當容易設計的。 上述平行線性排列的光電壓產生器陣列利用在周邊區 域形成台面式結構（mesa structure)來隔離，此製程不但 是比較簡單，而且更提升了製程上的良率。 為了達成本發明另一實施樣態，此光電壓產生器陣列 可和其他電子零組件整合在同一晶粒内。而其元件隔離可 以利用在第二雜質擴散層的接面形成時，利用同一製程來 作接面隔離，以節省製造成本。 【圖示之簡單說明】 圖1是習用光電壓產生器，其中圖1A是習用光電壓產 生器剖面圖，圖1B是習用光電壓產生器平面示意圖； 圖2是另一習用光電壓產生器的平面圖； 圖3是本發明實施例之光電壓產生器的結構剖面圖； 圖4是本發明實施例之光電壓產生器的製程剖面圊； 圖5是本發明實施例之光電壓產生器在圖4之後的製程 别面圖； 圖6是本發明實施例之光電壓產生器在圖5之後的製程 剖面圖； 圖7是本發明實施例之光電壓產生器在圖6之後的製程 剖面圖； 圖8是本發明實施例之光電壓產生器在圖7之後的製程 剖面圖； 圖9是本發明實施例之光電壓產生器在圖8之後的製程Page 7 4 7 9834 V. Description of the invention (4) It is quite easy for designers to design. The above-mentioned parallel and linearly-arranged photovoltaic voltage generator array is isolated by forming a mesa structure in the surrounding area. This process is not only simpler, but also improves the yield rate of the process. In order to achieve another aspect of the invention, the photovoltaic generator array can be integrated with other electronic components in the same die. The element isolation can be made by using the same process to isolate the junction when the junction of the second impurity diffusion layer is formed to save manufacturing costs. [Brief description of the diagram] Figure 1 is a conventional photovoltaic voltage generator, of which Figure 1A is a sectional view of a conventional photovoltaic voltage generator, and Figure 1B is a schematic plan view of a conventional photovoltaic voltage generator; Figure 2 is another conventional photovoltaic voltage generator. Plan view; FIG. 3 is a structural cross-sectional view of a photovoltaic power generator according to an embodiment of the present invention; FIG. 4 is a manufacturing process cross-section of a photovoltaic power generator according to an embodiment of the present invention; FIG. 5 is a schematic view of a photovoltaic power generator according to an embodiment of the present invention; FIG. 6 is a cross-sectional view of a photovoltaic voltage generator according to an embodiment of the present invention after FIG. 5; FIG. 7 is a cross-sectional view of a photovoltaic voltage generator according to an embodiment of the present invention after FIG. 6; FIG. 8 is a cross-sectional view of a process of the photovoltaic voltage generator after FIG. 7 according to the embodiment of the present invention; FIG. 9 is a process of the photovoltaic voltage generator of FIG. 8 after the embodiment of the present invention;
4 1 9 83 4 五、發明說明（5) 剖面圖； 圖1 0是本發明實施例之光電壓產生器在圖9之後的製 程剖面圖； 圖1 1是本發明實施例之光電壓產生器在圖1 0之後的製 程刹面圖；以及 圖1 2是本發明實施例之光電壓產生器立體示意圖。 【較佳實施例之詳細說明】 本發明實施例的光電壓產生器會在接下來利用附圖來 加以說明它的運作方式以及製造方法。 圖3是本發明實施例的光電壓產生器，其中包含：一 基板3 1 ; —絕緣層3 2，位在基板3 1上；rr雜質擴散層3 3位 在絕緣層3 2上；p+雜質擴散層3 4位在絕緣層3 2上，且和rr 雜質擴散層3 3在和基板平行的方向形成多個縱向ρ η接面； ρ雜質擴散層3 5，連接到ρτ雜質擴散層3 4且延伸到rr雜質擴 散層33 ;η+雜質擴散層36，連接到rr雜質擴散層33 ;隔離 層3 7 ，適當地隔離各個區域，以及；薄膜電極層3 8，用以 串聯各個ρ η接面。 在圖3中，採用了 SO I晶片的平面氧化層來作隔離（即 是絕緣層3 2 )，取代了圖1 A和圖1 B中習用光電壓產生器的 隔離方式，以解決低良率以及高製造成本的缺點。同時， 本發明實施例之光電壓產生器的隔離層是形成在晶片表面 下方，並沒有利用到晶片表面，因此也就節省了如圖1A中 隔離層所消耗的面積，也節省了製造的成本。此外，本發4 1 9 83 4 V. Description of the invention (5) Cross-sectional view; FIG. 10 is a cross-sectional view of the process of the photovoltaic generator according to the embodiment of the invention after FIG. 9; FIG. 11 is a photovoltaic generator of the embodiment of the invention FIG. 10 is a perspective view of the manufacturing brake after FIG. 10; and FIG. 12 is a schematic perspective view of a photovoltaic generator according to an embodiment of the present invention. [Detailed description of the preferred embodiment] The photovoltaic generator according to the embodiment of the present invention will be described in the following using the drawings to explain its operation mode and manufacturing method. FIG. 3 is a photovoltaic generator according to an embodiment of the present invention, which includes: a substrate 3 1; an insulating layer 32 on the substrate 31; an rr impurity diffusion layer 33 on the insulating layer 32; p + impurities The diffusion layer 34 is located on the insulating layer 32 and forms a plurality of longitudinal ρ η junctions with the rr impurity diffusion layer 33 in a direction parallel to the substrate; the ρ impurity diffusion layer 3 5 is connected to the ρτ impurity diffusion layer 3 4 And extend to the rr impurity diffusion layer 33; the η + impurity diffusion layer 36 is connected to the rr impurity diffusion layer 33; the isolation layer 37, which appropriately isolates each region, and the thin film electrode layer 38, which is used to connect each ρ η connection in series surface. In FIG. 3, the planar oxide layer of the SO I wafer is used for isolation (that is, the insulating layer 3 2), which replaces the isolation method of the conventional photovoltaic generator in FIGS. 1 A and 1 B to solve the low yield rate. And the disadvantages of high manufacturing costs. At the same time, the isolation layer of the photovoltaic generator of the embodiment of the present invention is formed below the wafer surface, and the wafer surface is not utilized, so the area consumed by the isolation layer as shown in FIG. 1A is also saved, and the manufacturing cost is also saved . In addition, the hair
4 1 9 83 4 五、發明說明（6) 明採用橫向光電壓產生器串聯的方式。 另外，值得注意的是，為了達成將入射光的光能作充 分有效的利用，本發明採取了許多有效增加光能吸收的結 構，而直接提升光電轉換效率。 首先，在圖3中，利用了延伸的p雜質擴散層3 5增加ρ η 接面的面積（即是，除了 ρ+雜質擴散層3 4和η_雜質擴散層3 3 形成的Ρ η接面外，另外增加了 ρ雜質擴散層3 5和rr雜質擴 散層33形成ρη接面的面積）。同時為了擴大ρη接面空乏區 的面積以增加光電轉換效率，特別採用了較低雜質濃度的 rr雜質擴散層33以增加空乏區寬度（depletion width)。 另外，和習用光電壓產生器不同的是，本發明淺接面的P 雜質擴散層3 5並非高濃度雜質擴散層，理由和上述相同， 同樣也是為了擴大空乏區寬度以增加光電轉換效率。 再者，舉例來說，；5夕的量子效率（Q u a n t u m E f f i c i e n c y )在光波長大約0 · 8到1 0微米日寺達至，J近乎1 0 0 % 的最高點，但是可惜的是，在光波長大約0 . 8到1 . 0微米 時，石夕的光吸收係數（absorption coefficient)卻降低到 只乘彳1 02到1 (PcnT1左右，亦即即使矽厚度厚達1 0微米，仍然 有超過4 0 %或甚至到9 0 %的光能未被吸收。因此，為了克服 這項缺點，本發明特別加厚了矽的厚度，亦即圖3中的Η， 使Η厚度達4 0微米。而在這種情形下，不但入射的光能可 以在比較厚的矽中更有效的吸收，同時ir雜質擴散層3 3和 P+雜質擴散層3 4之間的ρ η接面面積也因厚度變厚而變的更 大，因此也大大增加了光電轉換的效率。4 1 9 83 4 V. Description of the invention (6) It shows that the horizontal photovoltaic voltage generator is connected in series. In addition, it is worth noting that in order to achieve the full and effective use of the light energy of the incident light, the present invention adopts a number of structures that effectively increase the absorption of light energy, thereby directly improving the photoelectric conversion efficiency. First, in FIG. 3, the extended p impurity diffusion layer 35 is used to increase the area of the ρ η junction (that is, except for the ρ η junction formed by the ρ + impurity diffusion layer 34 and the η_ impurity diffusion layer 3 3. In addition, the area where the ρ impurity diffusion layer 35 and the rr impurity diffusion layer 33 form a ρη junction is additionally increased). At the same time, in order to increase the area of the vacant region of the ρη junction to increase the photoelectric conversion efficiency, a rr impurity diffusion layer 33 with a lower impurity concentration is used to increase the depletion width. In addition, unlike the conventional photovoltaic generator, the P impurity diffusion layer 35 of the shallow junction of the present invention is not a high-concentration impurity diffusion layer. The reason is the same as above, and the same is to expand the width of the empty region to increase the photoelectric conversion efficiency. Furthermore, for example, the quantum efficiency of the 5th night (Quantum Efficiency) is reached at the light wavelength of about 0.8 to 10 microns, and the highest point of J is almost 100%, but unfortunately, When the light wavelength is about 0.8 to 1.0 micron, the absorption coefficient of Shi Xi is reduced to only multiply 彳 102 to 1 (about PcnT1), that is, even if the silicon thickness is as thick as 10 microns, More than 40% or even 90% of the light energy is not absorbed. Therefore, in order to overcome this disadvantage, the present invention particularly thickens the thickness of silicon, that is, Η in FIG. 3, so that the thickness of Η reaches 40. In this case, not only the incident light energy can be more effectively absorbed in the thicker silicon, but also the area of the ρ η junction between the ir impurity diffusion layer 3 3 and the P + impurity diffusion layer 34 is also affected. The thickness becomes thicker and larger, thus greatly increasing the efficiency of photoelectric conversion.
第10頁 y β3 4 五'發明說明（7) 但是，在上述這種情形下，為了讓可吸收光能的矽厚 度加厚，但又必須讓雜質擴散層3 4深達絕緣層3 2，基於製 程的考慮上，即使是高濃度的雜質擴散層會降低和ir雜質 擴散層3 3形成的ρ η接面的面積而降低光電轉換效率，仍然 必須使用到高濃度的離子佈植來形成ρ+雜質擴散層34。 然而，Ρ—雜質擴散層3 4雖然會降低和γγ雜質擴散層3 3 形成的ρ η接面的面積，但卻有另一項優點。在薄膜電極層 38和ρ+雜質擴散層34的金屬-半導體接觸（M-S contact)當 中，高濃度的f雜質擴散層3 4可以讓此接觸有效形成歐姆 接觸（ohmic contact)而降低整體串聯電阻。 同樣的，本發明實施例之光電壓產生器也採用了 n+雜 質擴散層3 6，和薄膜電極層3 8形成歐姆接觸而降低整體串 聯電阻。配合前述P+雜質擴散層3 4和薄膜電極層3 8的歐姆 接觸，可知本發明實施例之光電壓產生器整體串聯電阻相 當低。 圖4到圖1 1則是本發明實施例之光電壓產生器剖面 圖，而依照製程步驟的順序來排列。而本發明實施例之光 電壓產生器製造方法如下： 將rr雜質濃度的SOI(silicon on insulator)晶片的 表面磨平直到厚度為預設厚度，並清洗晶片表面，如圖4 所示； 利用微影製程（photolithography process)將p+雜質 擴散層34的區域用氧化層50定義出來，形成如圖5所示之 剖面圖，Page 10 y β3 4 5 'Description of the invention (7) However, in this case, in order to increase the thickness of the silicon that can absorb light energy, the impurity diffusion layer 3 4 must be as deep as the insulating layer 3 2, Based on process considerations, even a high-concentration impurity diffusion layer will reduce the area of the ρ η junction formed with the ir impurity diffusion layer 33 and reduce the photoelectric conversion efficiency. It is still necessary to use a high-concentration ion implantation to form ρ + Impurity diffusion layer 34. However, although the P-impurity diffusion layer 3 4 reduces the area of the ρ η junction formed with the γγ impurity diffusion layer 3 3, it has another advantage. In the metal-semiconductor contact (M-S contact) of the thin-film electrode layer 38 and the p + impurity diffusion layer 34, the high-concentration f impurity diffusion layer 34 can make this contact effectively form an ohmic contact and reduce the overall series resistance. Similarly, the photovoltaic generator of the embodiment of the present invention also uses an n + impurity diffusion layer 36 to form an ohmic contact with the thin-film electrode layer 38 to reduce the overall series resistance. In combination with the aforementioned ohmic contact between the P + impurity diffusion layer 34 and the thin-film electrode layer 38, it can be seen that the overall series resistance of the photovoltaic generator of the embodiment of the present invention is relatively low. 4 to 11 are cross-sectional views of photovoltaic voltage generators according to an embodiment of the present invention, and are arranged according to the order of process steps. The manufacturing method of the photovoltaic generator according to the embodiment of the present invention is as follows: smooth the surface of the SOI (silicon on insulator) wafer with rr impurity concentration until the thickness is a predetermined thickness, and clean the wafer surface, as shown in FIG. 4; A photolithography process defines a region of the p + impurity diffusion layer 34 with the oxide layer 50 to form a cross-sectional view as shown in FIG. 5.
第11頁 4 ί 983 4 五、發明說明（8) 之後施加以高濃度離子植入製程，形成如圖6所示之 剖面圖； 利用第二道微影製程將Ρ雜質擴散層3 5的區域用氧化層7 0 定義出來，如圖7所示之剖面圖； 之後利用離子植入形成Ρ雜質擴散層3 5，如圖8所示之 剖面圖； 利用第三道微影製程將η+雜質擴散層3 6的區域用氧化 層9 0定義出來，如圖9的剖面圖所示； 之後利用離子植入形成η+雜質擴散層3 6，如圖1 0所示 之剖面圖； 利用第四道微影製程將隔離層3 7的區域定義出來，如 圖1 1的剖面圖所示； 再將薄膜金屬層鍍覆在隔離層3 7彼此之間的空隙中， 就形成了如圖3 —樣的本發明實施例的光電壓產生器了。 以上所述的都是有關本發明實施例的光電壓產生器在 剖面圖結構上的改善。但是，本發明實施例在平面配置上 也做了一些改善的措施。 首先，本發明採用了平行線性排列為一光電壓產生器 陣列的方式加以配置，如圖1 2所示，而有別於習用技術， 如圖2。其最大的優點在於不須在剖面結構上作任何改 變，只需在平面上作任意的長-寬比例（即是圖1 2中L和W的 比例）的變化，即可來控制ρ η接面的面積以及ρ η接面串聯 數進而設計各個應用參數，這一點對電路佈局的設計者而 言是相當方便的。Page 11 4 983 4 V. Description of the invention (8) A high-concentration ion implantation process is then applied to form a cross-sectional view as shown in FIG. 6; a second lithography process is used to spread the P impurity diffusion layer 3 5 area It is defined by the oxide layer 70, as shown in the cross-sectional view shown in FIG. 7; Then, a P impurity diffusion layer 35 is formed by ion implantation, as shown in the cross-sectional view shown in FIG. 8; η + impurities are formed by the third lithography process. The area of the diffusion layer 36 is defined by the oxide layer 90, as shown in the cross-sectional view of FIG. 9; Then, η + impurity diffusion layer 36 is formed by ion implantation, as shown in the cross-sectional view of FIG. 10; The photolithography process defines the area of the isolation layer 37, as shown in the cross-sectional view of FIG. 11. The thin-film metal layer is plated in the gap between the isolation layers 37, so as to form FIG. 3 — Such a photovoltaic generator according to an embodiment of the present invention. What has been described above are improvements in the cross-sectional structure of the photovoltaic generator according to the embodiment of the present invention. However, in the embodiment of the present invention, some improvement measures are also made in the plane configuration. First, the present invention adopts a parallel linear arrangement as an array of photovoltaic generators, as shown in FIG. 12, which is different from the conventional technology, as shown in FIG. 2. Its biggest advantage is that it does not need to make any changes in the cross-sectional structure. It only needs to change any length-width ratio (that is, the ratio of L and W in Figure 12) on the plane to control the ρ η connection. The area of the surface and the number of ρ η junctions in series to design various application parameters are quite convenient for the designer of the circuit layout.
第12頁 ^83 4 五、發明說明（9) 另外，本發明實施例之光電壓產生器陣列的晶粒 (c h i p )隔離方式也和習用技術有很大的不同。在如圖1 B的 習用技術中，先形成所有隔離層（包含每個ρ η接面區域的 隔離層以及每個晶粒的隔離層，即是氧化層1 2 )後，再依 序形成ρη接面半導體層、介質層以及連線金屬層。本發明 實施例之光電壓產生器陣列則是先完成所有上述之本發明 的光電壓產生器結構後，最後再依需要在周邊區域形成平 台式結構（m e s a s t r u c t u r e )來分離每個晶粒，如圖1 2。 從上述比較中，可以知道本發明的晶粒隔離方式有幾 個優點：首先，在結構上，本發明的光電壓產生器陣列僅 在周邊區域形成隔離，可節省許多面積；其次，就製程而 言，本發明的結構不但是較簡單容易的製程、亦可以有效 提升良率，。 除此之外，本發明實施例之光電壓產生器陣列另一個 特點則是可和其他電路元件在同一晶粒内作整合而無須增 加微影製程來作元件隔離。如圖4到圖6的製程步驟中，除 了形成了 p+雜質擴散層3 4外，同樣的製程步驟也可以設計 用來作電路元件的接面隔離，換句話說，可以在同一製程 步驟t完成p+雜質擴散層34以及用以作為接面隔離的接 面〇Page 12 ^ 83 4 V. Description of the invention (9) In addition, the method of isolating the dies (c h i p) of the photovoltaic generator array according to the embodiment of the present invention is also very different from the conventional technology. In the conventional technique shown in FIG. 1B, all isolation layers (including the isolation layer of each ρ η junction area and the isolation layer of each grain, that is, the oxide layer 1 2) are formed first, and then ρη is sequentially formed. The semiconductor layer, the dielectric layer and the connection metal layer are connected. The photovoltaic generator array of the embodiment of the present invention first completes all the photovoltaic photovoltaic generator structures of the present invention described above, and finally forms a mesastructure in the surrounding area to separate each die as needed, as shown in the figure. 1 2. From the above comparison, it can be known that the grain isolation method of the present invention has several advantages: firstly, in terms of structure, the photovoltaic voltage generator array of the present invention only forms isolation in the peripheral region, which can save a lot of area; In other words, the structure of the present invention is not only a simple and easy process, but also can effectively improve the yield. In addition, another feature of the photovoltaic generator array of the embodiment of the present invention is that it can be integrated with other circuit components in the same die without the need to add a lithography process for component isolation. In the process steps shown in FIG. 4 to FIG. 6, in addition to forming the p + impurity diffusion layer 34, the same process steps can also be designed to isolate the junctions of circuit elements. In other words, they can be completed in the same process step t p + impurity diffusion layer 34 and a junction to isolate the junction.
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