TW419721B - Method of reducing line width of pattern by resist silylation process - Google Patents

Abstract

The present invention discloses a method of reducing the line width of a pattern by a resist silylation process, which uses the resist silylation process to push the dimensions of the contact and opening on a resist to finer dimensions. The method comprises: defining a resist with a required pattern by performing a spin-coating, a baking, an exposing and a developing process on a positive resist; and performing a flood exposure procedure and diffusing a silylation agent into the resist to carry out a silylation reaction with the resist, such that the resist will expand to a certain degree. By suitably selecting and controlling the resist, the silylation agent and the process conditions, together with the characteristics where the resist will expand after silylation, it is able to produce contacts, openings and interconnects with reduced dimensions thereby complying with the trend of reducing dimensions in device.

Description

A1Q721_____ V. Description of the Invention (1) [Field of the Invention] The present invention relates to a shadowing technology for a semiconductor process, and more particularly to a method for reducing a pattern line width using a resist silicidation process. [Background of the Invention] Photolithography can be said to be one of the most important steps in the entire semiconductor process, and whether the component concentration of the entire semiconductor industry can continue to smaller line widths. It also depends on the photolithography process. It depends on whether the development is smooth. In the development of the resist process technology, due to the single-layer photoresist process, the needs of future processes can no longer be met. Therefore, the bilayer resist and the resist silylation process are currently two. A highly regarded development trend. The resist silicidation process is also referred to as surface imaging technology (TOP_surface imaging; PSI) or DESIRE (diffusioon enhanced siiylated resistprocess), which uses the difference between the diffusion rate of the exposed and non-exposed areas of the resist in the resisting agent. Using plasma for dry development and defining the required pattern 'has the advantages of improving the resolution during exposure, increasing the depth of field (DOF), and increasing the resistance to etching. Taking the silicidation process of a positive resist as an example, the schematic diagram of the process is shown in Figures 1 to 1 (:). First, a semiconductor substrate 10 is coated with a positive resist 1 2 and then exposed through exposure 3 The polymer breaks the bond reaction there. In the subsequent silicidation process, only the photoresist at the exposed position will undergo silicidation reaction. You can finally remove the photoresist at the unexposed position with an oxygen plasma. The dry development pattern is obtained. The current resist silicidation process still has the following shortcomings that need to be improved: — (1) _ As shown in Figure 14a, the silicidation area in the traditional DESIRE process

419721 V. Description of the invention (2) ~~ --- It will form a M-shaped mouth ("bird, s beak) pattern" and cause dry-type Xianxian, biting ω A # c +, Λ, Α 'key size after displaying ti ( critlcal Dimension; CD) control difficulties and the increase of line edge roughness (resistance), and other disadvantages. '(2). Since there will also be a small amount of silicide formed in the non-silicided area, as shown in Figure 14b, there may still be a residue of Si0χ after dry development. In order to remove the residue of Si 0χ, The complexity of the dry development process. (3). In addition, the silicidation process of the negative photoresist may still have a silylated layer fl0w, which may cause the distortion of the pattern after dry development. [Summary of the invention]

The main purpose of the present invention is to solve the above-mentioned problems and provide a method for reducing the pattern line width by a resist silicidation process, which can make contact windows and lead holes with a small size, and is compatible with the existing lithography system. It is higher than DESIRE, and there are no problems such as the "south effect" and SiOx residue in the DESIRE process. X In order to achieve the above-mentioned object, the method of the present invention uses a process of resisting lithography to advance the contact windows and lead holes on the resist in a direction to make the size finer. After the positive resist is subjected to spin coating, baking, exposure, and development steps, a desired pattern can be defined on the resist. At this time, a 'flood exposure' procedure is added, and the property that the silicide can diffuse into the resist and undergo a silicidation reaction is used. After the silicidation, a limited expansion of the resist will be caused. Through proper selection and control of the resist, silicide, and process conditions, the characteristics of the resist's expansion after silicidation can be used to make contact windows, lead holes, interconnect trenches, etc. with a small size to allow for tighter Component design. 419721

In short, the method of the present invention includes the following main steps: coating a positive resist on a semiconductor substrate; (b), (a) forming the positive resist into a positive pattern; (c) resist pattern The development program determines exposure; and (d) silicides the resist pattern, and expands it comprehensively to reduce the line-width profile of the pattern. After silicidation, the positive resist suitable for the present invention does not have any common line photoresist, line photoresistor, and deep ultraviolet = resistance can be conventional 193nm photoresistor and electron beam resist. The silicidation process used in step (d) can be a dry silicidation process or a wet silicidation process, which will be explained in more detail later. Furthermore, 'for the easy removal of the photoresist after silicidation, before step (a),' a buffer layer that does not undergo silicidation reaction can be formed on the substrate ', such as a bottom anti-reflective layer (BARC), to avoid silicified light. Resistance to direct contact with the substrate. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, "the preferred embodiments are exemplified below, and coordinated with the accompanying drawings" are described in detail as follows: [Simplified description of the drawings] Section 1 A to 1C are a series of cross-sectional views to illustrate the conventional process of resist silicidation. Figures 2A to 2E are a series of cross-sectional views illustrating the silicidation process of the resist of the present invention. [Symbol description]-substrate '12 ~ positive resist; 12a ~ positive resist exposed area, 13 ~ exposure source; 14a, 14 silicide resist; 20 ~ substrate; 22, 22' ~ buffer

Page 6 41 ^ 72.1 ______ V. Description of the invention (4) layer; 22a ~ buffer layer exposure area; 22b ~ buffer layer full exposure area; 24 ~ positive resist; 24a ~ positive resist exposed area; 24b ~ positive Type resist comprehensive exposure area; 2, 5, 7 ~ exposure source; 2 8 ~ Shi Xihua resist. [Detailed description of the present invention] Please refer to FIG. 2A, which shows the initial steps of this embodiment. In the figure, 20 represents a semiconductor substrate. 'Several layers of metal interconnections and several electrically connected semiconductor components may be formed thereon, such as Mos transistors, resistors, logic elements, etc.' is a simplified diagram. For the sake of brevity, it is represented here only by a flat base. First, as shown in FIG. 2A, a buffer layer 22 and a positive resist coating film 24 are sequentially formed on the substrate. The buffer layer here can avoid the direct contact between the photoresist and the substrate after silicidation, which causes the problem of difficult removal. According to the present invention, the buffer layer is usually a coating (or resist) of an organic material, such as a bottom anti-reflective layer (BARC), and its main characteristics must be kept from being silicified in the subsequent silicidation process, regardless of the buffer. Whether the punching layer will be exposed and developed with the positive resist 24 can be applied to the process of the present invention. Buffer layer 22 and positive resist 24, such as g-line photoresistor, i-line photoresistor, deep ultraviolet photoresistor, 193nm photoresistor and electron beam resister, etc., can be applied by conventional spin coating. , Soft roasting and other steps to make. After the production of the buffer layer 22 and the positive resist 24 is completed, an appropriate exposure source is selected according to the type of the resist, such as an optical stepping machine or an electron beam direct writing machine, and exposure 25 is performed. In Figure 2A, 24a represents the exposed area of the positive resist. In this figure, the buffer layer underneath is also exposed along with it and later removed by development. After the exposure is completed, the demand of the visual resistance agent determines whether to make post exposure bake, and the general temperature is between 105 ~ 130 ° c.

Page 7_1L972L _ Five of the description of the invention (5 ^ ------- ^ after 'wet development' will show the potential pattern transferred by the resist layer as shown in Figure bismuth. Usually this step is used 2. 38% tetramethylammonium hydroxide, tetramethylammonia hydroxide; TMAH) developer. The above are the standard procedures of the general positive resist manufacturing process. The obtained positive pattern has a predetermined key size CD, and in the next manufacturing process, it is clear that by adding a comprehensive exposure and The Shi Xihua process reduced the key size of the pattern. Please refer to Fig. 2C, the developed resist pattern is subjected to a flood exposure 27, and all areas that were not originally exposed are fully exposed for subsequent silicidation. The next step is to perform a wet or dry silicidation process. The main steps of the wet silicidation process include: (a) baking before silicidation; (b) immersed in a specific chemical solution of the syrup to 'diffuse the silicide into the resist layer and react with it; (c) in a specific Cleaning in a solvent; (d) baking after silicification. The main steps of the dry silicidation process include: (a) baking before silicidation; 'diffusing the silicide into the resist layer and reacting with it in the vapor phase silicide vapor; (c) baking after silicidation (depending on the process needs) Depending). The reaction temperature of the wet silicidation process is from about to about 40 C. The commonly used solvent is xylene (X y 1 e n e). In addition, N-methylpyrrolidone (NMP) can also be added as a silicide diffusion promoter. The temperature of the dry silicidation process is relatively high, generally between about 1000 ° C and 2000 ° C. Commonly used silicides in the wet and dry silicidation processes are: hexamethyl disilazane (HMDS; hexamet hy 1 disilazane), DMSDEA (dimehtylsilyldiethylainine), tetramethyl disilazide (DMSDEA) TMDS i tetraraethyl disilazane), dimethylamino pentamethyl di

419721 V. Description of the invention (6) Shi Xiwan (PMDS; dimethylaminopnetamethyldisilane), N, N-dimethylaminotrisulphonyl Shiyan (TMSDMA; N, N-dimehtyla5iino tr i met hy1s i1 an e) and so on. Please refer to Figure 2D. After the above silicidation process, a silicide 28 will be formed on the surface (including the sidewall) of the resist pattern 24b, which will cause an expansion effect. As can be seen from the figure, the critical size of the pattern at this time has been reduced from the original CDi to CD2 due to the expansion characteristics of the resist after silicidation. For example, if a hole of 0.18 // m can be made on the resist, and if the resist expands by f 50 Angstroms after silicidation, a hole of 0.15 / zm can be made on the resist. In this way, the resist pattern with a smaller line width can be used as an etching mask to make a contact window or a pilot hole with a smaller size, or use this as a mask for ion implantation. Finally, the buffer layer 2 2 b together with the resist layer 2 4 b and the dream resist 28 are removed by a wet photoresist method. i In addition, as shown in Fig. 2E, this is the case when the buffer layer 22 used is not exposed and developed with the positive resist 24b. At this time, after development, the resist pattern can still be subjected to comprehensive exposure and silicidation process' in the manner described above without any impact. As long as the subsequent etching process is performed, the exposed buffer layer is removed in advance by an additional etch process. From the above, it can be known that 'the process proposed by the present invention uses the existing process and lithographic equipment' to add a comprehensive exposure and silicidation process, and the line width of the pattern outline can be reduced to respond to the development trend of component size reduction. In summary, compared with the conventional technology, the process of the present invention has the following advantages: (1) _Compatibility with the existing lithography process is higher than DESIRE, only need to add a comprehensiveness after the traditional wet development Flood exposure

Page 9 ___41PI7 ”____ 5. Inventive Description ⑺ ... '~-and silicidation process can be completed. The DES I RE process must still have a dry-type display machine., &Amp; (2). Use of resist The characteristics of swelling after silicification can make contact windows and lead holes with fine size. One (3). The process of the present invention will not produce silicified areas, and the pattern of bird's beak, so the control of key dimensions and the leveling of the resist Degree is better than DESIRE system. (4). Remove the resist in the exposed area by wet development. In the I-free process, there may still be troubles of Si Ox residues after dry development. (5). After the resist is broken, its anti-etching ability increases, so the thickness of the resist can be reduced and the resolution of the exposure can be improved ', thus increasing the lithography process (DOF). 'Although the present invention has been disclosed in the preferred embodiment as above, the combination of cowpea is equal to the present invention. Any person skilled in this art can make various modifications and decorations without departing from the spirit of the present invention. Therefore, The protection scope of the present invention shall be determined by the scope of the attached patent application.

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Claims (1)

419721______ 6. Scope of patent application 1. A method for reducing pattern line width using a resist silicidation process' includes the following steps: (a) coating a positive resist on a semiconductor substrate; (b) defined by exposure and development procedures The resist forms a positive pattern; (c) comprehensively exposes the resist pattern; and (d) silicides the resist pattern, and reduces the pattern line by expanding the resist pattern after silicidation Wide outline. 2. The method according to item 1 of the patent application scope, wherein before step (a), the method further comprises: forming a buffer layer on the substrate, and the buffer layer does not substantially undergo a silicidation reaction in a subsequent silicidation process. 3_ The method according to item 2 of the scope of patent application, wherein the buffer layer can be developed in step (b). 4. The method according to item 2 of the scope of patent application, wherein the buffer layer is not developed in step (b). -5. The method according to item 2 of the scope of patent application, wherein the buffer layer is a bottom anti-reflection layer. , Where the positive resistance i-line photoresist, deep purple 'where step (b) is more' where step (d) is, where step (d) is 6. The method agent system as described in item 1 of the scope of patent application It is selected from the group consisting of: g _line photoresistance, external photoresistance, 193 nm photoresistance and electron beam coupler. 7. The method described in item 1 of the patent application scope includes a post-exposure baking process. 8. The method described in item 1 of the scope of patent application is to carry out Shixihua in a wet process. 9. The method described in item 1 of the scope of patent application 419721_ VI. Scope of patent application The silicidation is performed by a dry silicidation process. 10. The method according to item 1 of the patent application scope, wherein after step (d), the method further comprises: using the resist pattern after silicidation as a mask, performing an etching or ion implantation process on the semiconductor substrate. Page 12