TW410462B - RC semiconductor integrated circuit having MIS surge protector - Google Patents

Abstract

A kind of RC integrated semiconductor device having a metal insulator semiconductor (MIS) surge protector which uses MIS surge protector to protect the capacitors. The advantages of the invention is that it has simple processes and the MIS surge protector could absorb higher energy to protect the circuit elements more effectively. The RC integrated semiconductor circuit with the MIS surge protector comprises: a resistor of which the first end is connected to the input terminal; a capacitor of which the first end is an output terminal connected to the second end of the resistor and the second end is grounded; and a surge protector, constructed by connecting one or more MIS in parallel, which is connected in parallel with the capacitor to protect the said capacitor. The characteristic is that the circuit is produced with the semiconductor technique such that on a semiconductor substrate the followings are formed: a resistor region; a capacitor region including a dielectric layer and upper/lower electrode regions; an MIS structure including an insulation layer, a semiconductor layer and a metal conductive region for providing the surge protection; an input/output electrode connection region; and the wires among the resistor region, the capacitor region and the MIS structure.

Description

410462 V. Description of the invention α) Background of the invention The present invention relates to a method in which a resistor, a capacitor, and a MI IS surge protector are integrated on a semiconductor substrate, thereby the MI IS surge protector provides the protection of the electric six. Semiconductor device. Description of related technology " Traditional RC circuits with protective elements are usually composed of discrete elements. The disadvantages are: the production cost is large, the layout area is large, and additional wiring is required for testing. And due to Yuan Du: 'Large gap affects its operating speed. With the development of semiconductor integrated circuits, the trend is to integrate R C circuits with protective elements, with the disadvantages of ancient @.珧 A related conventional technique is disclosed in U.S. Patent No. 5 3 5 5 0 1 4 ^ It has the invention name: 11 Semiconductor Device with Technology ': Figure 1 shows diode), resistor and capacitor, and the resistor and capacitor are connected in series, and then The base diodes are connected in parallel. The cathode of the Schottky diode 3 1 is connected to the first terminal of 衿 2 & special resistance 32, whose anode is grounded; the first terminal of capacitor 33, and the second terminal of electric} 2, Gan neodymium Du An Xinta α β, Bu., Inverse money in resistance

Integrated RC Network and Schottky D i 〇 ^ e »The circuit, where 3 1, 3, 3 3 are Schottky diodes (the second terminal of s 32, the second terminal of which is grounded. This circuit adopts Xiao protection. Capacitors and resistors to provide a path to discharge large currents: $ 2, damage to RC circuits caused by bulk waves or electrostatic discharge (ESD). Suppressing the semiconductor device corresponding to the circuit shown in Figure 2 is: 'A: Shaw is respectively formed on a semiconductor substrate; it basically uses the wiring between the f-poles of the thick-area resistance region 32, the capacitor region 33, and the three of them.

410462 V. Description of the invention (2) This RC integrated circuit with Schottky diodes overcomes the above problems of discrete element circuits. However, referring to FIG. 2, due to the complicated structure of the Schottky diode, the corresponding process is too complicated, and processes such as deposition, ion implantation, and even multiple interconnections must be used, so the production cost is very high. -Summary of the Invention In view of this, the main object of the present invention is to provide an integrated RC circuit using a MIS surge protector as a protection element, which has the greatest advantage. The advantage is that the manufacturing process is simple and the parallel connection of multiple MIS elements , Can provide greater surge or electrostatic discharge protection. According to the theory of semiconductor devices, if the barrier layer (i n s u 1 a t ◦ r 1 a y e r) of the M Ϊ S device is thin, its electrical characteristics are similar to Schottky diodes. Therefore, if an appropriate material is used and the thickness of the barrier layer of the M I S element is appropriately controlled, the M I S element produced can also be used as a protective element. Compared with Schottky diodes, the semiconductor manufacturing process of the M I S surge protector is simpler, and the number of M I S elements can be increased according to the current range to be absorbed. Therefore, the use of MI S surge protector can absorb larger current, so it provides more effective protection. • According to the present invention, 'resistance areas; capacitor dielectric layers, upper / lower electrode areas; MIS surge protectors, and metal conductive areas are formed on semiconductor substrates, respectively; and the above-mentioned resistors, capacitors, and MIS surges are formed separately on a semiconductor substrate. Wiring between wave protectors. Wherein, the above-mentioned M IS surge protector is connected in parallel with the capacitor, and then connected in series with the above-mentioned resistor. BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, advantages and features of the present invention are better realized by the following

Page 5 410462 V. Description of the invention (3) It can be understood more clearly in the detailed description of the embodiments and with reference to the drawings, in which: FIG. 1 shows a conventional RC circuit with a Schottky diode: FIG. 2 shows FIG. 1 A longitudinal sectional view of a semiconductor device corresponding to the circuit; Fig. 3 is a process flow chart of the present invention; Fig. 4 (a) shows a preferred embodiment of an RC circuit for protecting a capacitor with a MI IS surge protector according to the present invention; 4 (b) is an actual circuit using one of the circuits of FIG. 4 (a); FIG. 5 is a cross-sectional view of the semiconductor device corresponding to the circuit of FIG. 4 (b); Sectional view. DESCRIPTION OF SYMBOLS 10: Substrates 1 1 and 5 1 · Μ IS surge protector 31: Ytteki diode, 1 2, 3 2, 5 2: Resistance i 3, 3 3, 5 3: Capacitance 1 0 Insulating layer (iSola ti 〇n layer) 120 Dielectric layer (die 1 ectric 1 ayer) 130 Resistance layer (i ns ul at 0 r layer) 140 Resistive layer 150 Isolation layer (d if fu si 0 π barrier layer ) 160 Upper metal conductive layer 170 Detailed description of the preferred embodiment of the lower electrode layer

Page 6 410462 V. Description of the invention (4) With reference to the drawings, the preferred embodiment of the present invention will be described in detail below. Fig. 4 (a) shows a preferred embodiment of the RC circuit according to the present invention, in which the capacitor 13 is protected by a M IS surge protector 11 which is connected in parallel with the capacitor 13 It is then connected in series with the resistor 1 2. Fig. 4 (b) is an actual circuit using the circuit of Fig. 4 (a). This RC circuit contains 8 branch circuits, and the corresponding input / output terminal can be selected as required. Fig. 5 is a cross-sectional view of a semiconductor device corresponding to the circuit of Fig. 4 (b). FIG. 6 is a longitudinal sectional view taken along line AA of FIG. 5. As shown in FIG. 6, the semiconductor substrate 10 mainly includes a M IS surge protector 5 1, a resistor 5 2, and a capacitor 53. The process, materials, etc. of making the wafer are described below with reference to FIG. 3. -N-type wafer is used as the material of the substrate 10 ^ On the entire surface * An insulating film with a thickness of about 1 ~ 2 # m is coated by sputtering, steaming, CVD or thermal oxidation. This insulating film is mainly used for Avoid conducting the resistance area and the input / output electrode connection area with the substrate. Then, by photolithography (p h 〇 t ο 1 ith 〇 g r a p h y) technology, the areas other than the resistance area and the input / output electrode connection area are etched to form the insulation layer 1 10 of the resistance area and the input / output electrode connection area. Then, a dielectric layer made of a metal oxide such as Ta2 05 or Si 02 is coated on the entire surface by sputtering, vapor deposition, CVD, or thermal oxidation, and the thickness is about 3 0 0 to 2 0 0 0 A. Then, by first etching and etching this dielectric layer 120, a region required for forming the M I S surge protector is obtained. On the entire surface, the barrier layer 130 of the IS surge protector is covered by j by sputtering, evaporation, CVD, or thermal oxidation. The barrier layer 1 3 0 is very thin, about 50 to 30. 0 A, which can be composed of metal oxides such as Ta205, ZnηO or S i 02 _

Page 7 410462 V. Description of the invention (5). Then, on the entire surface, a layer of resistive material consisting of resistive materials such as TaN-TaAl, NiCr, or CrSi is formed by sputtering, vapor deposition, or CVD. The thickness is about 5 0 ~ 2 5 0 0 AD Then, in order to prevent the interaction between the electro-resistive layer 140 and the upper metal conductive layer thereon, the thickness is coated on the resistive layer 140 by sputtering, evaporation, or CVD. The isolation layer 150 is about 3000 ~ 500 OA, and the isolation layer 150 may be composed of Ti, TiN or Ti W. Further, on the entire surface and above the isolation layer 150, a metal conductive layer 160 having a thickness of about 1 to 2 μm is formed by sputtering, steaming, or CVD, and the upper metal conductive layer is formed. 160 may be made of metal such as A1, Cu, Au or Ag. Then, by photolithography and selective etching of the upper metal conductive layer 160, two electrodes of the resistor, a metal layer of the MIS surge protector, an electrode plate above the capacitor, and an input / output electrode connection area are formed, and a resistor I is formed. The required wiring between the capacitor and the MI IS surge protector = Then, in the area used to form the resistor, the isolation layer 150 and the upper metal conductive layer 1 on the resistance layer 140 are removed through photolithography and selective etching. 6 0 to form a resistance region. Finally, on the entire lower surface of the silicon substrate 10, a layer made of metal such as A1, Au, or Ag having a thickness of about 2000 to 50000 A is formed by sputtering, evaporation, or CVD. Layer as the lower electrode layer. In the above embodiment, an example in which each R C branch circuit has one M I S burst :) wave protector is described as an example. However, the number of R C branch circuits and the number of M I S surge protectors are not limited to this, and the RC branch can be changed as needed _

410462 V. Description of the invention (6) Increase the number of M I S surge protectors in the circuit. The specific embodiments proposed in the detailed description of the preferred embodiments are only for easy explanation of the technical contents of the present invention, and are not intended to limit the present invention to this embodiment in a narrow sense. The patents are not to exceed the spirit of the present invention and the following -The scope of the situation can be implemented in various changes. For example, a P-type silicon wafer having a high doping concentration may be used as the substrate.

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Claims (1)

Wai J- #, Special Education Statements The circuit protector of the circuit body has a volume CR, and the protection wave burst SI Μ has a variety of resistances Xuan = α at the connection, terminal, and the input at the output terminal. The continuous cropping terminal and one by one; The connection, > the terminal resistance capacity two electric power first one of the end of the technical skills to guide the MI capacity: use ·, the number of electricity in the collection area should be in the system area or on the road to block a special electricity: electricity together In order to form a protective device, members must ask the members to indicate clearly that the protective device is connected to the forming unit of the protective device, and that the protective device is used to separate the upper guide of the base plate. Whether the original substance is changed after the amendment of this case The internal power supply and transmission area 1 1 raises a resistance. The electrical area should include the encapsulation area i 1 above and the stratum. It is connected to the second surrounding area—system: I electricity, protecting the electrical area to ensure the structure of the area. Wave /, capacity si. Burst into the domain layer β, including half-block and zone electricity; the domain belongs to the regional gold pole and the lower layer of the body. Please apply for the following steps: From-· The whole board above should be based on ' Road; thin electrical edge of the base of the body; one-half of the body ’s base is covered with a double-shaped envelope; The upper surface of the upper and lower plate should be used for the input and output of the resistance and the resistance to the power. The avoidance should be used to cover the upper surface with the layered insulation and the upper surface. Based on the stratification of the epistratum and the median area, page 10, 1999. 04. 29.010, Wai J- #, Specialized Education Yanshen 'Six-inclusive Correction The circuit protector of the circuit body has a volume CR, and the protection wave burst SI Μ has a variety of resistances Xuan = α at the connection, terminal, and the input at the output terminal. The continuous cropping terminal and one by one; The connection, > the terminal resistance capacity two electric power first one of the end of the technical skills to guide the MI capacity: use ·, the number of electricity in the collection area should be in the system area or on the road to block a special electricity: electricity together In order to form a protective device, members must ask the members to indicate clearly that the protective device is connected to the forming unit of the protective device, and that the protective device is used to separate the upper guide of the base plate. Whether the original substance is changed after the amendment of this case The internal power supply and transmission area 1 1 raises a resistance. The electrical area should include the encapsulation area i 1 above and the stratum. It is connected to the second surrounding area—system: I electricity, protecting the electrical area to ensure the structure of the area. Wave /, capacity si. Burst into the domain layer β, including half-block and zone electricity; the domain belongs to the regional gold pole and the lower layer of the body. Please apply for the following steps: From-· The whole board above should be based on ' Road; thin electrical edge of the base of the body; one-half of the body ’s base is covered with a double-shaped envelope; The upper surface of the upper and lower plate should be used for the input and output of the resistance and the resistance to the power. The avoidance should be used to cover the upper surface with the layered insulation and the upper surface. Based on the stratum epitope and the dielectric region in a region of the concatenated pole. Page 10 1999. 04. 29.010 Case No. Oblique Year ★ Month Amendment 6. The scope of the patent application is used as the dielectric material of the capacitor; Forming the M IS area; covering a thin barrier layer on the entire surface and covering the dielectric layer as a barrier film of the M ΪS structure; covering a resist layer on the entire surface and covering Overlying the above barrier layer to form a resistance layer; covering an isolation layer over the entire surface and covering the above resistance layer to prevent the resistance layer from interacting with the first conductive layer; covering A conductive layer is formed on the entire surface and covers the above isolation layer. The two electrodes of the resistor, the metal layer of the MI structure, and The electrode plate above the capacitor and the input / output electrode connection area, and the required wiring between the resistor, the capacitor, and the MI structure is formed; the resistor is formed in the above-mentioned resistor layer by photolithography and selective etching; A second conductive layer is formed on the entire lower surface of the substrate as a lower electrode layer of the capacitor. 3. For example, the RC integrated semiconductor circuit with MIS surge protector with the second scope of the patent application, in which the above-mentioned insulating layer is sequentially formed by any of methods such as sputtering, evaporation, CVD, or thermal oxidation. 、 Dielectric layer, barrier 4. For example, the RC integrated semiconductor circuit with MIS surge protector in the scope of patent application No. 3, which adopts the method of sputtering, vapor deposition or c VD Page 11 1999. 04.29. 011 Case No. Oblique Year ★ Month Amendment VI. Apply for a patent as the dielectric material of the capacitor; form the M IS area by photolithography and selective etching; cover a thin barrier layer Covering the entire surface and covering the dielectric layer as a barrier film of the MEMS structure; covering a resistive layer on the entire surface and covering the barrier layer to form a resistive layer; covering a The isolation layer is on the entire surface and covers the above-mentioned resistance layer to prevent the resistance layer from interacting with the first conductive layer; the first conductive layer is covered on the entire surface and covers the above isolation layer; by photolithography and Selectively etch the two electrodes of the resistor, the metal layer of the MI structure, the electrode plate above the capacitor, and the input / output electrode connection area on the isolation layer and the conductive layer together, and form the resistor, the capacitor, and Required wiring between the M IS structures; forming the resistor in the above-mentioned resistance layer by photolithography and selective etching; forming a second conductive layer on the entire substrate A lower surface, a lower electrode layer of the capacitor. 3. For example, the RC integrated semiconductor circuit with MIS surge protector with the second scope of the patent application, in which the above-mentioned insulating layer is sequentially formed by any of methods such as sputtering, evaporation, CVD, or thermal oxidation. 、 Dielectric layer, barrier 4. For example, the RC integrated semiconductor circuit with MIS surge protector in the scope of patent application No. 3, which adopts the method of sputtering, vapor deposition or c VD Page 11 1999. 04.29. 011 _ Case No. 88101 or 篆 〇462 Year ^: Month >? Day _Hi__ VI. Apply for a patent garden. Either form the above-mentioned resistance layer, isolation layer, first A conductive layer and a cover two conductive layer 05. For example, the RC integrated semiconductor circuit with the MI IS surge protector with the fourth scope of the patent application, wherein the material used for the barrier layer in the MI IS structure is Ta2. 5. ZnO or Si02 ° 6. For the RC integrated semiconductor circuit with M IS surge protector in item 4 of the patent application scope, wherein the above-mentioned resistance layer is composed of a resistance material such as TaN, TaAl, NiCr, or C r S _i . 7. For example, the R C integrated semiconductor circuit with the M I S surge protector in the scope of the patent application, wherein the substrate is an N-type Shi Xi wafer with a high doping concentration. 8. For example, the R C integrated semiconductor circuit with the MI S surge protector in the scope of the patent application, wherein the substrate is a P-type dream wafer with a high doping concentration. Page 12 1999. 04. 29. 012 _ Case No. 88101 or 篆 〇462 Year ^: Month ~ >? Day _Hi__ VI. Apply for a patent garden. Either form the above-mentioned resistance layer, isolation layer in sequence 5. The first conductive layer and the second conductive layer cover. 5. For example, the RC integrated semiconductor circuit with the MI IS surge protector with the fourth scope of the patent application, wherein the material used for the barrier layer in the MI IS structure is Ta205, ZnO, or Si02 ° 6. For example, the RC integrated semiconductor circuit with M IS surge protector with item 4 in the patent application scope, wherein the above-mentioned resistance layer is made of TaN, TaAl, NiCr, or C r S _i Material composition. 7. For example, the R C integrated semiconductor circuit with the M I S surge protector in the scope of the patent application, wherein the substrate is an N-type Shi Xi wafer with a high doping concentration. 8. For example, the R C integrated semiconductor circuit with the MI S surge protector in the scope of the patent application, wherein the substrate is a P-type dream wafer with a high doping concentration. Page 12 1999. 04. 29. 012