4862twf.doc/008 409287 A7 B7 經濟部智慧財疫局MS：工消費合作社印製 五、發明說明（〖） 本發明是有關於一種微影的曝光製程，且特別是有關 於一種量測晶片之焦距與平面位置的方法。 微影係現今主導積體電路製程整合的一種核心技術。 舉凡是與半導體元件之結構相關的薄膜層，其圖案的定義 均是由微影步驟來決定。因此，在半導體元件小型化的發 展中，微影是一項決定性的關鍵因素。 在微影製程的曝光技術中，聚焦(Focus)與晶片表面@ 平面位置(Leveling)是決定圖案轉移精確與否的重要關 鍵。因此，在進行曝光製程時，必須考量晶片上不同位置 的聚焦深度(Depth of Focus)以及其平面位置，方能使光罩 的圖案完全且精確地轉移至光阻層之上。 請參照第1圖，係繪示一晶片10，此晶片1 〇具有數條 橫向切割道（Scribe Line)20與縱向切割道22，用以將晶片 10區分爲數個晶方(Die)24。由於目前曝光的製程係以重複 且步進的方式施行’因此’依照每一次可以曝光的面積， 晶片10可以區分爲數個曝光區塊(Shoot)14。在進行曝光之 HU，係逐一將晶片10上之曝光區塊I4之中的對準標記 對準光罩上的對準標記，之後，利用感測器（Sens〇r)，進行 該曝光區塊Μ之焦距與平面位置的偵測，然後，再經由偵 測所得到的數據決定晶片1 0中每一個曝光區塊i 4的聚焦 深度以及其平面位置，以進行曝光製程。 由於感測器在偵測每一曝光區塊14之平面位置時，係 以固定位置之偵測點進行偵測，如圖式中以固定位置之 X、Y、Z三個偵測點決定該曝光區塊丨4之平面的位置， 因此’對於晶片10之內部區塊，例如圖示中之曝光區塊 3 本紙張用中國國家標準（CNS)A4 ^"<210x 297公髮)-~~~ - (請先閱讀背面之注意事項再填寫本頁) · I I 1 I 訂---------. 409287 A7 B7 4862twf.doc 臟 五、發明說明（>) 14a，也就是晶片10上可以將感測器之固定偵測點涵蓋於 其中的區塊(Whole Field)均能有效的評估。但是’對於晶 片10的邊緣區塊（Wafer Edge Field)14b，由於感測器其固 定之偵測點中僅能容納X、Y，並不能使三個偵測點Χ、Υ、 Z完全座落於邊緣區塊14b之中（Non-Whole Field)，因此’ 習知以固定位置之偵測點偵測晶片10中各個曝光區塊14 之表面的位置的方式，並不能用以評估晶片1〇的邊緣區塊 14b，而必須透過邊緣區塊14b其附近之內部區塊14a所獲 得之偵測値，利用外插計算的方式予以推算。 但是，由於晶片10在進行半導體的製程時會產生許多 的應力，當這些應力累積於晶片10上時，將使晶片10產 生彎曲形變。在第2圖即繪示一種產生在其邊緣區塊14b 產生彎曲形變之晶片10的背面。此晶片1〇其內部區塊14a 與邊緣區塊14b的表面傾斜程度相距甚大，若以邊緣區塊 14b其相鄰之內部區塊14a所獲得之偵測値A與B，利用 外插計算的方式估計邊緣區塊14b之平面位置’則估計之 邊緣區塊14b的平面將座落於標記C所示之平面，然而邊 緣區塊14b之實際的平面卻在D平面。由於估計値C與實 際値D其二者相去甚遠，因此，若以外插所得之D平面作 爲評估邊緣區域14b之平面的位置，進而修正曝光的焦距 與平面位置，光罩上的圖案並無法精確地轉移至晶片10的 光阻之上，製程的良率將因此而下降。 有鑑於此，本發明提供一種微影之曝光技術，可以將 光罩的圖案精確地轉移至光阻層上。 本發明提供一種微影之曝光技術，可以偵測晶片各區 4 ------------ --------訂------------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印载 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 經濟部智慧財產局員工消費合作社印製 409287 4862Twf.doc/008 五、發明說明（s ) 塊之平面位置與焦距，以完成正確之曝光製程。 本發明提供一種微影之曝光技術，可以有效偵測晶片 之邊緣區塊的平面位置與焦距，以完成正確之曝光製程。 本發明提供一種微影之曝光技術，以選取晶方其邊角 處之晶片對準標記進行各個曝光區塊之平面位置與焦距的 偵測，完成正確之曝光製程。 本發明提出一種微影之曝光技術，此技術係提供一晶 片與一光罩，其中所提供之晶片區分爲數個曝光區塊，這 些曝光區塊係以數條縱向切割道與數條橫向切割道區分爲 數個晶方，並且在晶片上之縱向切割道與橫向切割道交錯 之處具有一晶片對準標記D而所提供之光罩在對應於晶片 上之晶片對準標記之處具有光罩對準標記。在進行曝光之 前，先將晶片之對準標記對準光罩之對準標記，然後，至 少選取緊鄰有效晶方的任何三個晶片對準標記，進行該曝 光區塊之焦距與平面位置的偵測，其後，再進行曝光區塊 之曝光製程。 本發明提出一種微影之曝光技術，此技術係提供晶片 與一光罩，其中所提供之晶片可以區分爲數個曝光區塊， 各個曝光區塊中具有寬度相同的切割道，環繞在晶方之周 緣，而且在各個晶方其邊角處的切割道上均具有一晶片對 準標記。而所提供之光罩在對應於晶片上之晶片對準標記 之處則具有光罩對準標記。在進行曝光之前，先將晶片之 對準標記對準光罩之對準標記，然後，在曝光區塊中，至 少選取有效晶方其邊角處的任何三個晶片對準標記，進行 該曝光區塊之焦距與平面位置的偵測，其後，再進行曝光 5 ^紙張尺度適用中國國家標準<CNS)A4規格(210x297公釐) ^ (請先閱讀背面之注意事項再填寫本頁) 裝 訂---------線·— 經濟部智慧財產局員工消費合作社印製 409287 4862twf.doc/008 , 五、發明說明（¥ ) 區塊之曝光製程。 依照本發明實施例所述，至少選取任何三個晶片對準 標記，進行該些曝光區塊之焦距與平面位置的偵測步驟 中，任何三個晶片對準標記係最能表示該些曝光區塊之有 效晶方的平面位置者，或是所能涵蓋最多有效晶方的三個 晶片對準標記。 由於本發明係選取晶片上之任何三個對準標記進行偵 測，因此，不但可以偵測晶片內部之曝光區塊，本發明之 方法亦可以偵測晶片邊緣區域的曝光區塊，以決定晶片上 之各個曝光區塊之焦距與平面的位置，而不需要以外插的 方式估晶片邊緣區域之曝光區塊。 另一方面，由於本發明在偵測各個曝光區塊的過程 中’偵測點的選擇僅考慮各個曝光區塊之中的有效晶方， 而並不考慮曝光區塊之中的非有效晶方，因此，可以減少 因爲考慮非有效晶方所產生的誤差。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特舉一較佳實施例，並配合所附圖式，作詳 細說明如下： 圖式之簡單說明： 第1圖是習知一種晶片的示意_ ; 第2圖是習知一種產生彎曲形變之晶片的示意圖； 第3圖TH {衣照本發明第-較佳實施例之晶片的示意 圖， 第4圖是依照本發明第-較佳實施例之光罩的示意 圖； 6 本紙張叉度適用中國國家標準\CNS>A4現格（210 X 297^^------- (請先閱讀背面之注意事項再填寫本頁) -----I 1 訂--I-----•線 A7 A7 4862twf.doc/008 B7_ 五、發明說明（Γ ) 第5圖是依照本發明第二較佳實施例之晶片的示意 圖I以及 第6圖是依照本發明第二較佳實施例之光罩的示意 圖。f 標記之簡單說明： 10、200、500 晶片 12、206、506 晶片對準標記 14、208、210、508、510 曝光區塊 14a 內部區塊 14b 邊緣區塊 20、202、502 橫向切割道 22、203、503 縱向切割道 24 ' 204、504 晶方 204a、504a 有效晶方 504a、504b 無效晶方 212、214 區域 300 ' 600 光罩 302、602 光罩對準標記 5〇2a 具有雙重切割道寬度之橫向切割道 5〇3a 具有雙重切割道寬度之縱向切割道 A、B、C、D 平面 E、F、G、H、I、J、K、L、〇、P、Q、R、S、T、U、 V、X、Υ、Z 偵測點 第一實施例 請參照第3圖，提供一晶片200，此晶片200具有數條 (請先閱讀背面之注意事項再填寫本頁) ------ — 丨訂---------- 經濟部智慧財產局員工消費合作社印*'1^ 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 409287 A7 B7 4862t\vf.doc/008 五、發明說明） 橫向切割道(Scribe Line)202與縱向切割道203，用以將晶 片200區分爲多數個晶方(Die)204。而且，在每一個縱向 切割道203與橫向切割道202相互交錯之處均具有晶片對 準標記206，亦即是在晶方204其各個邊角處的切割道上 均會有一個晶片對準標記206。 由於目前半導體製程的曝光技術係採用重複與步進 (Step and Repeat)的方式，以將光罩300上的圖案以一個區 塊、一個區塊的方式轉移至晶片200上，因此，依據曝光 機台每一次所能曝光的面積大小以及積體電路的設計，晶 片200可以區分爲數個曝光區塊208與曝光區塊210。 上述之曝光區塊208,係表示位於晶片200內部之曝光 區塊，此曝光區塊208之中的晶方204均屬於有效晶方 2(Ma，亦即，此區塊208之中的晶方204均是具有四個邊 角且完整無缺的晶方，而且在橫向切割道2〇2與縱向切割 道203交錯之處均具有一個完整的晶片對準標記206。在 本實施例的圖示中係以四個有效晶方204a表示，因此，在 曝光區塊208之中則包括四個晶片對準標記206。但是， 在實際的應用上則可以依照曝光機每一次所能曝光的面積 大小以及積體電路的設計來決定每一個曝光區塊的晶方數 目。 曝光區塊210，係表示位於晶片邊緣之曝光區塊，此曝 光區塊210之中的晶方204部分係屬於有效晶方2〇4a ;部 分屬於非有效晶方204b。圖式中標記212所涵蓋之晶方 204，均是具有四個邊角且完整無缺的晶方。而圖式中標記 214所涵蓋之晶方204，則是屬於有缺角的非有效晶方 8 --- -----— — I, ---- (請先閱讀背面之注意事項再填寫本頁) 訂---------線 經濟部智慧財產局員工消費合作社印製 本紙張尺度洎用中國國家標準（CNS)A4規格（210 X 297公釐） 經濟部智慧財產局員工消費合作社印製 彻287 4862twf.doc 娜 五、發明說明（）） 204b。也就是每一個曝光區塊210之中的有效晶方204a的 數目小於四’完整的晶片對準標記的數目亦小於四。 接著’請參照第4圖，本發明所提供之光罩3〇〇除了 具有用以圖案轉移的圖案301之外，還包括光罩對準標記 3 02。光罩對準標記3 02的位置係與晶片200上之晶片對準 標記206的位置相互對應。 本發明在進行曝光之前，係先將每一個曝光區塊208 或曝光區塊210的晶片對準標記206對準光罩300之光罩 對準標記302，然後再進行焦距與平面位置的偵測。 由於任意三點即可決定一平面，因此，本發明在進行 曝光區塊2〇8或曝光區塊210的焦距與平面位置的偵測步 驟時，係至少選擇緊鄰於有效晶方204a其邊角之處的任何 三個晶片對準標記206作爲偵測點進行偵測，以決定曝光 區塊2〇8或曝光區塊210在曝光時之最佳焦距與平面位 置。較佳的偵測點係選擇三個可以最能表示實際之曝光區 塊208或曝光區塊210之中之有效晶方204a的情況者，例 如是可以涵蓋最多有效晶方204a之三個晶片對準標記 206 ° 以位於晶片200內部區域之曝光區塊208爲例，由於 曝光區塊208之中的晶方均屬於有效晶方204a，因此，在 進行焦距與平面位置的偵測時，可以任意選擇任何三個緊 鄰於晶方2(Ma其邊角之處的對準標記206，或是三個以上 緊鄰於晶方2〇4a其邊角之處的對準標記206進行焦距與平 面位置的偵測’例如是選取E、F、G三點進行偵測，或是 選取E、F、Η三點進行偵測。但是，以選取e、F、Η三點 9 本紙張尺度適用中國國家標準（CNS)A4規格（21〇 X 297公爱） (請先閱讀背面之注意事項再填寫本頁) 裝--------訂------I —線 409287 A7 B7 4862twf.doc/008 五、發明說明（） 進行偵測較佳，因爲E ' F、G三點所圍繞之面積較大，較 能反應多數之有效晶方的情況，所得之偵測値會比較接近 實際之曝光區塊208的狀況。 但是，對於晶片200邊緣區域的曝光區塊21〇而言， 由於曝光區塊210之中的晶方有一部分是屬於有效晶 方2(Ma，如圖式中標記212所涵蓋之晶方204，亦有一部 份是屬於非有效晶方2〇4b，如圖式中標記2丨4所涵蓋之晶 方。因爲非有效晶方204b並無法製成產品’所以，在選取 偵測點進行偵測時，僅需選取標記212範圍之中緊鄰於晶 方204其邊角之處的對準標記206，而並不考慮標記214 範圍之中所涵蓋之晶片對準標記206。舉例而言，在偵測 曝光區塊210之焦距與平面位置時，可以以I、J、K三點， 或是以I、J、L三點進行偵測，其中I、J、K三點所圍繞 的區域均是屬於有效晶方，而I、J、L三點則涵蓋部分的 非有效晶方。若以I、J、L三點之偵測値作爲估計曝光區 塊210的平面位置與焦距，將與實際上在曝光區塊210之 中的有效晶方2(Ma的平面位置與焦距產生差距，而導致無 法將光罩的圖案精確轉移至光阻層的情況。若是以I、J、 K三點之偵測値作爲估計曝光區塊210的平面位置與焦 距，則由於此三偵測點所圍繞的區域均是屬於有效晶方 204a，因此’較能反應出實際的情況，使光罩3〇〇的圖案 較能精確地轉移至光阻層上。 在進行焦距與平面位置的偵測步驟之後，依照每一個 曝光區塊208或曝光區塊210所得之偵測値調整曝光光源 之焦距’並決定曝光區塊之最佳平面位置的調整量，進行 (請先閱讀背面之注意事項再填寫本頁) 裝- ----- -訂------I--線· 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 409287 A7 B7 4S62twf.doc/008 五、發明說明（） 曝光製程’以使光罩300之上的圖案轉移至每一個曝光區 塊2〇8或曝光區塊210之上。 第二實施例 請參照第5圖，提供一晶片5〇〇，此晶片500具有數條 橫向切割道5〇2與數條縱向切割道5〇3，用以將晶片5〇〇 區分爲數個晶方504。橫向切割道502可以區分爲具有單 一切割道寬度的橫向切割道502&以及具有雙重切割道寬 度（Double Scribe Line Width)的橫向切割道 502b，其二者 彼此相互交替。縱向切割道503亦分爲具有單一切割道寬 度的縱向切割道502a以及具有雙重切割道寬度的縱向切 割道502b，而且其二者彼此相互交替。傳統上，晶片的切 割道是具有雙重切割道寬度者，通常係可以配置測試鍵 (Test Key)之用。 依據曝光機每一次所能曝光的面積大小以及積體電路 的設計，晶片500可以區分爲數個曝光區塊508與曝光區 塊510。也就是將晶片500中具有雙重切割道寬度之橫向 切割道502b以及縱向切割道503b分別分割成單一切割道 之寬度之後，晶片500則可區分爲二種曝光區塊’如圖示 中之曝光區塊508與曝光區塊51(^ 曝光區塊508,係表示位於晶片500內部之曝光區塊， 此曝光區塊508之中的晶方504均是屬於有效晶方5〇4a ’ 各個晶方504a係由寬度相等的橫向切割道與縱向切割道 所環繞，而將其彼此區分開來，而且各個晶方504其邊角 的切割道上均具有一個完整的晶片對準標記506 °在本：實 施例的圖示中係以四個有效晶方5(Ma表示’因此’在每一 -I-------I----^ --------訂---------I (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 409287 A7 4862twf.doc/008______ 五、發明說明（P) 個曝光區塊508之中則包括九個晶片對準標記506。但是， 在實際的應用上則可以依照曝光機每一次所能曝光的面積 大小以及積體電路的設計來決定每一個曝光區塊的晶方數 目。 曝光區塊5 10,係表示位於晶片500邊緣之曝光區塊， 此曝光區塊510之中的晶方504部分係屬於有效晶方 5〇4a，部分屬於非有效晶方504b，因此整個曝光區塊510 之中的有效晶方504a的數目小於四，換句話說整個曝光區 塊510之中的對準標記506的數目小於九。 接著，請參照第4圖，本發明所提供之光罩600除了 具有用以圖案轉移的圖案601之外，還包括光罩對準標記 6〇2。光罩對準標記602的位置係與晶片500上之晶片對準 標記506的位置相互對應。 本發明在進行曝光之前，係先將每一個曝光區塊5〇8 或曝光區塊510的晶片對準標記506對準光罩600之光罩 對準標記602，然後再進行焦距與平面位置的偵測。 由於任意三點即可決定一平面，因此，本發明在進行 曝光區塊508或曝光區塊510的焦距與平面位置的偵測步 驟時，係至少選擇每一個曝光區塊5〇8或510之中緊鄰於 有效晶方504a其邊角之處的任何三個晶片對準標記506作 爲偵測點進行偵測，以決定曝光區塊5〇8或曝光區塊510 在曝光時之最佳焦距與平面位置。較佳的偵測點係選擇二 個最能表示實際之曝光區塊508或曝光區塊51〇之中之有 效晶方504a的情況者，例如是可以涵蓋最多有效晶方5(Ma 之三個晶片對準標記506。 (請先閱讀背面之注意事項再填寫本頁) 裝--------訂---------線— 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210x 297公髮） A7 B7 409287 4862twf.doc/008 發明說明（（（） 以位於晶片500內部區域之曝光區塊508爲例’由於 曝光區塊508之中的晶方5〇4均屬於有效晶方5〇4a，因此， 在進行焦距與平面位置的偵測時’可以任意選擇此曝光區 塊508之中的任何三個緊鄰於晶方其邊角之處的對準 標記506，或是三個以上緊鄰於晶方504a其邊角之處的對 準標記506進行焦距與平面位置的偵測，例如是選取〇、P、 Q三點進行偵測，或是選取o'Q'R三點進行偵測。但是’ 以選取〇、P、Q三點進行偵測較佳，因爲〇、p、Q三點 所圍繞之面積較大，較能反應多數之有效晶方5〇4a的情 況，所得之偵測値會比較接近實際之曝光區塊508的狀 況。 然而，對於晶片500邊緣區域的曝光區塊510而言， 由於曝光區塊510之中的晶方504有一部分是屬於有效晶 方504a，亦有一部份是屬於非有效晶方504b，因爲非有效 晶方504b並無法製成產品，所以，在選取偵測點進行偵測 時，僅需選取有效晶方504a其邊角之處的對準標記506， 而並不考慮無效晶方504b其邊角之對準標記506。舉例而 言，在偵測曝光區塊510之焦距與平面位置時，選擇S、T、 U三點進行偵測的結果較佳於選擇S、T、V三點進行偵測 者’係因爲選擇S、T、U三點較能反應出實際有效晶方504a 的情況，可以使光罩600的圖案較能精確地轉移至光阻層 上。 在進行焦距與平面位置的偵測步驟之後，依照每一個 曝光區塊5〇8或曝光區塊510所得之偵測値調整平面位置 進行曝光製程，以使光罩600之上的圖案轉移至每一個曝 13 ------------ 裝-----I--訂---------線 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作杜印製 本纸張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 402287 4862t\vf.doc/008 五、發明說明（（^) 光區塊508或曝光區塊510之上。 由於本發明係選取晶片上之任何三個對準檩記進行偵 測，因此，不但可以偵測晶片內部之曝光區塊，本發明之 方法亦可以偵測晶片邊緣區域的曝光區塊，以決定晶片上 之各個曝光區塊之焦距與平面的位置，而不需要以外插的 方式估計晶片邊緣區域之曝光區塊。 另一方面，由於本發明在偵測各個曝光區塊的過程 中，偵測點的選擇僅考慮各個曝光區塊之中的有效晶方， 而並不考慮曝光區塊之中的非有效晶方，因此，可以減少 因爲考慮非有效晶方所產生的誤差。 因此，本發明之方法，可以有效偵測晶片之邊緣區塊 的傾斜程度，以決定正確之曝光光源之焦距與曝光之劑 量’進而將光罩的圖案精確地轉移至光阻層上，以提昇製 程之良率。 雖然本發明已以一較佳實施例揭露如上，然其並非用 以限定本發明，任何熟習此技藝者，在不脫離本發明之精 神和範圍內，當可作各種之更動與潤飾，因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 ----I*---:----^--------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中囤國家標準（CNS)A4規袼（210 X 297公楚）4862twf.doc / 008 409287 A7 B7 Printed by the Intellectual Property Epidemic Bureau of the Ministry of Economy MS: Printed by the Industrial and Consumer Cooperatives V. Description of the invention (〖) This invention relates to an exposure process for lithography, and in particular to a measurement wafer Method of focal length and plane position. Lithography is a core technology that currently leads the integration of integrated circuit processes. For any thin film layer related to the structure of a semiconductor device, the definition of its pattern is determined by the lithography step. Therefore, lithography is a decisive key factor in the development of miniaturization of semiconductor components. In the exposure technology of the lithography process, focus and leveling of the wafer surface @leveling are important keys to determine the accuracy of pattern transfer. Therefore, during the exposure process, the depth of focus (Depth of Focus) at different positions on the wafer and its plane position must be considered to enable the pattern of the photomask to be completely and accurately transferred onto the photoresist layer. Referring to FIG. 1, a wafer 10 is shown. The wafer 10 has a plurality of transverse scribe lines 20 and longitudinal scribe lines 22 to distinguish the wafer 10 into a plurality of die 24. Since the current exposure process is performed in a repeating and stepwise manner, 'therefore,' the chip 10 can be divided into several exposure blocks (Shoot) 14 according to the area that can be exposed each time. In the exposure HU, the alignment marks in the exposure block I4 on the wafer 10 are aligned with the alignment marks on the photomask one by one, and then the exposure block is performed with a sensor (Sensor). The detection of the focal length and the plane position of M, and then the data obtained by the detection is used to determine the focal depth of each exposure block i 4 in the wafer 10 and its plane position to perform the exposure process. As the sensor detects the planar position of each exposure block 14, it uses a fixed position detection point for detection. As shown in the figure, the fixed position X, Y, and Z detection points determine the The position of the plane of the exposure block 丨 4, so 'for the internal blocks of the chip 10, such as the exposure block 3 in the illustration, this paper uses China National Standard (CNS) A4 ^ " < 210x 297 public release)- ~~~-(Please read the notes on the back before filling this page) · Order II 1 I ---------. 409287 A7 B7 4862twf.doc Dirty V. Description of the invention (>) 14a, also That is, the whole field on the chip 10 that can cover the fixed detection points of the sensor can be effectively evaluated. But 'for the Wafer Edge Field 14b of the chip 10, because the fixed detection point of the sensor can only accommodate X, Y, it cannot make the three detection points X, Y, Z completely seated. In the edge block 14b (Non-Whole Field), therefore, the conventional method of detecting the position of the surface of each exposed block 14 in the chip 10 with a detection point at a fixed position cannot be used to evaluate the chip 1〇 The edge block 14b must be detected by extrapolation from the detection block obtained by the internal block 14a near the edge block 14b. However, since the wafer 10 generates a lot of stress during the semiconductor manufacturing process, when these stresses are accumulated on the wafer 10, the wafer 10 will be deformed by bending. FIG. 2 illustrates a back surface of a wafer 10 that is bent and deformed at its edge block 14b. In this chip 10, the surface tilt of the inner block 14a and the edge block 14b is very large. If the detections 値 A and B obtained by the edge block 14b and its adjacent inner block 14a are used, the extrapolation is used. The method estimates the plane position of the edge block 14b ', then the estimated plane of the edge block 14b will be located on the plane indicated by the mark C, but the actual plane of the edge block 14b is on the D plane. Since the estimated 値 C is far from the actual 甚 D, if the extrapolated D-plane is used as the position of the plane of the evaluation edge region 14b, and then the focal length and plane position of the exposure are corrected, the pattern on the mask cannot be accurate. When the ground is transferred to the photoresist of the chip 10, the yield of the process will be reduced accordingly. In view of this, the present invention provides a lithography exposure technology that can accurately transfer the pattern of a photomask to a photoresist layer. The invention provides a lithography exposure technology, which can detect each area of the chip 4 ------------ -------- order ------------ -(Please read the precautions on the back before filling out this page) Printed on the paper by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, this paper applies the Chinese National Standard (CNS) A4 (210 X 297 mm) Cooperative printed 409287 4862Twf.doc / 008 V. Description of invention (s) The plane position and focal length of the block to complete the correct exposure process. The invention provides a lithography exposure technology, which can effectively detect the plane position and focal length of the edge block of a chip to complete a correct exposure process. The invention provides a lithography exposure technology, which uses the wafer alignment marks at the corners of the crystal cube to detect the plane position and focal length of each exposure block to complete the correct exposure process. The present invention proposes a lithography exposure technology. This technology provides a wafer and a photomask. The wafer provided is divided into several exposure blocks, and these exposure blocks are cut by several longitudinal cutting paths and lateral cutting. The track is divided into several crystal cubes, and a wafer alignment mark D is provided at the place where the longitudinal scribe line and the cross scribe line on the wafer intersect, and the provided mask has light at the location corresponding to the wafer alignment mark on the wafer Hood alignment mark. Before performing exposure, first align the alignment marks of the wafer with the alignment marks of the mask, and then select at least any three wafer alignment marks next to the effective crystal cube to detect the focal length and plane position of the exposure block. After that, the exposure process of the exposure block is performed. The invention proposes a lithography exposure technology. This technology provides a wafer and a photomask. The wafer provided can be divided into several exposure blocks. Each exposure block has a cutting track with the same width and surrounds the crystal cube. And a wafer alignment mark on the scribe line at the corner of each crystal cube. The provided mask has a mask alignment mark corresponding to the wafer alignment mark on the wafer. Before performing exposure, first align the alignment marks of the wafer with the alignment marks of the mask, and then in the exposure block, select at least any three wafer alignment marks at the corners of the effective crystal cube to perform the exposure. Detect the focal length and plane position of the block, and then perform exposure 5 ^ Paper size applies Chinese National Standard < CNS) A4 size (210x297 mm) ^ (Please read the precautions on the back before filling this page) Binding --------- Line · —Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, 409287 4862twf.doc / 008, V. Description of Invention (¥) Block exposure process. According to the embodiment of the present invention, at least any three wafer alignment marks are selected to perform the steps of detecting the focal length and the plane position of the exposed blocks. Any three wafer alignment marks can best represent the exposed areas. The plane position of the effective cube of the block, or the three wafer alignment marks that can cover the most effective cube. Since the present invention selects any three alignment marks on the wafer for detection, not only can the exposed blocks inside the wafer be detected, the method of the present invention can also detect the exposed blocks in the edge region of the wafer to determine the wafer. The focal length and plane position of each exposure block above do not require extrapolation to estimate the exposure block in the edge area of the wafer. On the other hand, in the process of detecting each exposure block according to the present invention, the selection of the detection points only considers the effective cubes in each exposure block, and does not consider the non-effective cubes in the exposure block. Therefore, it is possible to reduce errors caused by considering ineffective crystal cubes. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings for detailed description as follows: Brief description of the drawings: FIG. 1 Fig. 2 is a schematic diagram of a conventionally known wafer; Fig. 2 is a schematic diagram of a conventionally known wafer that generates bending deformation; Fig. 3 TH {Schematic diagram of a wafer according to the first preferred embodiment of the present invention, and Fig. 4 is a diagram according to the present invention. Schematic diagram of the photomask of the first-best embodiment of the invention; 6 Fork of this paper is applicable to Chinese National Standard \ CNS > A4 (210 X 297 ^^ ------- (Please read the precautions on the back before (Fill in this page) ----- I 1 Order--I ----- • Line A7 A7 4862twf.doc / 008 B7_ V. Description of the Invention (Γ) Figure 5 shows the second preferred embodiment of the present invention. The schematic diagram I and FIG. 6 of the wafer are schematic diagrams of a photomask according to the second preferred embodiment of the present invention. A brief description of the f marks: 10, 200, 500 wafers 12, 206, 506 wafer alignment marks 14, 208, 210, 508, 510 Exposed block 14a Internal block 14b Edge block 20, 202, 502 Horizontal cutting lines 22, 203, 503 Vertical Cutting lines 24 '204, 504 Cubes 204a, 504a Effective cubes 504a, 504b Invalid cubes 212, 214 Area 300' 600 Mask 302, 602 Mask alignment mark 502a A transverse cutting track with a double cutting track width 503a Longitudinal cutting lines A, B, C, D with double cutting line widths Planes E, F, G, H, I, J, K, L, 〇, P, Q, R, S, T, U, V, X, Υ, Z detection points The first embodiment, please refer to Figure 3, provides a chip 200, this chip 200 has several (please read the precautions on the back before filling this page) ------ — 丨 Order ---------- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs * '1 ^ This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 409287 A7 B7 4862t \ vf.doc / 008 V. Description of the invention) A horizontal scribe line (Scribe Line) 202 and a vertical scribe line 203 are used to distinguish the wafer 200 into a plurality of die 204. Moreover, each of the longitudinal scribe lines 203 and the transverse scribe lines 202 intersect each other with a wafer alignment mark 206, that is, there will be a wafer alignment mark 206 on the scribe lines at each corner of the crystal 204 . Because the exposure technology of the current semiconductor process uses a step and repeat method to transfer the pattern on the photomask 300 to the wafer 200 in a block-by-block manner, therefore, according to the exposure machine The size of the area that can be exposed each time and the design of the integrated circuit, the chip 200 can be divided into several exposure blocks 208 and exposure blocks 210. The above-mentioned exposure block 208 refers to the exposure block located inside the wafer 200. The cubes 204 in the exposure block 208 belong to the effective cube 2 (Ma, that is, the cube in this block 208). 204 are all intact cubes with four corners, and there is a complete wafer alignment mark 206 at the intersection of the horizontal scribe line 202 and the vertical scribe line 203. In the illustration of this embodiment, It is represented by four effective crystal cubes 204a. Therefore, the exposure block 208 includes four wafer alignment marks 206. However, in actual applications, it can be based on the area of the exposure machine and The design of the integrated circuit determines the number of cubes in each exposure block. The exposure block 210 is an exposure block located at the edge of the wafer. The cube 204 in the exposure block 210 belongs to the effective cube 2 〇4a; part of the non-effective cube 204b. The cube 204 covered by the mark 212 in the diagram is a cube with four corners and intact. The cube 204 covered by the mark 214 in the diagram, Is an inefficient crystal cube with a missing corner 8 --- ------- — I, ---- (Please read the notes on the back before filling this page) Order --------- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper uses the Chinese National Standard (CNS) A4 specification (210 X 297 mm) printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, 287 4862twf.doc. That is, the number of effective cubes 204a in each exposed block 210 is less than four. The number of complete wafer alignment marks is also less than four. Next, please refer to FIG. 4. The mask 300 provided by the present invention includes a mask alignment mark 302 in addition to the pattern 301 for pattern transfer. The position of the mask alignment mark 302 corresponds to the position of the wafer alignment mark 206 on the wafer 200. Before the exposure of the present invention, the wafer alignment mark 206 of each exposure block 208 or the exposure block 210 is aligned with the mask alignment mark 302 of the mask 300, and then the focal length and the plane position are detected. . Since any three points can determine a plane, the present invention, when performing the steps of detecting the focal length and the plane position of the exposure block 208 or the exposure block 210, selects at least the corners immediately adjacent to the effective cube 204a. Any three wafer alignment marks 206 are used as detection points to determine the optimal focal length and plane position of the exposure block 208 or the exposure block 210 during exposure. A better detection point is to select three cases that can best represent the effective cube 204a in the actual exposure block 208 or the exposure block 210, for example, three wafer pairs that can cover the most effective cube 204a. Quasi-mark 206 ° Taking the exposed block 208 located in the inner area of the wafer 200 as an example, since the cubes in the exposed block 208 belong to the effective cube 204a, it can be arbitrarily selected when detecting the focal length and the plane position Select any three alignment marks 206 immediately adjacent to the corners of Cube 2 (Ma), or three or more alignment marks 206 immediately adjacent to the corners of Cube 2 04a for focal length and plane position. “Detection” is, for example, selecting three points of E, F, and G, or selecting three points of E, F, and G. However, selecting three points of e, F, and G 9 (CNS) A4 specification (21〇X 297 public love) (Please read the precautions on the back before filling out this page) Installation -------- Order ------ I —line 409287 A7 B7 4862twf. doc / 008 V. Description of the invention () It is better to detect, because the area surrounded by the three points E 'F and G is larger than It can reflect the situation of most effective cubes, and the obtained detection frame will be closer to the actual exposure block 208. However, for the exposure block 21 of the edge area of the wafer 200, since the exposure block 210 is in the exposure block 210, Some of the crystals belong to the effective crystal 2 (Ma, as shown in the figure, the crystal 204 covered by the sign 212, and some of them belong to the non-effective crystal 2,04b, as shown in the figure 2 丨 4 Covered crystal cubes. Because the ineffective crystal cubes 204b cannot be made into products, so when selecting detection points for detection, only the alignment of the corners of the crystal cubes 204 within the range of the mark 212 needs to be selected. Mark 206 without considering the wafer alignment mark 206 covered by the range of mark 214. For example, when detecting the focal length and plane position of the exposure block 210, three points I, J, K, or The detection is based on three points of I, J, and L. The areas surrounded by three points of I, J, and K are all valid cubes, and the three points of I, J, and L include some ineffective cubes. If Taking the detection points of I, J, and L as the estimated plane position and focal length of the exposure block 210, There is a gap between the plane position and the focal length of the effective cube 2 (Ma) in the exposure block 210, and the pattern of the photomask cannot be accurately transferred to the photoresist layer. If it is I, J, K The point detection is used to estimate the planar position and focal length of the exposure block 210. Since the areas surrounded by these three detection points belong to the effective crystal cube 204a, it can better reflect the actual situation, making the mask 3 The pattern of 〇〇 can be more accurately transferred to the photoresist layer. After performing the steps of detecting the focal length and the plane position, adjust the focal length of the exposure light source according to the detection obtained by each exposure block 208 or exposure block 210 ' And determine the adjustment amount of the optimal plane position of the exposure block, and proceed (please read the precautions on the back before filling out this page). Installation------ -Order ------ I--Line · Ministry of Economic Affairs Printed by the Intellectual Property Bureau Employees 'Cooperatives The paper size is applicable to Chinese National Standard (CNS) A4 (210 X 297 mm) 409287 A7 B7 4S62twf.doc / 008 V. Description of the invention () Exposure process' to make the photomask 300 The above pattern is transferred to each exposed block 208 Or exposure block 210. In the second embodiment, referring to FIG. 5, a wafer 500 is provided. The wafer 500 has a plurality of lateral cutting tracks 502 and a plurality of longitudinal cutting tracks 503 to distinguish the wafer 500 into several wafers.晶 方 504. The transverse cutting line 502 can be divided into a transverse cutting line 502 & having a single cutting line width and a transverse cutting line 502b having a double cutting line width (Double Scribe Line Width), and the two alternate with each other. The longitudinal cutting path 503 is also divided into a longitudinal cutting path 502a having a single cutting path width and a longitudinal cutting path 502b having a double cutting path width, and the two alternate with each other. Traditionally, the scribe line of a wafer has a double scribe line width, and usually a test key can be configured. According to the size of the area that the exposure machine can expose each time and the design of the integrated circuit, the chip 500 can be divided into several exposure blocks 508 and 510. That is, after the horizontal cutting track 502b and the vertical cutting track 503b having a double cutting track width in the wafer 500 are respectively divided into the width of a single cutting track, the wafer 500 can be divided into two types of exposure blocks. Block 508 and exposure block 51 (^ exposure block 508) are exposure blocks located inside the wafer 500. The cube 504 in this exposure block 508 belongs to the effective cube 504a. Each cube 504a It is surrounded by horizontal and vertical scribe lines with equal width to distinguish them from each other, and each crystal 504 has a complete wafer alignment mark 506 on the corner scribe line. In this example In the illustration, four effective crystal cubes 5 (Ma means 'hence' in each -I ------- I ---- ^ -------- order ----- ---- I (Please read the notes on the back before filling this page) Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper is printed in accordance with China National Standard (CNS) A4 (210 X 297 mm) 409287 A7 4862twf .doc / 008 ______ 5. Description of the Invention (P) Exposed block 508 includes nine wafer alignments Note 506. However, in practical applications, the number of cubes in each exposure block can be determined according to the area that the exposure machine can expose each time and the design of the integrated circuit. The exposure block 5 10, which indicates that it is located at The exposed block at the edge of the wafer 500. Part of the cube 504 in the exposed block 510 belongs to the effective cube 504a, and part of it belongs to the ineffective cube 504b. Therefore, the effective cube 504a in the entire exposed block 510 is The number of N is less than four, in other words, the number of alignment marks 506 in the entire exposure block 510 is less than nine. Next, referring to FIG. 4, the mask 600 provided by the present invention has a pattern 601 for pattern transfer. In addition, it also includes a mask alignment mark 602. The position of the mask alignment mark 602 corresponds to the position of the wafer alignment mark 506 on the wafer 500. Before the exposure of the present invention, each of the The wafer alignment mark 506 of the exposure block 508 or the exposure block 510 is aligned with the mask alignment mark 602 of the mask 600, and then the focal length and the position of the plane are detected. Since any three points can determine a plane ,because In the present invention, when performing the steps of detecting the focal length and the plane position of the exposure block 508 or the exposure block 510, at least one of the exposure blocks 508 or 510 is selected to be close to the corner of the effective cube 504a. Any three wafer alignment marks 506 are used as detection points to determine the optimal focal length and plane position of the exposure block 508 or the exposure block 510 during exposure. A better detection point is selected. The two cases that can best represent the effective cube 504a in the actual exposure block 508 or the exposure block 51 are, for example, three wafer alignment marks 506 that can cover up to the effective cube 5 (Ma). (Please read the precautions on the back before filling out this page) Packing -------- Order --------- Line — Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper is applicable to China Standard (CNS) A4 specification (210x 297 public) A7 B7 409287 4862twf.doc / 008 Invention description ((() Take the exposure block 508 located in the inner area of the wafer 500 as an example. 5004 are all effective cubes 504a. Therefore, when detecting the focal length and the plane position, 'any three of this exposure block 508 can be arbitrarily selected to be close to the corners of the cube. The quasi mark 506, or three or more alignment marks 506 immediately adjacent to the corners of the cube 504a, is used to detect the focal length and the plane position. For example, three points of 0, P, and Q are selected for detection, or o'Q'R three points for detection. However, it is better to select three points of 0, P, and Q for detection, because the area surrounded by three points of 0, p, and Q is larger and can reflect most effective crystals. In the case of square 504a, the obtained detection frame will be closer to the actual exposure block 508. However, for the For the exposed block 510 in the edge area of the slice 500, part of the cube 504 in the exposed block 510 belongs to the valid cube 504a, and part of it belongs to the non-effective cube 504b, because the non-effective cube 504b It cannot be made into a product, so when selecting detection points for detection, only the alignment marks 506 at the corners of the effective cube 504a need to be selected, and the alignment of the corners of the invalid cube 504b is not considered. Mark 506. For example, when detecting the focal length and the planar position of the exposure block 510, selecting the three points S, T, and U for detection results is better than selecting the three points S, T, and V for detection. It is because the three points S, T, and U can reflect the actual effective crystal cube 504a, so that the pattern of the photomask 600 can be accurately transferred to the photoresist layer. In the detection step of the focal length and the plane position Then, according to the detection of each exposure block 508 or exposure block 510, adjust the plane position to perform the exposure process, so that the pattern on the mask 600 is transferred to each exposure 13 ------- ----- Install ----- I--Order --------- Line (Please read the precautions on the back first (Fill in this page) Consumption cooperation between employees of the Intellectual Property Bureau of the Ministry of Economic Affairs Du printed paper sizes applicable to Chinese National Standard (CNS) A4 (210 X 297 mm) 402287 4862t \ vf.doc / 008 V. Description of the invention ((^ ) On light block 508 or exposure block 510. Since the present invention selects any three alignment marks on the wafer for detection, therefore, not only can the exposed blocks inside the wafer be detected, the method of the present invention is also The exposure block in the edge area of the wafer can be detected to determine the focal length and the plane position of each exposure block on the wafer, and the exposure block in the edge area of the wafer can be estimated without extrapolation. On the other hand, since the present invention is in the process of detecting each exposure block, the selection of detection points only considers the effective cubes in each exposure block, and does not consider the non-effective cubes in the exposure block. Therefore, it is possible to reduce errors caused by considering ineffective crystal cubes. Therefore, the method of the present invention can effectively detect the inclination of the edge area of the chip to determine the correct focal length of the exposure light source and the exposure dose ', and then accurately transfer the pattern of the photomask to the photoresist layer to improve Yield of the process. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and decorations without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application. ---- I * ---: ---- ^ -------- Order --------- line (Please read the precautions on the back before filling this page) Ministry of Economy Wisdom The paper size printed by the Property Cooperative's Consumer Cooperative is applicable to the National Storage Standard (CNS) A4 Regulation (210 X 297)