4378twf/002 409151 A7 B7 經濟部中央標準局員工消費合作社印製 五、發明説明（f ) 本發明是有關於一種銅蓋層（copper capping layer) 的製造方法，且特別是有關於一種增進銅與介電材質的附 著力的銅蓋層的製造方法。 鋁與鋁合金由於導電性良好，因此爲積體電路發展至 今，非常重要的一種導電性材料。但是在半導體製程積集 度越來越高的情況下，鋁或鋁合金的導電性已無法滿足訊 號在傳輸速度上的要求，因此在作爲內連線的材料中，具 有較低電阻的銅已逐漸取代鋁材，作爲導電材料，而銅更 有較錦爲佳的抗電移能力（elect romig rati on resistance) ° 然而，金屬銅雖然具有上述的優點，但因其材質特性， 銅十分容易擴散進入介電層，特別是氧化矽構成的介電材 質。銅的擴散將導致短路等現象，因此通常在銅與介電層 間需形成阻障層（barrier layer)，以防止上述的情況。 其中，在銅內連線的底部與側牆，通常形成鉬/氮化鉅層， 用以避免銅擴散進入四周的氧化矽，而銅內連線表面一般 則覆蓋一層氮化矽層，其功用爲保護後續沉積在銅內連線 上的氧化矽，同樣地可降低銅擴散至上層介電材料的可能 性。但是，氮化矽層與金屬銅的附著力並不好，因此氮化 石夕層容易自金屬銅上剝離（pee 1 i ng)，而導致金屬銅從剝 離的路徑擴散，並造成其他的污染。 因此，本發明提供一種銅蓋層的製造方法，其係在暴 露出的銅金屬上形成一多砂氮化砂（s i丨i con - r i ch-nitride, SRN)層，利用多矽氮化矽層中較多的不穩定鍵 3 (請先閱讀背面之注意事項再填寫本頁) 訂 --------1 _|!5私_______ 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 經濟部中央標準局貝工消費合作社印製 43 78twf/〇〇2 409151 A7 _B7_ ___ 五、發明説明（>) 結，使其中的矽與銅反應，而在多矽氮化矽與銅的界面形 成一銅矽化物層。藉銅矽化物的存在促進銅與多矽氮化矽 之間的附著力’則可防止多矽氮化矽剝離的現象’進而增 進元件的可靠度。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特舉一較佳實施例，並配合所附圖式’作詳 細說明如下： 圖式之簡單說明： 第1圖係顯示本發明銅金屬上形成蓋層之剖面®;& 及 — 第2A-2B圖係顯示根據本發明在銅內連線上形成 之製造流程剖面圖。 其中，各圖標號之簡單說明如下： 100 :銅 104、214 :銅矽化物 106、212 :多矽氮化矽 200 :半導體基底 202 :介電層 204a、204b :開口、溝渠 206 :導電層或摻雜區 208 :阻障層 210a、210b、210c :銅插塞、導線 '內連線 賨.施例 本發明係在金屬銅100上沉積一層多砂氣化砂層 4 本紙張又度適用中國國家標準（CNS ) A4槔格（210X297公釐} (請先M讀背面之注意事項#填寫本頁)4378twf / 002 409151 A7 B7 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the Invention (f) The present invention relates to a method for manufacturing a copper capping layer, and in particular, to a method for improving copper and Manufacturing method of copper cap layer with dielectric material adhesion. Because aluminum and aluminum alloys have good electrical conductivity, they are very important conductive materials for the development of integrated circuits to this day. However, with the increasing accumulation of semiconductor processes, the conductivity of aluminum or aluminum alloys can no longer meet the signal transmission speed requirements. Therefore, as a material for interconnects, copper with lower resistance has been used. Gradually replace aluminum as a conductive material, and copper has better electro romig rati on resistance. However, although metal copper has the above advantages, due to its material characteristics, copper is very easy to diffuse. Enter the dielectric layer, especially the dielectric material made of silicon oxide. The diffusion of copper will cause short circuits, etc. Therefore, a barrier layer is usually formed between the copper and the dielectric layer to prevent the above situation. Among them, a molybdenum / nitride giant layer is usually formed on the bottom and side walls of the copper interconnects to prevent copper from diffusing into the surrounding silicon oxide, and the surface of the copper interconnects is generally covered with a silicon nitride layer. To protect the silicon oxide deposited on the copper interconnects, the possibility of copper diffusing into the upper dielectric material is also reduced. However, the adhesion between the silicon nitride layer and the metallic copper is not good, so the nitrided layer is easily peeled from the metallic copper (pee 1 ng), which causes the metallic copper to diffuse from the peeling path and cause other pollution. Therefore, the present invention provides a method for manufacturing a copper capping layer, which is to form a polysilicon nitride (SRN) layer on the exposed copper metal, using polysilicon nitride There are more unstable keys in the layer 3 (Please read the precautions on the back before filling this page) Order -------- 1 _ |! 5Private _______ This paper size applies to China National Standard (CNS) A4 Specifications (210X297 mm) Printed by the Shell Standard Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 43 78twf / 〇〇2 409151 A7 _B7_ ___ V. Description of the invention (>) The silicon and copper reacted in it, and the polysilicon nitrogen The interface between silicon and copper forms a copper silicide layer. The presence of copper silicide promotes the adhesion between copper and polysilicon nitride 'to prevent the phenomenon of polysilicon nitride peeling' and further increases the reliability of the device. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below and described in detail with the accompanying drawings' as follows: Brief description of the drawings: Figure 1 Figures 2A-2B show a cross-section of a cap layer formed on the copper metal of the present invention, and-Figures 2A-2B are cross-sectional views showing the manufacturing process of forming copper interconnects according to the present invention. Among them, a brief description of each icon number is as follows: 100: copper 104, 214: copper silicide 106, 212: polysilicon nitride 200: semiconductor substrate 202: dielectric layer 204a, 204b: opening, trench 206: conductive layer or Doped region 208: barrier layers 210a, 210b, 210c: copper plugs, wires' interconnects. Example The present invention is to deposit a layer of sandy gasified sand on metallic copper 100. This paper is also suitable for China Standard (CNS) A4 grid (210X297 mm) (Please read the notes on the back first # Fill this page)
4378twf/002 409151 A7 B7 五、發明説明（彡） 102，作爲一蓋層，如第1圖所示，以防止銅100對上層 介電層（未繪出）的擴散，由於多矽氮化矽層1〇2中具有較 多Si -H的不穩定鍵結（dangl ing bond)，因此在多砍氮化 矽層102沉積時，其中的矽原子極易與銅金屬1〇〇反應’ 而在銅100與多矽氮化矽層102之間生成一銅矽化物 104,例如爲CuSh，則銅矽化物104的形成可以增進銅1〇〇 與多矽氮化矽層104間的附著力，降低之間的應力，進而 減緩剝離的效應。 其中多矽氮化矽層102例如以電漿化學氣相沉積法 (plasma enhance chemical vapor deposition, PECVD) 形成，溫度在450°C以下，反應氣體來源至少包括矽甲烷 (SiHd和氨（ΝΗ;)等，而電漿中的氫原子，與未達飽和的鍵 結的矽原子形成Si-H的結果，使得多矽氮化矽層102的 Si-H增多。而爲使多矽氮化矽層1〇2中矽的含量較多，更 進以調整矽甲烷與氨通入反應室時的比例，使矽甲烷含量 較高’因此多矽氮化矽層102中氮/矽的較佳理想配比的 比例可小於1，而形成的多矽氮化矽層102的反射係數大 於 2.0。 經濟部中央標準局員工消费合作社印褽 (請先閲讀背面之注^^項再填寫本頁) 線( 第2A圖至第2B圖爲在銅導線形成蓋層的製造流程剖 面圖。如弟2 A圖所τρ;，在具有兀件結構’例如聞極等的 半導體基底200上形成一介電層202，介電層202例如爲 二氧化矽、磷矽玻璃（PSG)或硼磷矽玻璃（BPSG)等介零材 質’例如以化學氣相沉積法形成。之後在介電層202中形 成開口 ’例如利用雙嵌金法（dual damascene)形成一開口 5 本紙張尺度適用中國國家柢準（CNS ) A4現格（210X297公釐） 4378twf/002 409151 A7 _______B7 五、發明説明（f) 204a和一溝渠204b，其中開口 204a暴露出半導體基底200 中的主動區206，例如爲導電層或摻雜區。 之後，再請參照第2A圖，在開口 204a與溝渠204b的 內壁中的底部及側壁上形成一阻障層208，例如以濺鍍法 形成鈦/氮化鈦層（Ti/TiN)或鉅/氮化鉅層（Ta/TaN)，用以 防止後續形成的銅擴散至週邊的介電層202,並藉以增進 銅與介電材料間的附著力。續在閛口 204a與溝渠204b中 塡入銅，而塡在開口 204a下部的銅作爲金屬插塞210a， 開口 204a上部的銅作爲導線210b，而溝渠204b中的金屬 銅爲導線21〇c。在銅塡入開口 204a與溝渠204b後，更包 括以化學機械硏磨法（CMP)硏磨介電層202上多餘的銅與 阻障層208，使介電層202暴露出，則導線210b、210c大 致上具有和介電層202同高的表面。. 經濟部中央標隼局員工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁) 請參照第2B圖，接著，在介電層202上形成一多砍氮 化矽層212，例如以化學氣相沉積法進行，以至少包括矽 .甲烷和氨的氣體爲氣體來源，其中在通入矽甲烷與氨進入 反應室時，調整其通入的比例，使沉積的多矽氮化矽層212 中矽的含量較氮爲多。由於多矽氮化矽層212中Si-H不 穩定的鍵結較多，因此Si-H與銅反應的結果，在暴露出 的銅210b' 210c表面與多政氮化砂層212的界面形成一 銅矽化物214，例如爲CuSi:。銅矽化物214的存在增強了 銅210b、21〇c與多矽氮化矽層212之間的附著力，因此 多矽氮化矽層212不致因應力等影響，導致其從銅材上剝 落，因而可發揮多矽氮化矽層212作爲蓋層的功用。 本紙張尺度適用中國國家標準（CNS > A4規格（210X297公釐） 43 78twf/002 409151 A7 B7 五、發明説明（f) 本發明係可應用在暴露出銅且銅表面需要覆蓋蓋層的 情況’例如實施例所列舉的導線、金屬插塞或內連線表 面，或是形成銅與介電材料之間的阻障材料時，亦可利用 本發明彤成。且本發明的銅並不限用是沉積法、選擇性沉 積或電鍍法形成，而基底上的半導體元件更不限於閘極， 更可包括多重金屬內連線，以及可能的半導體結構等。 因此，本發明係在暴露出的銅層上提供一層多矽氮化 矽，而在沉積多矽氮化矽的期間，銅層和多矽氮化矽之間 生成一銅矽化物，使得多矽氮化矽在作爲蓋層的同時，亦 有銅矽化物可確保兩者間的附著力，進而提高元件的可靠 度。 雖然本發明已以一較佳實施例揭露如上，然其並非用 以限定本發明，任何熟習此技藝者，在不脫離本發明之精 神和範圍內，當可作各種之更動與潤飾，因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 (請先閲讀背面之注意事項再填寫本頁) ----yL-----Γ 訂 Λ:---；--1Μ.· 經濟部中央標隼局員工消費合作社印製 7 本紙張尺度適用中國國家標準（CNS 软•格（210X 297公釐）4378twf / 002 409151 A7 B7 V. Description of the invention (彡) 102, as a capping layer, as shown in Figure 1, to prevent the diffusion of copper 100 to the upper dielectric layer (not shown), due to polysilicon nitride The layer 102 has more Si-H dangl ing bonds. Therefore, when the silicon nitride layer 102 is deposited, the silicon atoms in the layer 102 easily react with the copper metal 100 '. A copper silicide 104 is formed between the copper 100 and the polysilicon nitride layer 102. For example, CuSh, the formation of the copper silicide 104 can improve the adhesion between the copper 100 and the polysilicon nitride layer 104 and reduce Stress in between, which in turn slows the effect of peeling. The polysilicon nitride layer 102 is formed by, for example, plasma enhance chemical vapor deposition (PECVD), and the temperature is below 450 ° C. The source of the reaction gas includes at least silicon methane (SiHd and ammonia (NΗ;)). As a result, the hydrogen atoms in the plasma form Si-H with silicon atoms that have not reached the saturation bond, resulting in an increase in Si-H in the polysilicon nitride layer 102. In order to make the polysilicon nitride layer The content of silicon in 102 is more, and the ratio of silicon methane and ammonia when entering the reaction chamber is adjusted to make the silicon methane content higher. Therefore, the nitrogen / silicon in the polysilicon nitride layer 102 is a better ideal mix. The ratio of the ratio can be less than 1, and the reflection coefficient of the polysilicon nitride layer 102 is greater than 2.0. Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs (please read the note ^^ on the back before filling this page). FIGS. 2A to 2B are cross-sectional views of a manufacturing process for forming a capping layer on a copper wire. As shown in FIG. 2A, τρ; a dielectric layer 202 is formed on a semiconductor substrate 200 having a component structure such as a wind electrode. The dielectric layer 202 is, for example, silicon dioxide, phosphosilicate glass (PSG), or borophosphosilicate glass (BP SG) and other meso-zero materials are formed, for example, by chemical vapor deposition. Afterwards, openings are formed in the dielectric layer 202. For example, an opening is formed by dual damascene. ) A4 (210X297 mm) 4378twf / 002 409151 A7 _______B7 V. Description of the invention (f) 204a and a trench 204b, in which the opening 204a exposes the active region 206 in the semiconductor substrate 200, such as a conductive layer or a doped region Then, referring to FIG. 2A again, a barrier layer 208 is formed on the bottom and sidewalls of the inner walls of the opening 204a and the trench 204b, for example, a titanium / titanium nitride (Ti / TiN) layer or a sputtering method is used. The giant / nitride giant layer (Ta / TaN) is used to prevent the subsequent formation of copper from diffusing into the surrounding dielectric layer 202 and thereby improve the adhesion between the copper and the dielectric material. Continued in the entrance 204a and the trench 204b Copper is inserted, and the copper in the lower part of the opening 204a is used as the metal plug 210a, the copper in the upper part of the opening 204a is used as the lead 210b, and the metal copper in the trench 204b is used as the lead 21oc. After the copper is inserted into the opening 204a and the trench 204b And even chemical mechanical honing (CMP) Honing the excess copper and barrier layer 208 on the dielectric layer 202 to expose the dielectric layer 202, the wires 210b, 210c have a surface that is approximately the same height as the dielectric layer 202. The central standard of the Ministry of Economic Affairs Printed by the Bureau ’s Consumer Cooperative (please read the notes on the back before filling out this page) Please refer to Figure 2B, and then form a polysilicon nitride layer 212 on the dielectric layer 202, for example, by chemical vapor deposition The method is carried out by using a gas including at least silicon, methane and ammonia as the gas source. When silicon dioxide and ammonia are introduced into the reaction chamber, the proportion of the gas is adjusted so that the silicon in the deposited polysilicon nitride layer 212 More than nitrogen. Because there are many Si-H unstable bonds in the polysilicon nitride layer 212, as a result of the reaction between Si-H and copper, a surface of the exposed surface of the copper 210b '210c and the polycrystalline nitrided sand layer 212 forms a The copper silicide 214 is, for example, CuSi :. The presence of the copper silicide 214 enhances the adhesion between the copper 210b, 210c and the polysilicon nitride layer 212, so the polysilicon nitride layer 212 is not affected by stress and the like, causing it to peel off from the copper material. Therefore, the function of the polysilicon nitride layer 212 as a cap layer can be exerted. This paper size applies to Chinese national standards (CNS > A4 size (210X297 mm) 43 78twf / 002 409151 A7 B7 V. Description of the invention (f) The invention can be applied to situations where copper is exposed and the copper surface needs to be covered with a cover layer 'For example, when the surfaces of the wires, metal plugs, or interconnects listed in the embodiments, or when forming a barrier material between copper and a dielectric material, the present invention can also be used. The copper of the present invention is not limited. It is formed by a deposition method, a selective deposition method, or an electroplating method, and the semiconductor element on the substrate is not limited to a gate electrode, and may include a multi-metal interconnect, a possible semiconductor structure, etc. Therefore, the present invention relates to the exposed A layer of polysilicon nitride is provided on the copper layer, and during the deposition of polysilicon nitride, a copper silicide is formed between the copper layer and the polysilicon nitride, so that the polysilicon nitride acts as a capping layer while There are also copper silicides that can ensure the adhesion between the two, thereby improving the reliability of the device. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Anyone skilled in this art, in Without departing from the spirit and scope of the present invention, various modifications and retouching can be made, so the protection scope of the present invention shall be defined by the scope of the attached patent application. (Please read the precautions on the back before filling this page ) ---- yL ----- Γ Order Λ: ---; --1M. · Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs 7 This paper size applies to Chinese national standards (CNS Soft • Grid (210X 297 mm)