TW403941B - Manufacturing method for epitaxial wafer, manufacturing device for epitaxial wafer and maintenance method thereof - Google Patents

Abstract

The present invention is to configure the top nozzle and bottom nozzle on the external peripheral wall of reaction furnace that each nozzle is connected to purge gas injector to lead the purge gas into said reaction furnace. The purge gas is introduced into the top clearance between top liner and bottom plate and also the bottom clearance between bottom liner and said bottom plate so as to protect said top clearance and said lower clearance. When the gas source is led into the said reaction furnace, the said top clearance and the said bottom clearance are protected simultaneously.

Description

I-correction89.05.18

The above section ^^ knot 7 line " ^ section of the above 5 furnace # 'shows the amendment to the specification No. 871 10486 of the present invention 40394. V. The description of the invention () tit shows the change of iron pollution concentration during the simulation process; Situation; 'The distribution structure of iron contamination concentration when epitaxial wafers are manufactured in large quantities: Part 8 shows the L9 structure of the furnace for fine crystal wafers in a single-wafer process and the device is shown along K_K in FIG. 8 The top view of the display shows the above-mentioned back-to-back = system: the enlarged cross-sectional view along the line χ-χ in FIG. 9 and the above symbol ^ indicates: the structure diagram of the joint between the outer peripheral walls. Rage 1 Purge gas ejection device , 11: Nozzle, 12: Nozzle, 2: Lower body flow groove, 35: Bonding part, 4: Upper profile, = 鼽 communicating channel, 43: Gap, 5 · Lower pad, 51: Outer ring, 6: Upper V-circle V outer ring, 71: upper dome cover, 72: lower dome cover, 8: crystal seat, fifth-: fif entry area, 91: air source ejector, 92: air source The ejector system is a Ming / Medium / Jin Yixing Λ, which is a device that can completely prevent metal contamination. It is a Japanese-Japanese-Japanese-Yen device. The manufacturing device of this epitaxial wafer includes: A crystal holder on which a semiconductor wafer is mounted; made of a non-metallic material f surrounding the crystal holder; an outer peripheral wall made of a metal material surrounding the dome cover to seal the inner peripheral wall; a door door Solid, gas source supply device, the supply gas comes from the above-mentioned peripheral wall and is transmitted to the above-mentioned semicircle of the device mounted on the above-mentioned crystal base ------ r ------ ^ -------- order- -------- End (please read the note on the back? Matters before filling out this page) The above-mentioned supply of purified gas is printed by the co-operative society of the Intellectual Property Bureau of the Ministry of Economic Affairs ^ The above-mentioned wall and gas, nitrogen or inertia Gases, such as argon, are non-corrosive and

This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs—403941 -___) 5. Description of the invention (1) The present invention relates to epitaxial wafers (epitaxial The invention relates to a method for manufacturing a wafer, a device for manufacturing a stupid wafer, and a method for maintaining the same. In particular, it relates to a method for manufacturing an epitaxial wafer that can completely prevent heavy metal contamination, a device for manufacturing an epitaxial wafer, and a method for maintaining the same. The stupid wafer manufacturing device uses single wafer processing to produce epitaxial wafers, which can form epitaxial layers with great accuracy and can also plan automated operations. Therefore, the above-mentioned Crystal wafer manufacturing equipment is widely used. In the above-mentioned manufacturing equipment using a single wafer process worm crystal wafer, a semiconductor wafer is placed in a reaction furnace for a susceptor for telecrystal growth ). The semiconductor wafer installed in the reaction furnace is heated, and a source gas (such as SiCl or HC1) is introduced into the reaction furnace. The single crystal silicon on the surface of the semiconductor wafer will produce vermicular crystal growth. The reaction furnace includes a non-metallic inner peripheral wall and a metal outer peripheral wall surrounding the inner peripheral wall. The reason why the inner peripheral wall is made of non-metal In order to prevent the problem of metal contamination, FIG. 8 is a partial cross-sectional view of a conventional device for manufacturing an epitaxial wafer by a single wafer process. As shown in FIG. The conventional device includes: a base plate 3 serving as the outer peripheral wall of the above-mentioned reaction furnace; a lower liner 2 and an upper pad 4 which are located inside the above-mentioned bottom plate 3 and form the above-mentioned reaction furnace; Peripheral wall;-upper dome 71 and lower dome cover 72, which form an air-tight closing device above and below the inner peripheral wall; a gas source injector, 4 paper standards applicable to the country of China Standard (CNS) A4 specification (2I0X297 ^^) (please read the note on the back 4 and fill out this page) Order A7 B7 Μ3ί) 41 5. Description of the invention (2) Used to introduce a gas source into the above reaction furnace; One air source ejector 9 2. It is used to exhaust the gas source in the reaction furnace; a crystal holder 8 is placed in the reaction furnace and a semiconductor wafer is planted thereon; and a clamp ring 30 is used to fix the upper dome cover 71 and Lower dome cover 72. Fig. 9 is a plan view of the reaction furnace shown in Fig. 8 along the line IX-IX, showing the structure of the reaction furnace. As shown in Fig. 9, the pad 2 and the bottom plate 3 are both fixed in a donut shape. Fig. 10 is a large cross-sectional view taken along the line X to X in Fig. 9 and shows the joint structure between the inner peripheral wall and the outer peripheral wall. As shown in Fig. 10, the peripheral surface of the lower pad 2 and the peripheral surface of the upper pad 4 are kept in contact along the periphery thereof. However, gas sources such as SiCls and HC1 are strongly corrosive in a water-containing environment. If the gas source enters the joint portion 35 of the non-metal upper dome cover 4 (or the lower dome cover 5) and the metal base plate 3, heavy metal pollution will be caused in the part where the gas source enters. For example, if the inside of the reaction furnace is exposed to the atmosphere before running a completely new reaction furnace or during a regular maintenance procedure, air may remain in the bonding portion 35. The moisture contained in the residual air can cause heavy metal pollution. The heavy metal pollution caused by the above will gradually evaporate or be converted into dust, and finally enter the reaction furnace to contaminate the wafer. In order to manufacture high quality telecrystalline wafers', the amount of heavy metal contamination must be reduced. To meet this requirement, when running a brand new reactor or after regular maintenance, the conventional method is to purify the interior of the reactor by simulated operation. ___ 5 This paper is suitable for 21〇x 297 & il (please first Read the notes on the back and fill in this page), 1T printed by the Central Bureau of Standards of the Ministry of Economic Affairs, printed by the Shellfish Consumer Cooperative, printed by the Central Standards Bureau of the Ministry of Economics, printed by the Shellfish Consumer Cooperative, 403941 H7 V. Description of the invention (3) The law wastes at least 70 to 100 semiconductor wafers. Wafers used during simulation operations must be discarded, adversely affecting manufacturing costs. Furthermore, the simulated operation will only reduce the heavy metal pollution # by about 10 at0m / cc. Therefore, in order to obtain high-quality vermicular wafers, the amount of heavy metal contamination must still be reduced. As can be seen from the above disadvantages, the object of the present invention is to provide a method and a device for manufacturing epitaxial wafers and a maintenance method thereof, which can completely prevent heavy metal pollution. To achieve the above object, the present inventors focused on how to prevent air or a gas source from entering the joint portion between the non-metal inner peripheral wall and the metal outer peripheral wall. Based on the above understanding, the purified gas will be introduced into this joint part. In addition, when a gas source is supplied or regular maintenance is performed, the above joint part will be protected by purge gas. After the above treatment, the air or gas source can be prevented from entering the above-mentioned joint portion. The present invention can be further understood from the following detailed description and reference examples in the accompanying drawings, in which: FIG. 1 is a partial cross-sectional view showing a structure of an epitaxial wafer manufacturing device according to the present invention; FIG. 2 is a center line of FIG. A top view of Π-Π showing the structure of the above-mentioned reaction furnace in the present invention; FIG. 3 is an enlarged cross-sectional view showing the line Π-melon in FIG. 2, showing a coupling structure between the above-mentioned inner peripheral wall and the above-mentioned outer peripheral wall in the present invention; FIG. 4 It is a sectional view showing the middle line of figure i! V-jv, showing the upper structure of the above-mentioned reaction furnace in the present invention; 6 papers suitable for SS1 household materials (CNS) Λ view; U1GX297 public ---- (Please read the back first (Notes for filling in this page)

, 1T I-correction | Repair 89.05.18

The above section ^^ knot 7 line " ^ section of the above 5 furnace # 'shows the amendment to the specification No. 871 10486 of the present invention 40394. V. The description of the invention () tit shows the change of iron pollution concentration during the simulation process; Situation; 'The distribution structure of iron contamination concentration when epitaxial wafers are manufactured in large quantities: Part 8 shows the L9 structure of the furnace for fine crystal wafers in a single-wafer process and the device is shown along K_K in FIG. 8 The top view of the display shows the above-mentioned back-to-back = system: the enlarged cross-sectional view along the line χ-χ in FIG. 9 and the above symbol ^ indicates: the structure diagram of the joint between the outer peripheral walls. Rage 1 Purge gas ejection device , 11: Nozzle, 12: Nozzle, 2: Lower body flow groove, 35: Bonding part, 4: Upper profile, = 鼽 communicating channel, 43: Gap, 5 · Lower pad, 51: Outer ring, 6: Upper V-circle V outer ring, 71: upper dome cover, 72: lower dome cover, 8: crystal seat, fifth-: fif entry area, 91: air source ejector, 92: air source The ejector system is a Ming / Medium / Jin Yixing Λ, which is a device that can completely prevent metal contamination. It is a Japanese-Japanese-Japanese-Yen device. The manufacturing device of this epitaxial wafer includes: A crystal holder on which a semiconductor wafer is mounted; made of a non-metallic material f surrounding the crystal holder; an outer peripheral wall made of a metal material surrounding the dome cover to seal the inner peripheral wall; a door door Solid, gas source supply device, the supply gas comes from the above-mentioned peripheral wall and is transmitted to the above-mentioned semicircle of the device mounted on the above-mentioned crystal base ------ r ------ ^ -------- order- -------- End (please read the note on the back? Matters before filling out this page) The above-mentioned supply of purified gas is printed by the co-operative society of the Intellectual Property Bureau of the Ministry of Economic Affairs. Gases, such as argon, are non-corrosive and

This paper size is in accordance with Chinese National Standard (CNS) A4 specifications (210 X 297 mm B7 -403 ^ 41. 5. Description of the invention (5) will not have a negative impact on epitaxial growth, so it is suitable as a purification gas. Please read the back first Note: The above-mentioned purification gas supply refers to the 'introduction of purification gas to the above-mentioned combined part during epitaxial crystal growth or regular maintenance. After the above processing, the gas source will be isolated into the above-mentioned combined part, and the above-mentioned combined part generates A small amount of metal pollution can be discharged. For the combination of the inner peripheral wall and the outer peripheral wall, the different materials of the inner peripheral wall and the outer peripheral wall and the correctness of the stacking are used to provide a small area of voids. The void has a positive effect on guiding the purified gas into the above-mentioned bonding part. In the epitaxial wafer manufacturing apparatus having the above-mentioned structure, the gas source is introduced from the outside of the outer peripheral wall to the inside of the reaction furnace through the inner peripheral wall for semiconductor crystal Stupid crystal growth on a circle. The gas source will pass through the outer peripheral wall before reaching the inside of the reaction order furnace. The joint portion between the outer peripheral wall and the inner peripheral wall. Therefore, the gas source may enter the joint portion between the inner peripheral wall and the outer peripheral wall, so the purge gas is introduced into the above joint portion beforehand. The first innovation is that the combined part of the inner peripheral wall and the above-mentioned peripheral wall is protected by purified gas, and prevents the invasion of gas by the gas source or the seal of the Central Standards Bureau of the Ministry of Air Economics and Shellfish Consumption Cooperative. 2nd invention The second aspect of the invention is to provide a method that can completely prevent metal contamination when manufacturing a worm crystal wafer. The method for manufacturing the worm crystal wafer includes the following steps: The device semiconductor wafer is hermetically sealed by a dome cover. On the crystal base; k paper-scale property_ 家 _ (CNS) B7 V. Description of the invention (6) Supply purified gas to the inner peripheral wall formed by the non-metal surrounding the crystal base in the dome cover and the metal surrounding the inner peripheral wall. The joint part of the outer peripheral wall formed; and please read the 'ii intentions' on the back of this page to fill in this page. In the state of purifying gas supply, from the outside of the outer peripheral wall, The inner peripheral wall guides a gas source to the semiconductor wafer, so that the semiconductor wafer is epitaxially grown. In the above-mentioned process, the key lies in the epitaxial growth on the semiconductor wafer, that is, the gas When the source flows in, the purge gas is introduced into the above-mentioned bonding portion. During the epitaxial growth on the semiconductor wafer, the gas source is introduced into the reaction furnace from the outside of the outer peripheral wall along the inner peripheral wall. Therefore, the gas source can be Enter the above-mentioned combination part. However, when the gas source stream is ordered, if the purified gas is introduced into the above-mentioned combination part, the above-mentioned combination part can be protected by the purified gas. Ik Printed in addition to the gas When the source flows in, the purge gas can also be supplied when the semiconductor wafer is introduced into the reaction furnace. The reason is that the tray that guides the semiconductor wafer into the reaction furnace will exit when the semiconductor guide is entered. In other words, the incoming air may invade the joint between the peripheral wall and the outer peripheral wall. The water contained in the air will react with the gas source to generate metal pollution. Therefore, in the embodiment of the present invention, 'to prevent air from remaining in the joint portion of the inner peripheral wall and the outer peripheral wall during the introduction of the semiconductor wafer, when the semiconductor wafer is introduced, a purge gas is introduced into the above. Combining parts. Regarding the second innovation in the present invention described above, when a gas source is supplied, the combined part of the inner wall and the outer peripheral wall will be protected by the purifying gas. This paper is made in China National Materials (CNS) money ^ 77 ^^ ^ Economy, printed by the Consumer Standards Cooperative of the Central Bureau of Standards -408 ^ 41 —_BL ____ 5. Description of Invention (7) Therefore, heavy metal pollution can be stopped. i-three-shaped 鋲 A third aspect of the present invention is to provide a method for maintaining an epitaxial wafer manufacturing apparatus to completely prevent metal contamination. This epitaxial wafer manufacturing device maintenance method 'Epistar wafer manufacturing device includes: wafer seat, device semiconductor wafer: inner peripheral wall' is made of non-metal material surrounding the above wafer seat; outer peripheral wall 'is Made of metal material surrounding the inner peripheral wall; a dome cover 'seals the inner peripheral wall; a gas source supply device that supplies gas from outside the outer peripheral wall and is transmitted along the inner peripheral wall to the semiconductor device mounted on the crystal base On the wafer, the above-mentioned maintenance method includes the following steps: supplying purified gas to the above-mentioned joint portion of the inner peripheral wall and the outer peripheral wall; and opening the dome cover in a state where the purified gas is supplied. In the above-mentioned method for maintaining a worm crystal wafer device, the key lies in the maintenance period ', and especially when the dome cover is opened to expose the bonding portion to the atmosphere, a purge gas is supplied to the bonding portion. The above purification gas is recommended to use nitrogen or inert gas, which is a little dangerous for combustion or explosion. Here, maintenance refers to how the above-mentioned maintenance operations, inspections, repairs, and treatments are performed when the inside of the reactor is exposed to the atmosphere. Regarding the third innovation in the present invention described above, the joint portion of the inner peripheral wall and the outer peripheral wall is protected by purified gas during maintenance; therefore, it is possible to prevent water-containing air from invading the joint portion. The details of this embodiment (preferred embodiment) 10 This paper size applies the Chinese National Standard (CNS) Λ4 specification (210X297 ^ * 7 (Please read the notice on the back before filling out this page)! * I ^ n II · 403941 A7 Printed by the Central Bureau of Standardization, Shellfish Consumer Cooperative 137 5. Description of the invention (8) Figure 1 is a partial cross-sectional view showing the structure of an epitaxial wafer manufacturing device in the present invention. In the present invention, the above-mentioned epitaxial wafer manufacturing apparatus includes: a base plate 3 serving as an outer peripheral wall of the reaction furnace; a lower pad 2 and an upper lining 4, both of which are formed inside the base plate 3 and formed The inner peripheral wall of the above reaction furnace; an upper dome cover 71 and a lower dome cover 72 forming an airtight device between the upper and lower openings of the inner peripheral wall; a gas source injector M to introduce a gas source into the above reaction furnace; a A gas source ejector 92 discharges a gas source in the reaction furnace; a crystal holder 8 is located in the reaction furnace and a semiconductor wafer is placed thereon; and a clamp ring 30 fixes the upper dome cover 71 and the lower dome Cover 72. The lower lining 2 and the upper surface 4 are made of quartz. 2 疋 The top view of the line jj-Π in FIG. 1 shows the structure of the above-mentioned reaction furnace in the present invention. As shown in FIG. 2, an upper gap 43 is formed between the upper 4 and the bottom plate 3; and an upper nozzle n, It communicates with the upper gap 43 and is placed inside the bottom plate 3. A purge gas injection device is connected to the upper spray pipe 11. Fig. 3 is an enlarged sectional view showing the inner peripheral wall of the present invention along the line The structure of the joint part with the outer peripheral wall. As shown in FIG. 3, the lower gap 23 'is formed between the lower profile 2 and the bottom plate 3. The lower nozzle 12 is in communication with the lower gap 23 and is placed on the bottom plate. 3 inside; the purge gas injection device! Is connected to the upper nozzle 11 and the lower nozzle 12. In the above configuration, the purge gas injection device i is connected to the upper gap 43 and the lower gap. 23 is connected ^-the upper purification gas Zhao Liuren groove 34 and the lower purification gas inflow groove 32 'are formed on the inner peripheral surface of the above-mentioned bottom plate 3. The above gas inflow groove (please read the note on the back side first and fill in this page )

A7 403941 V. Description of the invention (9) "-The grooves 34 and 32 can ensure that the purified gas will enter the upper gap 43 and the lower gap 23 with a smooth airflow. The sectional view along line JY_JY in Figure 1 shows the superstructure of the reaction furnace in the present invention. As shown in FIG. 4, the above-mentioned upper gap 43 'extends along its periphery and is formed between the upper pad 4 and the bottom plate 3. The upper purge gas flows into the groove 34 and is formed on the periphery of the upper gap 43. In addition, a communication passage 4b is formed on the upper lining 4 to communicate the upper gap 43 and the inside of the reaction furnace 43. The communication passage 41 extends outward from the center of the upper profile 4. After the above treatment, the gas flow of the purified gas will form a spiral leak, and the purified gas chain and the gas source will meet near the semiconductor crystal circle. Therefore, the mixing of the purge gas and the airflow source can avoid the adverse effects of telecrystal growth. Fig. 5 is a sectional view taken along line? _Ν in Fig. 1 and shows the lower structure of the above-mentioned reaction furnace in the present invention. As shown in FIG. 5, the lower gap 23 'in an arc shape is formed between the lower liner 3 and the bottom plate 4. Similarly, the upper purge gas flows into the groove 34 in an arc shape, and is formed on the periphery of the upper gap 43. Printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs At this time, a wafer placement area 9 is formed on the above-mentioned base plate 3, and the semiconductor wafer is transferred during the semiconductor wafer introduction operation. A tray (not shown in the circle) 'is located in the above-mentioned wafer placement area 9 and can be opened or closed. The following epitaxial wafer manufacturing method will be explained by the above-mentioned structure of the above-mentioned epitaxial wafer device. First, the purification gas with hydrogen as the main component is introduced at the flow rate of 20 liter / min, and is introduced into the upper nozzle from the purification gas injection device 1 above. The paper size is in accordance with Chinese National Standard (CNS) 8 and 4 (210x). 297 factory) '"-Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs __403941 ___137 V. Description of the invention (10) ~ 11 and the above-mentioned lower nozzle 12. Next, the incoming purge gas flows into the upper purge gas into the recess 32 through the upper nozzle 11 and the lower nozzle 12, and the purge gas enters the upper gap 43 and the lower gap 23 at the same time. The purge gas enters and fills the upper gap 43 and the lower gap 23, and at the same time, the purge gas enters the inside of the reaction furnace through the communication passage 41. At this time, air may remain in the upper gap and the lower gap 23 The pollution will flow into the inside of the reaction furnace together with the purification gas. In other words, the purge gas will purify the trapped air or pollute it. While the purge gas is supplied by the purge gas injection device 1, the above-mentioned tray on the wafer loading area 9 (as shown in FIG. 5) is pulled out to install the semiconductor wafer. Next, the semiconductor-mounted tray is introduced into the reaction furnace ', and then the semiconductor wafer is placed on the wafer holder 8. The semiconductor wafer placed on the wafer holder 8 is heated, and a gas source such as SiCh or HC1 is introduced into the reaction furnace from the gas source injector 91 while purifying the gas supply. The gas source 1 from the gas source injector 91 enters the reaction furnace through the bottom plate 3 and the lower liner 2 (as shown in Fig. 5). After entering the reaction furnace, 'the gas source assists the wafer growth' and is discharged out of the reaction furnace through the gas source ejector 92. After the epitaxial growth is completed, the supply of the above-mentioned gas source is temporarily stopped, and the purified gas is supplied while the epitaxial wafer manufactured as described above is taken out. Next, a new semiconductor wafer is introduced into the reaction furnace. 13 This paper size applies to China National Standards (CNS) Λ Xin Jian Ge (210X297) 筇 " (Please read the precautions on the back before filling out this page), 1T Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs ^ 403941 A7 _ B7 V. Description of the invention (11) Repeat the above steps to continuously manufacture epitaxial wafers. The following is a maintenance method for an epitaxial wafer manufacturing apparatus according to the present invention. The above maintenance method requires the following consecutive steps. First, a purifying gas containing nitrogen as a main component is introduced into the upper nozzle u and the lower nozzle 12 through the purge gas injection device 1 at a flow rate of 0.5 liter / min. As a result, the purge gas enters the upper purge gas inflow groove 34 and the lower purge gas inflow groove 32 through the upper nozzle u and the lower nozzle 12, and finally the purge gas enters the upper gap 43 and the lower gap 23. The purge gas enters and fills the upper gap 43 and the gap 23, and at the same time, the purge gas enters into the reaction furnace through the communication passage 41. Next, while the purge gas is supplied to the upper gap 43 and the lower gap 23, the dome cover 71 or the dome cover 72 is opened to easily maintain the inside of the reaction furnace. After the maintenance is completed, the top cover 71 or the top cover 72 is closed, and the supply of the purified gas to the hermetically closed reaction furnace is stopped. The reduction of heavy metal pollution achieved in the present invention can be explained with reference to FIGS. 6 and 7. Circle 6 shows the change of iron pollution density during a simulated operation. As shown in FIG. 6, the above-mentioned contamination density detected by the epitaxial wafer made by the present invention is about one tenth that made by the conventional technology. A closer examination of FIG. 5 reveals that the iron concentration obtained by the present invention before the simulation operation is approximately equal to that of 100 semiconductor wafers manufactured by the simulation operation of the conventional technology. 14 Chinese paper standard (CNS) A4 ^ # (2 丨 0X297 left) I: i ------ Order ------ 岣 — (Please read the following: vi-Italian matters first Fill in {Js this page} A7 B7 —4Ca 41 -------V. Description of the invention (12) Figure 7 shows the distribution of iron pollution density during the mass production of epitaxial wafers as shown in Figure 7. The iron > defective density measured by the worm-crystal wafer manufactured in large quantities according to the present invention is about 10 atom / cc. The above-mentioned values are definitely lower than the results measured by conventional techniques. Please fill in this matter again. I) Order the Central Standards Bureau of the Ministry of Economic Affairs.

Claims (1)

Amendment of Patent Application No. ^ Revised and Revised J 403941 rs g! 11¾¾0 ^: 89.05 | fl8i Supplement h Ηί Patent Scope 1_ A method for manufacturing epitaxial wafers, triggering the above semiconductor wafer and gas source in a reaction furnace The epitaxial layer grows as a result of the reaction between them; It is characterized by: (Please read the precautions on the back before filling this page) The purge gas is introduced into the reaction furnace and the epitaxial layer is grown at the same time. 2. The method of manufacturing an epitaxial wafer according to item 1 of the scope of the patent application, wherein the position where the purge gas enters the reaction furnace is between the bottom plate formed on the outer peripheral wall of the reaction furnace and the inner peripheral wall formed on the reaction furnace. Between the linings. 3. —A kind of epitaxial wafer manufacturing method, in which a reaction between the semiconductor wafer and a gas source is issued in a reaction furnace, so that the epitaxial layer is grown; its characteristics are: During the maintenance operation, the purge gas is introduced between the bottom plate forming the outer peripheral wall of the reaction furnace and the gasket forming the inner peripheral wall of the reaction furnace. 4. The method of manufacturing an epitaxial wafer according to item 1 or item 3 of the scope of patent application, wherein the purification gas is a passivation gas. Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Cooperatives 5. The manufacturer of the epitaxial wafer as described in item 1 of the scope of the patent application, where ‘the purified gas is hydrogen. Method 6. The manufacturer of the epitaxial wafer according to item 丨 in the scope of the patent application, wherein ‘the purification gas is nitrogen. 7. An epitaxial wafer manufacturing device, provided with a reaction furnace, comprising: a gas source sprayer; a gas source exhaust @; a bottom plate forming an outer peripheral wall of the reaction furnace, and a liner forming an inner peripheral wall located inside the bottom plate The upper scope of the 16th patent application for the amended version of this patent and this J 403941 rs g! 11¾¾0 ^: 89.05 | fl8i supplement h Η Patent scope 1_ A method of manufacturing epitaxial wafers, triggering the above semiconductor in a reaction furnace The reaction between the wafer and the gas source causes the above epitaxial layer to grow; Its characteristics are: (Please read the precautions on the back before filling this page) Purified gas is introduced into the above reaction furnace while the above epitaxial layer is made Grow. 2. The method of manufacturing an epitaxial wafer according to item 1 of the scope of the patent application, wherein the position where the purge gas enters the reaction furnace is between the bottom plate formed on the outer peripheral wall of the reaction furnace and the inner peripheral wall formed on the reaction furnace. Between the linings. 3. —A kind of epitaxial wafer manufacturing method, in which a reaction between the semiconductor wafer and a gas source is issued in a reaction furnace, so that the epitaxial layer is grown; its characteristics are: During the maintenance operation, the purge gas is introduced between the bottom plate forming the outer peripheral wall of the reaction furnace and the gasket forming the inner peripheral wall of the reaction furnace. 4. The method of manufacturing an epitaxial wafer according to item 1 or item 3 of the scope of patent application, wherein the purification gas is a passivation gas. Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Cooperatives 5. The manufacturer of the epitaxial wafer as described in item 1 of the scope of the patent application, where ‘the purified gas is hydrogen. Method 6. The manufacturer of the epitaxial wafer according to item 丨 in the scope of the patent application, wherein ‘the purification gas is nitrogen. 7. An epitaxial wafer manufacturing device, provided with a reaction furnace, comprising: a gas source sprayer; a gas source exhaust @; a bottom plate forming an outer peripheral wall of the reaction furnace, and a liner forming an inner peripheral wall located inside the bottom plate ; Upper dome 16 403941 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs It is characterized in that α has a methylated gas ejection device which communicates the bottom plate and the gasket. 8. The epitaxial wafer manufacturing device according to item 7 of the patent claim, wherein a purge gas inflow channel is formed in the p of the bottom plate and the gasket, and the purge gas flows into the channel along the bottom plate and the liner. The wounds around the urns spread and are in communication with the purge gas ejection device. 9. The apparatus for manufacturing an epitaxial wafer according to item 7 of the scope of patent application, wherein the communication hole is formed in the pad and communicates the inner peripheral side and the outer peripheral side thereof. 10. The apparatus for manufacturing an epitaxial wafer according to item 9 of the scope of the patent application, wherein a purge gas system flowing from the inner peripheral side of the communication hole formed in the pad to the inside of the reaction furnace flows along the pad. The inner peripheral wall flows. 11. An epitaxial wafer manufacturing device, comprising: a wafer seat on which a semiconductor wafer is mounted; an inner peripheral wall made of a non-metal material surrounding the wafer seat; an outer peripheral wall made of a metal material, Around the inner peripheral wall; a dome cover that seals the inner peripheral wall; a gas source supply device that supplies gas from outside the outer peripheral wall and is transmitted along the inner peripheral wall to the semiconductor wafer mounted on the wafer base; and purification The gas supply device supplies purified gas to a joint portion between the inner peripheral wall and the outer peripheral wall. 17 I! 1 Pack -------- Order --------- Line (Please read the precautions on the back before filling this page) This paper is suitable for financial reasons ^^ S) A4 size ⑽χ -------------- Six 403941 A8B8C8D8, the scope of application for patents, 16.- A kind of maintenance method for a wafer manufacturing device. The manufacturing of worm crystal wafers includes: wafer seat 'device semiconductor wafer: inner peripheral wall to surround the above wafer seat. The outer periphery I is made of a metal material surrounding the two peripheral walls; the dome cover seals the inner peripheral wall; the gas source supply device supplies gas from the outer peripheral wall along the inner peripheral wall Transferred to the semiconductor wafer mounted on the wafer base, the maintenance method includes the following steps: supplying purified gas to the knotted portion of the inner peripheral wall and the outer peripheral wall; and σ in a state where the purified gas is supplied Open the above dome cover. (Please read the precautions on the back before filling out this page.) -------- Order --------- Line I. Consumer Cooperation of Intellectual Property Bureau of the Ministry of Economic Affairs Du printed 19K paper size Applicable to Chinese National Standard (CNS > A4 specification (210 X 297 mm)