TW400582B - Processing method of V-groove airbridge gate with etch-stop layer - Google Patents

Processing method of V-groove airbridge gate with etch-stop layer Download PDF

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TW400582B
TW400582B TW87100526A TW87100526A TW400582B TW 400582 B TW400582 B TW 400582B TW 87100526 A TW87100526 A TW 87100526A TW 87100526 A TW87100526 A TW 87100526A TW 400582 B TW400582 B TW 400582B
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gate
layer
manufacturing
item
scope
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TW87100526A
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Chinese (zh)
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Shiue-Shr Liu
Nian-Shiou He
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Nat Science Council
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Abstract

A novel gate structure called V-groove Airbridge Gate is proposed here, as well as the processing method to fabricate it. The gate is formed by anisotropic wet etching of undoped semiconductor (e.g. GaAs, Si) layer grown on top of device active layer(s), followed by standard metal evaporation and lift-off process. Owing to the outward slope of the sidewalls of the V-groove, effective gate length that is substantially smaller than the minimum feature size of available lithographic technology can always be obtained. The vertical location of the bottom of the gate metal is controlled by introducing a layer of etch-stop material between the uppermost undoped layer and device active layer(s). Gate strip and gate pad are connected by an airbridge-like gate feeder, which is fabricated by a surface micromachining technique that etches away the semiconductor materials beneath the gate feeder. This kind of novel gate structure can shorten the effective gate length without the penalty of increased gate resistance, and can achieve smaller parasitic gate capacitances. It has been applied to the fabrication of InGaP/GaAs/InGaAs hetrojunction doped-channel FET's, and relatively good results have also been achieved compared with traditional gate structure. The introduction of the etch-stop layer leads to high yield and uniformity, which is important to the industrial mass-production applications.

Description

五、發明説明(1 10 Α7 Β7 產業上之利用領域 滅· 部 中 標 準 % 員 工 消 費 製 20 麥發明係一種V型谷空橋閘極的新穎閘極結構 及其製造方法。背景說明 對場敢電晶體而言,閘極長度的大小和電晶 體本身的特性有著密切的關聯。一般來說,閘極長 度越小,其高頻特性及噪音表現就越佳。目前商品 化的積體電路’其間極長度大都在〇· 5微米以下, 以期犯夠局速知作。如此摄閘極,'是以所謂的電子 束微影技術(electron-beam 1 ithography)加以定 義。與一般的光學接觸式微影技術 contact printing)比較起來,電子束微影技術雖 然具有定義次微米圖樣的能力,但是它也有成本昂 貴、製程費時的缺點Λ此外,隨著閘極長度的縮減 ’其閘極金屬的雜散電阻也以相同的比例増加。此 閘極電阻的增加也會增加電晶體的時間常數,也抵 銷因為縮短閘極長度所帶來在某種程度上的好處一 4 本纸張尺度適用中國國家榡準(CNS ) Α4規格(210Χ297公釐) (讀先閲讀背面之注意事項再填寫本頁}V. Description of the invention (1 10 Α7 Β7 Industrial use field extinction · Ministry of Standards% Staff Consumption System 20 Mai invention is a novel gate structure of a V-shaped valley bridge and its manufacturing method. Background description For transistors, the size of the gate length is closely related to the characteristics of the transistor itself. Generally speaking, the smaller the gate length, the better its high-frequency characteristics and noise performance. Currently commercialized integrated circuits' In the meantime, the length of the pole is mostly below 0.5 micrometers, in order to know the speed. In this way, the gate is defined by the so-called electron-beam lithography. It is similar to the general optical contact micro In comparison, although electron beam lithography has the ability to define sub-micron patterns, it also has the disadvantages of high cost and time-consuming process. In addition, as the gate length is reduced, the stray metal of the gate is reduced. The resistance is also increased in the same proportion. This increase in the gate resistance will also increase the time constant of the transistor, and also offset the benefits to some extent due to the shortened gate length. 4 This paper size applies to China National Standard (CNS) Α4 specifications ( 210 × 297 mm) (Read the precautions on the back before filling in this page}

A7 10 15 經濟部中央標準局員工消費合作衽印製 20 發明説明( 因此,如何能夠同時達到縮短閘極長度及降低閘 極電阻的目的,乃是運用高頻段-低雜音焉用邁進 的關鍵。 所§胃的T形閘極或蘑菇形閘極,因為其有上寬 下乍的横截&形狀’因而可以同時縮短閘極長度並 降低閘極電阻。歐美及日本邮先後發展出製造此 種閑極的製程技術喝顧於電晶触實際製造上 ’其結果證明上寬下窄的τ形閘軛或蘑菇形閘極 的確可以達到比傳統平面形閘極更佳的頻率及雜 音表現。但是在填些製程方法中,除需要應用到前 述的電乎束微影技術,還需配合所謂的多層光阻系 統。由於製程的繁複導致不高的良率與製程均一性 ’再加上電子束微影技術的昂貴與費時,此琿閘極 在量產方面的應用始終有其限制。 本發明所欲解決_題,即是想發展出一種較 簡單的製程方法,來製作ϋ與Ϊ形閘極或蘑兹形閘 極有相同優點的閘極結構,以達到高良率及高製程 (諳先聞讀背面之注意事項再填寫本頁) 0 m· nn H9 In -ΜΨ. 5 :纸張尺度顏 I — I .A7 10 15 Printed by the Central Bureau of Standards, Ministry of Economic Affairs, Consumer Co-operation, Printed 20 Invention Description (Therefore, how to achieve the goal of reducing the gate length and reducing the gate resistance at the same time is the key to the use of high-frequency-low noise. The T-shaped or mushroom-shaped gate of the stomach, because it has a wide cross-section & shape, can shorten the gate length and reduce the gate resistance at the same time. This kind of idle pole process technology pays attention to the actual manufacture of the electric crystal contact. The result proves that the τ-shaped yoke or mushroom-shaped gate with wide upper and lower narrow can indeed achieve better frequency and noise performance than the traditional planar gate. But in filling some manufacturing methods, in addition to applying the aforementioned electron beam lithography technology, it is also necessary to cooperate with the so-called multilayer photoresist system. Due to the complexity of the process, the low yield and process uniformity 'plus the electronics Beam lithography is expensive and time-consuming, and the application of this gate in mass production always has its limitations. The problem to be solved by the present invention is to develop a simpler process method to As a gate structure with the same advantages as a Ϊ-shaped gate or a mushroom gate, to achieve a high yield and high process (谙 first read the notes on the back and then fill out this page) 0 m · nn H9 In -ΜΨ 5: Paper Scale I-I.

、發明説明色 均一.性 5極"的在新^^們提訂—種名為"V财空橋間 。其製料物_决方案 與枯1 ”牵涉到單層光阻與傳統的光學接觸式微 影技術,不但大幅降低成本”式政 乎ηΓΪ ,。灿將此_結構絲翻在次微 H) #梦Ϊ度的鱗化鋼嫁/碎化嫁所化鋼鎵異質接面通道 推雜讀電轉的製作上,已獲得了良好的成果。 先前技術 對於場效電晶體而言,依照Ή· Fukui於丄9乃年 IEEE Trans. Electron Devices, ΕΌ-26(Ί),第 1032-1037頁報導'若能同時縮短閘極長度及降低閘極 電阻,則可操作在更高的頻率範圍,並有更低的雜音指 數。所謂的T形閘極或蘑菇形閘極,因為具有上寬下窄 的橫截面形狀,因而可以同時縮短閘極長度並降低閘極 甜電阻。歐美及日本自198〇年來已先後發展出許多製造 此種閘極的製程技術而Ρ· C. Chao等人於2%7年 工EEE工瓦⑽Tech, digest第410-413頁報導,將 製程技術應用於電晶體的實際製造上,其結果證明上寬 6 i請先聞讀背面之注意事唷—IT) -10^.---1— 經濟部中央標準局員工消費合作社印製5. Description of the invention: Color uniformity. Sexual 5 poles are ordered by the new ^ ^-the name is "V Caikong Bridge." The material solution and solution 1 ”involve single-layer photoresist and traditional optical contact lithography technology, which not only significantly reduces costs” type policy ηΓΪ. Can has turned this structure wire into the submicro H) #Dream of the scaled steel bridging / fragmentation of the steel gallium heterojunction channel, and has made good results in the production of the electric switch. For the field-effect transistor of the prior art, according to Fuku · Fukui's IEEE Trans. Electron Devices, Ε-26-26 (Ό), pp. 1032-1037, 'If the gate length can be shortened and the gate can be reduced at the same time, Resistors can operate in a higher frequency range and have a lower noise index. The so-called T-shaped gate or mushroom-shaped gate has a cross-sectional shape with a wide width and a narrow width, so that the gate length can be shortened and the sweet resistance of the gate can be reduced at the same time. Europe, the United States, and Japan have developed many process technologies for manufacturing such gates since 1980, and P.C. Chao et al. Reported in 2%, 7 years, EEE, watts, Tech, digest, pages 410-413. It is applied to the actual manufacture of transistors. The results prove that the upper width is 6i. Please read the notice on the back first.—IT) -10 ^ .--- 1—Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs

、一吞 I I I I n I- I -- I ml. - 11 I— I - I 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 五、發明説明(4 下窄的T形閘極或蘑菇形間極的確可以達到比傳統平面 也閘極吏佳的頻率及雜音表現。但是在這些製程方法中 ’都需應用昂貴且費時的電子束微影技術,並需配合多 層光阻系統才能達成,且其良率及製程均一性也都不甚 令人滿意。 10 本發明中的閘極結構之所以稱為"v型谷空橋閘極" ,乃是因為它是藉著S. iida等人於丄9·^年工 幻ectr〇c/je2H. 第 lls 卷第 5 期第 768_771 15 20 頁或D. w· Shaw,等人於同一年相同期刊第m卷第 4期第874-880頁所報導非等向性.的,谷濕侧技術 來逹成縮小等效閘極長度的目的。簡單來說,首先於成 長在元件主動層上面之未摻雜半導體層(例如砷化鎵、 矽)中,以非等向性濕蝕刻技術蝕刻出一v型谷;接著 蒸鍍上金屬,再以剝離法定義出閘極形狀。由於V型谷 之斜坡的關係,可以在谷底得耻所使狀微影技術所 能達到的最小線寒還要小很多的等效閘極長度。藉著一 層位於元件主動層和未掺雜半導體層之間的侧停止材 料,吾人可以控制閘極金屬底部的垂直位置,使之恰好 位在钕刻停止層上。至於"空橋"一詞,乃是指在酿金 屬條和閘極金屬極板之間,使用—空橋形狀的閘極饋線 本紙張尺度適用) A4— ( 7 經濟部中央標準局員工消費合作社印袋 A7 — 国· T1 *7 ........ £> / 五、發明説明(5 ) — --*- 予以連接’此閉極饋線是以表面微加工技術,將原來位 於閘極麟下方辭導體材料侧掉,而形成類似空橋 的外形。這樣的空橋結構具f較小的雜雜散電容值, 5依照κ· Y· Hur等人於咖年於贿恤& EleCtr〇,z>ewces,即一4〇(1〇),第 i736_i739 頁 研究可進-步改善電晶體的高頻響應;此外,γ_ L 如〜等人於1991彳咖斷f DeviceOne swallow IIII n I- I-I ml.-11 I— I-I This paper size is applicable to China National Standard (CNS) A4 specification (210X297 mm) 5. Description of the invention (4 narrow T-shaped gates) Or the mushroom-shaped interpole can indeed achieve better frequency and noise performance than the traditional planar gate. However, in these process methods, 'expensive and time-consuming electron beam lithography technology is required, and it must be matched with a multilayer photoresist system. , And its yield and process uniformity are not very satisfactory. 10 The gate structure in the present invention is called " v-shaped valley-air bridge gate " because it is through S. iida et al. 丄 9 · ^ 工 幻 ectr〇c / je2H. Vol. lls No. 5 No. 768_771 15 p. 20 or D. Shaw, et al. In the same year Vol. 4 No. 874 The non-isotropic. Reported on page -880, the valley wet-side technology is used to reduce the equivalent gate length. In simple terms, the first step is to grow an undoped semiconductor layer (such as arsenide) on the active layer of the device. Gallium, silicon), a v-shaped valley is etched by anisotropic wet etching technology; then gold is evaporated The stripe method is used to define the shape of the gate. Due to the slope of the V-shaped valley, the minimum line cold that can be achieved by the lithography technique at the bottom of the valley is much smaller than the equivalent gate length. By a layer of side stop material located between the active layer of the element and the undoped semiconductor layer, we can control the vertical position of the bottom of the gate metal so that it is exactly on the neodymium stop layer. As for the " empty bridge " The word refers to the use of an empty bridge-shaped gate feeder between the metal strip and the gate metal plate. This paper applies to this paper.) A4— (7 Employees ’Cooperative Cooperative Printing Bag of the Central Standard Bureau of the Ministry of Economic Affairs. T1 * 7 ........ £ > / V. Description of the invention (5) —-*-To be connected 'This closed-pole feeder is a surface micro-machining technology, and the conductor is located below the gate electrode. The material falls off to form a shape similar to an empty bridge. Such an empty bridge structure has a small stray capacitance value of f, 5 according to κ · Y · Hur et al. Yu Yanian's bribe & EleCtr0, z > ewces, i.e. 40 (10), page i736_i739 study can further improve the height of the transistor Response; In addition, γ_ L ~ et al., 1991 as the left foot off the coffee f Device

Lett·' EDL 12(7),第360-362頁報導空橋結構也 1〇可增加電晶體的崩潰電壓,而提高其輸出功率。 發明之目的 本發明揭示-種名為"V型谷_橋難"的新賴結構 15及其製程方法。此種閘極與τ形閘極或形閑極有著 相同優點,即具有上寬下窄的橫截面形狀,可同時達到 縮短閘極長度及降低閘極電阻的雙重目的。它優於τ形 閘極或卿形閘極的地方是,其製程方法只轉到傳統 的光學接觸式微影拉術,且只使用單層光阻,大大地簡 20化了 τ形_繁複的製程方法’從而提高了製程良較 製程均一性,V使得此種閘極結構適合於業界在量產方面 的應用。 本紙張尺度適用中國國家標準(CNS > A4规格(210X297公釐) --------ο— (請先聞讀背面之注意事項再填寫本頁) 訂 AV. 五 經濟部中央標準局員工消費合作社印製 A7 B7 、發明説明⑫) 圖表說明 第〜圓、磊晶結構圖 ......未摻雜神化鎵(undoped GaA5)為要形成\^槽之層; ··.·未摻雜磷化銦鎵(InGaP)絕緣體/蝕刻停止層 ’ y ·砰化鎵(GaAs)通道 6"..砷化銦鎵(11^尬3)通道 未換雜神化鎵緩衝層(Undoped GaAs buffer) 1〇0....絕緣體砷化鎵基板(S*I. GaAs) 第二圖、V型谷閘極的製程方法 (a)旋塗先阻 (b)曝光Λ影出一微米之閘極長 (c )用硫釀溶液颠刻{111}鎵(Ga)的斜面 (Φ向下尤餘刻自動停止於鱗化銦鎵 (e)蒸鍍金屬 I .....光阻(Photoresist) 2'.,.· (1〇〇)未掺雜石申 $鎵(10Q Undope4 GaAs ) 3",·填化銦鎵餘刻 停止層(InGaP stop layer) 4".·砷化鎵/砷 銦鎵通道(GaAs/InGaAs channel) 8“.·蘭極金屬 (gate metal) 9…· {111}鎵(Ga)斜面 第三圖、形成空橋形狀之閘極饋線方法 II …’光罩遮罩(Photoresist mask) 12 開窗 ^ (window opening) 13......閘極饋線^區域 第四圓、傳統閘極結構 (a)上視圖 (b)侧視圖 2.” ·詧f (drain) 15.“ ·源極(SOUrce) 〒·,板(substrate) 18... ·通道(channel) 2.“·閑極金屬節(gate strip) 2〇."·閘極饋入Lett 'EDL 12 (7), pages 360-362 reported that the air bridge structure also increased the breakdown voltage of the transistor and increased its output power. OBJECTS OF THE INVENTION The present invention discloses a Xinlai structure 15 named "V-shaped valley_bridge difficult" and its manufacturing method. This type of gate has the same advantages as a τ-shaped gate or a free-pole, that is, it has a narrow cross-section shape with a wide width and a narrow width, which can simultaneously achieve the dual purpose of reducing the length of the gate and reducing the resistance of the gate. The advantage of τ-shaped gate or clear-shaped gate is that its process method is only transferred to the traditional optical contact lithography and uses only a single layer of photoresist, which greatly reduces the τ-shaped _ complex The 'process method' thus improves the process uniformity compared to the process uniformity. V makes this gate structure suitable for the industry's mass production applications. This paper size applies to Chinese national standards (CNS > A4 size (210X297 mm) -------- ο— (Please read the precautions on the back before filling out this page). Order AV. 5 Central Standards of the Ministry of Economy Bureau of the Consumer Cooperative printed A7 B7, invention description ⑫) The diagram illustrates the first ~ circle, epitaxial structure ... Undoed GaA5 is the layer to be formed; · Undoped InGaP insulator / etch stop layer 'y · GaAs channel 6 " .. Indium Gallium Arsenide (11 ^ 3) channel is not replaced with doped gallium buffer layer (Undoped GaAs buffer) 100 .... Insulator GaAs substrate (S * I. GaAs) Second picture, V-shaped valley gate process method (a) Spin-coat first resistance (b) Exposure Λ shadows a micron The gate length (c) is engraved with the sulfur solution to slop the {111} gallium (Ga) slope (Φ down, especially the rest of the time, it automatically stops at the scaled indium gallium (e) vapor-deposited metal I ..... Photoresist (Photoresist) 2 '... (1〇〇) Undoped GaN (10Q Undope4 GaAs) 3 ", · InGaP stop layer 4 " .. · GaAs / InGaAs channel (GaAs / InGaAs channel) 8 ". · 兰Gate metal 9…. {111} Gallium (Ga) bevel 3rd figure, gate feeder method of forming an empty bridge shape II… 'Photoresist mask 12 Open window ^ (window opening) 13 ... the fourth circle of the gate feed line ^ area, the traditional gate structure (a) top view (b) side view 2. "詧 f (drain) 15." "source (SOUrce) 〒 ·, Board (substrate) 18 ... · channel 2. "· gate strip metal gate (gate strip) 2〇. &Quot;

Ji^ate feeder) 21....閘極墊板(t d)Ji ^ ate feeder) 21 .... gate pad (t d)

第五圖、空橋閘極結構 P (a)上視圖 (b)側視圖 第六圖、製作元成的V型谷閘極結構剖:面圖 (a) 專效閘極長度約為0 · 6微米的v型谷閘極 (b) 閘極長度近乎為零的▽型谷閘極。主 9 本紙張尺度適用中國國家標準(CNS ) A4規格(210 X 297公釐) (請先閲讀背面之注意事項再填寫本頁} 、可 10 15 五、發明説明(7 ) 發明之詳細說明: 本發明係-種V型谷空橋閘極"的新穎閘極結構 5及其製造方法;包括下列步驟: (a〉提供一半導體基板; (b)在該半導體基板上,以蟲晶成長或離子佈植等方式 ,形成一層或一層以上的元件通道層; ⑹在元件通騎的上方,棘—核—私上的 停止層; ⑹在蝴停止層的上方,成長—層未摻雜半導體層; ⑹在未摻雜半導體層上,定義㈣極圖樣,並用化學 藥劑之侧選雜麵露之未摻料導體層上,作非等 向性飯刻以侧出- V型谷,並使其下祕刻停止層於 V型谷的谷底曝露出來; (f)在V型谷中放置_材料形成間極; ⑻去除_猶之下的料體材料⑽成空橋閑極 結構。 一其中該半導體基板為可在其上遙晶成長其他半導體 之三五族化合物半導體,最適宜之半導體基板可選用坤 化嫁上述之通道層為具高電子移動度之半導體,最適 宜之通道層可選用坤化鎵或石申化銦鎵。該未推雜半導體 (請先閣讀背面之注意事項再填寫本頁) 濟 部 中 央 標 準 局 員 工 消 費 合 作 社 印 製 20 10 1„---ο------fIT------藝---7I---i -111 - am 本紙張尺度適用中國國家標準(cns 公釐)_ 經濟部中央標準局員工消費合作社印製 五、創作說明(8 =1_度之半導體’最適宜之未摻雜半導體層可選 半祕ίΜ化鎵。侧停止層所崎料可_與未摻雜 導體層財_瓶率之轉體,例如義磷化銦鎵。 上述於閘極形成圖樣係包含於該基板表面上塗佈一感 先物質層,·曝光及顯影該感光物質相形成〜圖樣化之感 光物質層;其中圖樣之感光物質層可暴露該基板上蟲晶層 的。Ρ刀表面’或選擇不暴露該部分表面。其感光物質層 為一光阻層藉光罩及紫外光而進行曝光,並運用硫酸一過氧 化氫-水溶液之類化學細,對未摻雜轉體及_停止層 具不同蝕刻速率之溶液;該化學藥劑能對該未摻雜半導體 能侧出ν賴。該空橋結構乃_任何對細極金屬及 對其下材料具不同蝕刻速率之溶液加以成形,其中該蝕刻 洛液乃選用鹽酸-鱗酸溶液及硫酸-過氧化氣_水溶液。 5 10 15 實施例 以下,以一鱗化銦鎵/砷化鎵/砷化銦鎵異質接面通 20道摻雜場效電晶體為例,詳述ν型谷空橋閘極結構應用 在電晶體製作上的製程方法及獲致的結果。 此電晶體的異質蟲晶層結構如第一圖所示。最上面的 是一層厚約1微米的未掺雜砷化鎵,ν型谷就是在這— 11 (請先閲讀背面之注意事項再填寫本頁) -一叮. ^氏張尺度適射額家標準(CNS)A4規格(21GX297公釐) 五、發明説明(9 層傾=用非等向性難刻技術_出來的 接下來的疋—層厚1QQ埃的未摻_化_’依昭Η 工to專人於醜年山wectr〇c_•加.,第w 5卷第10期第3383-3386頁報導方法對 10 的韻刻選擇率,故可做為v型谷綱時的侧停止= 同時,它也扮演了通道摻雜場效電晶體中絕緣層的角色 :接下來’同為3x,cnf3 n型捧料一層ι〇〇埃的 砷化鎵和-層咖埃㈣化錮鎵,是做為元件之通道層 。其下是5_埃的未摻雜坤化鎵緩衝層,以及珅化鎵 基板(100)。 15 經 濟 部 t 央 標 準 局 員 X. 消 費 合 作 社 印 製 此電晶體之V型谷閘極的製程方法如第二圖所示。在 以濕侧完成,的6狀元件隔離,並以退火處理源— 錄的紐金屬鄉姐输點後,先在難區域上旋 覆-層光阻’請參見第二圖(a)。其次,以傳統的光學 接爾式微微術,沿著(Q1T)的方向在絲上定義出間極 長度約為1微米的閘極金屬條之圖樣,如第二圖⑴)所 示。接著,以非等向性餘刻溶液(如硫酸_雙氧水一水之 20蝕刻溶液系統)’在閘極定義區域進行蝕刻。由於砷化鎵 的晶格結合是屬於閃鋅結構,因此在非等向性鍅刻溶液 中會呈現{111}鎵(Ga)的斜面,如第二圖(c)所示。此 12 本紙張尺度適用中國國豕標準(CNS ) A4規格(21〇χ297公楚;) 經濟部中央標準局員工消費合作社印製 Λ、發明i明;!(〇 ) '~~ -一~~--- 非等向性蚀刻過程會在往下麵至鱗化銦鎵餘刻停止層 時自動停止,而形成如第二圖(d)所示的v M谷結構。 最後’以真空蒸鍍的方式蒸鍍上鈦/勘/金或鉻/金等金 5屬’再以刹離法定仙閘極金屬區域,如第二圖⑹所 示。在第二圖⑻巾可崎楚地看a,v型谷閘極的等 效閘極長度(即閘極金屬和磷化銦鎵絕緣層接觸部份的 長度),比起微影技術在光阻上定義出來的長度要小了許 多。若填當地選擇最上系的未摻雜神化鎵層的厚度和恰 10當的侧溶液,埋論上我們甚至可以達成钱閘極長度 幾乎為零的V型谷閘極。除了縮短閘極長度之外,V型 谷閘極結構還有下面幾項優點:(1) v型谷蝕刻可幫助 達到將近100 %的閘極金屬剝離良率;(2) v型谷钱 刻使得菩人寸以增加閘極金屬的厚度,而進一步降低間 15極電阻;(3) V型各閘極與τ形閘極或蘑菇形閘極一樣 ,具有上寬下窄的橫截面形狀,適合於自我對正閘極 (self-aligned gate)的實現’可降低源極及沒極電 阻。 20 至於形成空橋形狀之閘極饋線方法,請參見第三圖。 首先我們在製作完成的V型谷閘極上旋覆一層光阻,再 於閘極饋線的區域以光拳接觸式微影技術開出一個窗口 13 -----^--X---0---,---1訂------ (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 經濟部中央標準局員工消費合作社印製 五、發明説明h ) ~ 〜-—-—~--- 表2 ’以硫酸-雙録—水和鹽酸一嶙酸餘刻溶液進行 表面微加工技術,卿_極饋線下方的各半導體層 酿其中’鹽酸溶液是用編域化銅嫁,而硫 =氧水-水娜容液則是用來侧钟化鎵及钟化姆 的。第四圖中顯示了傳統閘極結構的上視圖(第四圖(a)) 和側視圖(第四圖_,而第五_橋閘極結構的上視 圖(第五圖⑻)和側視圖(第五圖(b));從兩份圖中可 以看出兩者明顧的不同。 10- 製作完成的v型谷閘極結構剖面圖請參見第六圖。在 第六圖⑷中可以清楚看出,利用本發明'方法製作一等 效閘極,其Μ約為0 · 6微米的v型谷閘極已成功地被 製作在未摻雜钟化鎵的V型谷中,其閘極金屬的底部恰 15好接觸在磷躺鎵侧停止層上。此v型谷閘極乃是用 線寬為1 ·2微求的光學接觸式微影製程技術製作出來的 。而在第六圖(b)中’我們使用線寬$ i微米的微影技 術 > 在較厚的未摻雜碎化鎵層中,可以製造出'谷底長度 (即等效間極長度)幾乎為零的7型谷閘極。另外值得住 2〇意的是,因為在金屬蒸鍍前多了 v型谷姓刻的製程步驟 ,閘極金屬可以較一般平面型閘極鍍得更厚,閘極電阻 也可因而進一步降低。在第六圖(b)中清楚地顯示出, 14 本紙張尺度適用中國國家標準(CNS〉八4規格(210><297公楚) : — - -----ΓΙ---Q-----—訂----1—ΜΨ (請先聞讀背面之注意事項再填寫本頁) A7 經濟部中央標準局員工消費合作社印製 五、發明説明(12丨 -*~-—~S— 即使間極金屬厚至!_微米以上,仍可順利地完成金屬剝離 〇 5 上面的實驗結果顯示,v型谷空橋閘極是一種達到次微 米閘極電晶體的有效方法。它和現有的方法比較起來,有 著較低的成本和較高的良率與製程均一性,極具工業界量 產的潛力。雖然本發明已以一較佳實例揭露如上,然其並 非用以限定本發明,任何熟習此項技藝者,在不脫離本發 10明之精神和範圍内,當可作些許之更動與潤飾,因此本發 明之保護範園以後附之申請專利範圍所界定者為準。 5 11 ο 2 15 本紙張尺度適( CNS ) KA^M- ( 210x297-^^7 (請先聞讀背面之注意事項再填寫本頁)Fifth figure, empty bridge gate structure P (a) top view (b) side view sixth figure, production V-shaped valley gate structure cross section: surface view (a) the effective gate length is about 0 · 6 micron v-type valley gate (b) ▽ -type valley gate with a gate length of almost zero. Main 9 This paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the notes on the back before filling out this page} , 可 10 15 V. Description of the invention (7) Detailed description of the invention: The present invention is a novel gate structure 5 of a V-shaped valley bridge gate and a method for manufacturing the same. The method includes the following steps: (a) providing a semiconductor substrate; (b) growing on the semiconductor substrate with a worm crystal Or ion implantation to form one or more element channel layers; 棘 above the component pass, the spine-nucleus-private stop layer; ⑹ above the butterfly stop layer, grow-a layer of undoped semiconductor ; On the undoped semiconductor layer, define the ㈣ electrode pattern, and use the side of the chemical agent to select the non-doped conductor layer exposed with miscellaneous surface, make anisotropic rice carving to side out-V-shaped valley, and make The bottom secret stop layer is exposed at the bottom of the V-shaped valley; (f) Placing _ material in the V-shaped valley to form a pole; ⑻ Remove the material under the __ into the structure of the empty bridge pole. The semiconductor substrate is the third one on which other semiconductors can be grown. For Group 5 compound semiconductors, the most suitable semiconductor substrate can be selected from Kunhua. The above-mentioned channel layer is a semiconductor with high electron mobility, and the most suitable channel layer can be selected from gallium or gallium indium gallium. This unmixed semiconductor (Please read the precautions on the back before filling in this page) Printed by the Consumers' Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 20 10 1 „--- ο ------ fIT ------ 艺 --- 7I --- i -111-am This paper size applies to Chinese national standards (cns mm) _ Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs 5. Creative Instructions (8 = 1_ Degree of Semiconductors' Most Suitable Undoped) The semi-secreted GaN can be used for the semiconductor layer. The side stop layer can be used as an alternative to the undoped conductor layer, such as indium gallium phosphide. The pattern formed on the gate is included in the substrate. The surface is coated with a sensing material layer, and the photosensitive material phase is exposed and developed to form a patterned photosensitive material layer; wherein the photosensitive material layer of the pattern can expose the insect crystal layer on the substrate. The part of the surface is exposed. The photosensitive material layer is a photoresist layer Mask and ultraviolet light for exposure, and use chemical fines such as sulfuric acid-hydrogen peroxide-aqueous solution, solutions with different etching rates for the undoped rotor and _stop layer; the chemical agent can It can be extended to the side. The empty bridge structure is _ any solution that has different etching rates for fine metals and underlying materials. The etching solution is selected from hydrochloric acid-scale acid solution and sulfuric acid-peroxide gas. 5 10 15 In the following examples, a scaled indium gallium / gallium arsenide / indium gallium arsenide heterojunction interface with 20 doped field effect transistors is used as an example to describe the application of the ν-type valley-air bridge gate structure. Process method and results obtained in transistor production. The structure of the heteromorphic worm crystal layer of this transistor is shown in the first figure. The top layer is a layer of undoped gallium arsenide with a thickness of about 1 micron. The v-shaped valley is here — 11 (Please read the precautions on the back before filling this page)-Yiding. Standard (CNS) A4 specification (21GX297 mm) V. Description of the invention (9 layer tilt = next anisotropy with non-isotropic hard-engraving technique _ unmixed layer thickness of 1QQ angstrom__ 依 昭 Η The person to work in Yu Nianshan wectr〇c_ • .., Vol. 5, Vol. 10, No. 3383-3386, reported that the method has a rhyme selection rate of 10, so it can be used as a side stop when v-shaped valleys = simultaneously It also plays the role of an insulating layer in a channel-doped field-effect transistor: the next 'both are 3x, cnn3 n-type layers of GaAs and Ti-GaAs, which are Used as the channel layer of the device. Below it is a 5 Angstrom undoped gallium buffer layer and a gallium halide substrate (100). 15 Member of the Central Standards Bureau of the Ministry of Economic Affairs X. Consumer Cooperative printed V of this transistor The manufacturing method of the valley gate is shown in the second figure. After the 6-shaped elements are completed on the wet side, and annealed to the source—the recorded New Metal Village sister loses the point, Twist-layer photoresist on difficult area 'Please refer to the second figure (a). Secondly, with the traditional optical pickup micro-surgery, the length of the interpole is defined on the wire along the direction of (Q1T) is about 1 The pattern of the micron gate metal strip is shown in the second figure ii). Next, use an anisotropic post-etching solution (such as a sulfuric acid-hydrogen peroxide-water 20 etching solution system) 'to etch in the area defined by the gate. Since the lattice bonding of gallium arsenide is a zinc flash structure, the {111} gallium (Ga) slope will appear in the anisotropic etching solution, as shown in the second figure (c). These 12 paper standards are applicable to China National Standard (CNS) A4 (21〇297297); printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs, and invented;! (〇) '~~-一 ~~ --- The anisotropic etching process will stop automatically when going down to the scaled indium gallium epitaxial stop layer, and a v M valley structure is formed as shown in the second figure (d). Finally, “metals such as titanium / Kan / Gold or Chromium / Gold etc. are vapor-deposited by vacuum evaporation” and then the legal metal gate area is braked off, as shown in the second figure 第二. In the second picture, the equivalent gate length of a, v-shaped valley gate (that is, the length of the contact portion between the gate metal and the indium gallium phosphide insulating layer) can be seen scrupulously. The length defined on the resistance is much smaller. If we choose the thickness of the top undoped aluminized gallium layer and the right side solution, we can even reach V-shaped valley gates with almost zero gate length. In addition to shortening the gate length, the V-shaped valley gate structure has the following advantages: (1) v-shaped valley etching can help achieve nearly 100% gate metal stripping yield; (2) v-shaped valley cut This makes the Boren inch increase the thickness of the gate metal and further reduce the resistance between the 15 poles; (3) V-shaped gates have the same width and narrow cross-section as the τ-shaped or mushroom-shaped gates. Suitable for the realization of self-aligned gate ('self-aligned gate)' can reduce the source and non-electrode resistance. 20 As for the method of forming the gate feeder of the empty bridge, please refer to the third figure. First, we rolled a layer of photoresistor on the completed V-shaped valley gate, and then opened a window with photofist contact lithography technology in the gate feeder area. 13 ----- ^-X --- 0- -, --- 1 order ------ (Please read the notes on the back before filling this page) This paper size applies to China National Standard (CNS) A4 (210X297 mm) Employees of the Central Standards Bureau of the Ministry of Economic Affairs Printed by the Consumer Cooperative V. Description of the invention h) ~ ~-------Table 2 'Surface micromachining technology with sulfuric acid-double recording-water and hydrochloric acid monoacetic acid solution, Qing _ under the pole feeder The semi-conductor layers are made of 'hydrochloric acid solution which is made of kneaded copper, and sulfur = oxygen water-water Na volume solution is used for gallium and bell chemical. The fourth figure shows the top view of the traditional gate structure (fourth figure (a)) and side view (fourth figure _, and the fifth _ bridge gate structure top view (fifth figure ⑻) and side view (Fifth figure (b)); From the two figures, we can see the difference between the two. 10- The sectional view of the completed v-shaped gate structure is shown in Figure 6. In Figure 6, you can It is clear that by using the method of the present invention to make an equivalent gate, a v-shaped valley gate with an M of about 0.6 micrometers has been successfully fabricated in a V-shaped valley without doped gallium bellows. The bottom of the metal is just in contact with the stop layer on the gallium side of the phosphor. The v-shaped valley gate is made by the optical contact lithography process technology with a line width of 1.2 micron. And in the sixth figure ( In b), 'we use the lithography technology with a line width of $ micron> In the thick undoped and fragmented gallium layer, a' type 7 'where the bottom length (ie, equivalent interpole length) is almost zero can be manufactured. Valley gate. In addition, it is worth to pay 20% because, because there are more V-type valley engraving process steps before metal evaporation, the gate metal can be plated more than ordinary planar gate. Thicker, the gate resistance can be further reduced. As clearly shown in Figure 6 (b), 14 paper standards are applicable to Chinese national standards (CNS> 8-4 specifications (210 > < 297)):- ------ ΓΙ --- Q ------- Order ---- 1—ΜΨ (Please read the precautions on the back before filling out this page) A7 Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs V. Description of the invention (12 丨-* ~ --- ~ S— Even if the intermetallic metal is thicker than _μm, metal stripping can still be successfully completed. 5 The above experimental results show that the v-shaped valley-air bridge gate is a An effective method to achieve sub-micron gate transistors. Compared with existing methods, it has lower cost and higher yield and process uniformity, which has great potential for mass production in the industry. Although the present invention has been The preferred example is disclosed above, but it is not intended to limit the present invention. Any person skilled in the art can make some changes and retouches without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention is The definitions of the scope of patent applications attached later shall prevail. 5 11 ο 2 15 Zhang appropriate scale (CNS) KA ^ M- (210x297 - ^^ 7 (please read the Notes on the back of the smell and then fill the page)

Claims (1)

請 先 聞 t* 背 意Please smell t * first SS ff I 訂I order 鯉濟部t央章局5消费合作衽ί A8 B8 C8 D8 、甲請專利範圍 - 9.如申請專則範圍第8項辦述之製造方法,其中該蝕 刻停止層為磷化銦鎵。 、 10 ·如申請專利範圍第i項所填之製造方法,其中該閘 極圖樣之形成包含於該基板表面上塗佈一感光物質 層曝光及顯影該感光物質層而形成一圖樣化之感光 物質層。 11.如申請專利範園第10項所述之製造方法’其中該 圖樣化之礅光物質層被形成之圖樣使得該基“袁1 之磊晶層的該表面的一部分被暴露。f/土敬具上 I·2.如申請專利範圍第10項所述之製造方法,且中噹 圖槔化今咸光物質層使得該基板其上之磊晶 表面有部分未被暴露。 9人 13·如申請專利範園第項所述之製造方法,i中該 基,其土冬磊晶層表面只有該暴露的部分於步^ ( 中被餘刻。 I4.如申請專利範園第1〇項所述之製造方法, 層為-光阻層藉使用—光罩及紫外“ 3·5·如争譜專利範圍第i項所述之製造方法, 係任何對該奉摻雜半導體及該餘刻 不同餘刻速率之溶液。 層具 16·如申請專利範圍第項所述之製造方 化學藥劑對該未摻雜半導體能蝕刻出v型栌。〃中該 專利範圍第ί5項所述之製造方法' 罝中兮 化學樂劑係硫酸-過氧化氫一水溶液。 ,、中5亥 丄8 ·如申請專利轉圍第]_項所述冬製造方法, 嚣結構乃利用往何對該閘極金屬及對其空 同蝕刻速率之溶液來成形。 材枓具不 19如申請專利範園第1S項所述之製造方 餘刻溶液乃鹽釀〜磷酸溶液及硫酸__過氧化氣The Ministry of Economic Affairs of the People's Republic of China and the Central Government Bureau 5 Consumer Cooperation 衽 A8 B8 C8 D8, A patent scope-9. The manufacturing method described in item 8 of the scope of the application, where the etching stop layer is indium gallium phosphide. 10. The manufacturing method as described in item i of the scope of patent application, wherein the formation of the gate pattern includes coating a photosensitive substance layer on the substrate surface to expose and develop the photosensitive substance layer to form a patterned photosensitive substance. Floor. 11. The manufacturing method according to item 10 of the patent application park, wherein the pattern of the patterned phosphorescent material layer is formed such that a part of the surface of the base "yuan 1 epitaxial layer is exposed. F / soil Please respect I · 2. The manufacturing method as described in item 10 of the scope of patent application, and the current state of the salty light material layer is left in the middle layer so that the epitaxial surface of the substrate is not exposed. 9 person 13 · 如In the manufacturing method described in the first paragraph of the patent application, in the base i, only the exposed part of the surface of the earth's winter epitaxial layer is exposed in the step ^ (I4. As described in the tenth patent application park The manufacturing method described above, the layer is-photoresist layer borrowed-photomask and ultraviolet "3 · 5. The manufacturing method described in item i of the spectrum content patent range is any doped semiconductor and the rest is different Solution at the remaining rate. Layer 16. The manufacturer's chemical agent described in the scope of the patent application can etch a v-shaped ytterbium on the undoped semiconductor. The manufacturing method described in the fifth scope of the patent scope. Xunzhongxi Chemical Music Agent is a sulfuric acid-hydrogen peroxide aqueous solution. 8 · As the winter manufacturing method described in item [] in the application for patent revolving, the structure is formed by using the solution of the gate metal and the etching rate of the same space. The material is not as good as the patent application park. The manufacturer's remaining solution described in item 1S is salt brewing ~ phosphoric acid solution and sulfuric acid __ peroxide gas rη---Q! (諳先閱讀背面之注意事項再填寫本頁) 、1Trη --- Q! (谙 Please read the notes on the back before filling this page), 1T
TW87100526A 1998-01-16 1998-01-16 Processing method of V-groove airbridge gate with etch-stop layer TW400582B (en)

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