經於部中夾樣枣^乃X.消贽合作社印ti A7 ---------------B7 五、發明説明（1 ) 本發明係提供一種微電感之製造方法及其構造，特別 是和一種利用微電鍍技術，將一高鐵磁性材料電鍍於微電 感線圈内側之微電感者。 按，近年來台灣半導體工業的快速發展，不僅帶動了 5整個台灣工業的技術升級，同時也使得電子資訊產業及電 腦周邊的相關產品更是在世界上扮演舉足輕重的角色而 在未來半導體元件研發之中，微機電元件已被預估為二十 一世紀的新星，因此，該方面的研發不管是業界或是學術 界都正在如火如荼的進行著。 10 在積體電路的製造過程中，為了加快反應速度、減少 雜訊干擾、縮小晶片面積，業者乃將如電晶體、二極體、 電阻、電容或電感等電子元件整合製造於一晶片上，其中， 該電子元件中，電感在製程技術的處理上是最困難也是最 麻煩的，以致於在半導體工業的技術進程中，電感的製程 15技術發展較慢也較少，目前所知道的習知技術有··一平面 線圈（Planar coii)電感1，如第一圖所示，雖然該平面線 圈1較容易製造於一半導體上，也可達到電感的功效，然而 由於漏磁量大及介質導磁率不高，導至微電感t的感值及9 值（Quality Factor)太小，以致於效率不高。 20 在1997年，美國哈佛大學Rogers等人，以微印刷術 (Micro-contact printing)技術製作 了一螺旋線圈（helical coil)的立趙微電感2，如第二圖所示，此種立體微電感2已 漸漸接近於傳統（非半導體製作）之電感特性，然而，由於 以往半導體技術的限制，無法在該立體微電感2的内側置入 __第4頁 ^張尺度適/if中國國家標準（CNS ) A4規格（2丨0X297公慶）·------ --------f裝-------訂------綠>- (#先閲讀背面之注意事項再填寫本頁) - - 五 10 15 A7 B7 if Ά 部 中 央 樣 準 Mj il -Τ 消 合 作 a 卬 V- 20 發明説明（2 ) 增進電感特性的材料，以致於感值及〇值(^仙11坊Fact〇r) 的增進上，還是有其侷限性。 有鑑於上述習知微電感的的缺失，於是，本案發明人 乃經詳思細索，並積多年從事相關工作經驗，幾經修正、 試製，終研創出本發明。 故，本發明係在於提供一種微電感之製造方法及其構 造，尤其是指一種利用微電鍍技術，將一高鐵磁性材料電 鍵於電感線圈内側之微電感者。 依據上述目的，本發明一種微電感的製造方法，該微 電感之電感基材具有一基底，在基底上依序形成有一絕緣 層，一第一金屬層，一第一介電層，一阻障層，一第二金 屬層，一反反光層，一第二介電層，一第三金屬層，一第 三介電層，以及一保護層等；該製造方法係包含有下列步 驟.a.利用微影技術及蝕刻技術蝕去該保護層，第三介電 層，第二金屬層以及該第二介電層，俾以形成接觸窗口；汰 利用濕蝕刻技術經由上述接觸窗口蝕去該反反光層；c·利 用濕蝕刻技術經由上述接觸窗口蝕去該第二金屬層以形成 一微隧道；d.以該阻障層為電極進行微電鍍作業，成長一 高鐵磁性材料於該微隧道中，俾以增加微電感的Q值及導 磁係數，將金屬導線繞成封閉的螺線管或螺線環減少漏磁 在基底的損失’達到提昇微電感的工作效率。 本發明亦提供一種實施該方法之構造，係包含有—基 底；一絕緣層，其係形成於該基底上；一第一金屬層，其 係形成於該絕緣層上；一第一介電層，其係形成於該第二 __ 第5頁 本紙張尺度通用中國國家標準（CNS ) A4規格（21〇><297公釐） {請先閲讀背面之注意事項再填寫本頁j 裳-In the middle of the Ministry of sample-like date ^ is X. Consumer Cooperatives printed ti A7 --------------- B7 V. Description of the invention (1) The present invention provides a method for manufacturing a micro-inductor And its structure, especially a micro-inductor using micro-electroplating technology to electroplate a high-ferromagnetic material on the inside of the micro-inductance coil. According to the recent rapid development of Taiwan ’s semiconductor industry, not only has it promoted the technological upgrading of the entire Taiwan ’s industry, but it has also made the electronics and information industry and related products around the computer play a pivotal role in the world. In China, micro-electro-mechanical components have been predicted to be the new stars of the 21st century. Therefore, research and development in this area are in full swing in both industry and academia. 10 In the manufacturing process of integrated circuits, in order to speed up the reaction speed, reduce noise interference, and reduce the chip area, the industry integrates electronic components such as transistors, diodes, resistors, capacitors, or inductors on a chip. Among them, the inductor is the most difficult and troublesome in the processing technology of the electronic component, so that in the technical process of the semiconductor industry, the development of the inductor 15 technology is slower and less. Technologies include: · a planar coil (Planar coii) inductor 1. As shown in the first figure, although the planar coil 1 is easier to manufacture on a semiconductor, it can also achieve the effect of inductance. However, due to the large magnetic leakage and dielectric conductivity The magnetic permeability is not high, and the inductance value and 9 value (Quality Factor) of the micro inductance t are too small, so that the efficiency is not high. 20 In 1997, Rogers et al. Of Harvard University in the United States produced a helical coil of micro-inductor 2 using micro-contact printing technology. As shown in the second figure, this three-dimensional micro-inductor Inductor 2 has gradually approached the traditional (non-semiconductor) inductance characteristics. However, due to the limitation of previous semiconductor technology, it is not possible to place the three-dimensional micro-inductor 2 inside. (CNS) A4 specification (2 丨 0X297 public celebration) · ------ -------- f installed ------- order ------ green >-(# 先Read the notes on the back and fill in this page)--5 10 15 A7 B7 if 中央 Central sample Mj il -T Consumer cooperation a 卬 V-20 Description of the invention (2) Materials that improve inductance characteristics, so that the inductance and The improvement of 〇 value (^ 仙 11 坊 Fact〇r) still has its limitations. In view of the lack of the above-mentioned conventional micro-inductors, the inventor of the present case has carefully considered and accumulated many years of experience in related work. After several amendments and trial productions, the present invention was finally developed. Therefore, the present invention is to provide a method and a structure for manufacturing a micro-inductor, and particularly to a micro-inductor that uses a micro-electroplating technology to electrically bond a high-ferromagnetic material to the inside of an inductor coil. According to the above object, a method for manufacturing a micro-inductor according to the present invention, the micro-inductor substrate has a substrate, and an insulating layer, a first metal layer, a first dielectric layer, and a barrier are sequentially formed on the substrate. Layer, a second metal layer, a reflective layer, a second dielectric layer, a third metal layer, a third dielectric layer, and a protective layer; the manufacturing method includes the following steps. A. The protective layer, the third dielectric layer, the second metal layer, and the second dielectric layer are etched away by using a photolithography technique and an etching technique to form a contact window; the wet etching technique is used to etch away the reflection layer through the contact window. Reflective layer; c. Use wet etching technology to etch away the second metal layer through the contact window to form a micro-tunnel; d. Use the barrier layer as an electrode for micro-electroplating to grow a high-ferromagnetic material in the micro-tunnel In order to increase the Q value of the microinductor and the magnetic permeability coefficient, the metal wire is wound into a closed solenoid or a spiral ring to reduce the loss of magnetic leakage on the substrate, so as to improve the working efficiency of the microinductor. The invention also provides a structure for implementing the method, which comprises a substrate; an insulating layer formed on the substrate; a first metal layer formed on the insulating layer; a first dielectric layer , Which is formed on the second __ page 5. This paper is a common Chinese National Standard (CNS) A4 specification (21〇 > < 297 mm). {Please read the precautions on the back before filling in this page. -
、1T A7, 1T A7
五、發明説明（3 ) 金屬層上；一阻障層，其係形成於該第一介電層上，作 電鍍時電極之用；一高鐵磁性材料層，其係利用—微電鍍 技術形成於該阻障層上；一反反光層，其係形成於該高： 磁性材料層上第二介電層，其係形成於該反反光層上； 5 一第二金屬層，其係形成於該第二介電層上；一第三介電 層，其係形成於該第三金屬層上；以及一保護層，其係覆 蓋於該第三介電層上，保護積體電路使不受到外來損害； 藉由上述構造，在該微電感之中心内側建構一具有一高導 磁性之咼鐵磁性材料，一方面增加了微電感的Q值及導磁 係數，將金屬導線繞成封閉的螺線管或螺線環減少漏磁在 基底的損失，另一方面也因而減少需求面積，達到積體電 路縮小化之目的β 有關本發明所採用之技術、手段及其功效，茲舉一較 佳實施例並配合圖式詳細說明如后，相信當可由之得一深 15 入而具體的瞭解。 圖式之簡單說明： 第一圖所示係習知之平面微電感示意圖； 第二圖所示係習知之立體微電感示意圖； 第三圖至第七圖所示係本發明一較佳實施例之製程剖面 示意圖； 第三圖所示係本發明一基本構造剖面示意圖； 第四圖所示係本發明一較佳實施例經微影技術及乾蝕刻 技術蝕後，形成接觸窗口並利用濕蝕刻蝕去反反 光層之製程剖面示意圖； 請 先 聞 讀 背 ιδ 之 注 項 再 裝 10 20 第6頁 本紙張尺度適川中國國家標準（CNS ) Α4規格（210X297公釐） 訂 A7 B7 五、發明説明（4 ) 第五圖所示係本發明一較佳賞施例經濕蚀刻技術蚀刻 後’蝕去第二金屬層形成一隧道之製程剖面示意 ran · 圃， 第六圖所示係本發明一較佳士施例經微電鍍技術電鍍 5 後’成長一高鐵磁性材料（鎳-鐵）於微隧道内之 製程剖面示意圖； 第七圖所示係本發明一較佳實施例微電感的構造剖面示 意圖；及 第八圖所示係本發明一較隹實施例立體微電感結構示意 10 圖。 圖式中之參照編號： 3 微電感 31 基底 32 絕緣層 15 33第一金屬層 33Ί ' 38Ί 導線 34第一介電層 35阻障層 36第二金屬層 2〇 37第二介電層 38第三金屬層 39第三介電層 41保護層 43反反光層 第7頁 (讀先閱讀背面之注意^項苒填寫本\* ) '装. 订 本紙张尺度適州中國國家標率（CNS ) M規格（210X 297公釐）* . · · 經"-部中央榀4,-^h τ>ί7ί於合作妇印製 A7 ~ _ B7 ———丨 11 I ' 1 " —---— — _ _ 五、發明説明（5 ) 44 微隧道 45 高鐵磁性材料層 51 接觸窗口 61 連線 5 62 螺旋形線圈 首先’請參閱第三及第八圊係本發明一較佳實施例之 刮面構造示意圖，如圖所示，本實施例所顯示之一種微電 感3，該微電感3之電感基材30於本較佳實施例中係屬CM〇s 型態，其包含有一基底31，在基底31上依序形成有一絕緣 10層32, 一第一金屬層33, 一第一介電層34, 一阻障層35, 一 第二金屬層36，一反反光層43，一第二介電層37，一第三 金屬層38，一第三介電層39，以及一保護層41等，其中， 該絕緣層32係可為二氧化矽（si〇2)，該第一金屬層33係可為 鋁-矽-銅合金（Al-Si-Cu Alloy)，該第一介電層3,4係可為二 15氧化矽（以〇2) ’該阻障層35係包含氮化鈦及金屬 層36係可為銘-石夕-銅合金（A1-Si-Cu Alloy)，該反反光層43 係可為氮化鈦（TiN) ’該第二介電層37係可為二氧化矽 (Si〇2) ’該第三金屬層38係可為銘-發-銅合金（Ai-si-Cu Alloy)，該第三介電層39係可為二氧化矽（Si〇2)，以及該保 20護層41係可為氮化矽（SiN);該製造方法係&含有下列步 驟： 請續參閱第四圖所示，係本發明一較佳實施例經微影 技術及乾姓刻技術蚀刻後，形成接觸窗口並鞋去反反光層 之製程剖面示意圓，首先，步驟a.利用微影技術及乾蝕刻 第8頁 本紙張尺度速兄中國國家標準（CNS ) A4規格（210X 297公釐）‘ .* ·~~--- ]i=. m m ft— I— I-I- -- ..... I--I ^u_Bn^ --..I. I (請先閱讀背面之注意事項再填寫本頁)V. Description of the invention (3) On the metal layer; a barrier layer formed on the first dielectric layer for use as an electrode during electroplating; a high-ferromagnetic material layer formed on the micro-electroplating technology using On the barrier layer; a reflective layer, which is formed on the high: a second dielectric layer on the magnetic material layer, which is formed on the reflective layer; 5 a second metal layer, which is formed on the On the second dielectric layer; a third dielectric layer, which is formed on the third metal layer; and a protective layer, which covers the third dielectric layer and protects the integrated circuit from external Damage; With the above structure, a high-permeability ytterbium ferromagnetic material is constructed inside the center of the micro-inductor, on the one hand, the Q value and the magnetic permeability coefficient of the micro-inductance are increased, and the metal wire is wound into a closed spiral The tube or solenoid ring reduces the loss of magnetic leakage on the substrate, on the other hand, it also reduces the required area, and achieves the purpose of reducing the size of the integrated circuit. Β The technology, means and effects used in the present invention are a better implementation. Examples and detailed illustrations with drawings Belief can be learned deeply and concretely. Brief description of the drawings: The first diagram is a conventional schematic diagram of a planar micro-inductor; the second diagram is a conventional schematic diagram of a three-dimensional micro-inductance; and the third to seventh diagrams are a preferred embodiment of the present invention. A schematic cross-sectional view of the manufacturing process; a third schematic view of a basic structure of the present invention is shown in the third figure; a fourth preferred embodiment of the present invention is etched by lithography and dry etching to form a contact window and wet etching is used to etch Schematic cross-sectional view of the process of removing the reflective layer; please read and read the note of ιδ before loading 10 20 Page 6 This paper is suitable for Sichuan National Standard (CNS) A4 specification (210X297 mm) Order A7 B7 V. Description of the invention (4) The fifth diagram shows a preferred embodiment of the present invention. After the wet etching technique is used to etch away the second metal layer to form a tunnel, a cross-sectional schematic diagram of the process is shown in FIG. The preferred embodiment is a schematic cross-sectional view of the process of growing a high-ferromagnetic material (nickel-iron) in a micro-tunnel after being electroplated by micro-plating technology for 5 times. The seventh diagram is a structural cross-section of a micro-inductor according to a preferred embodiment of the present invention. The plan view is intended; and FIG. 8 is a schematic diagram of a three-dimensional micro-inductor structure of a comparative embodiment of the present invention. Reference numbers in the drawings: 3 micro-inductance 31 substrate 32 insulation layer 15 33 first metal layer 33Ί '38Ί wire 34 first dielectric layer 35 barrier layer 36 second metal layer 2037 second dielectric layer 38th Tri-metal layer 39 Third dielectric layer 41 Protective layer 43 Retro-reflective layer Page 7 (Read the note on the back ^ item 苒 fill in this \ *) 'Package. The size of the paper is suitable for the China National Standards (CNS) M size (210X 297 mm) *. · · · &Quot; -Ministry Central 榀 4,-^ h τ > ί7ί Printed by cooperating woman A7 ~ _ B7 ——— 丨 11 I '1 " —--- — — _ _ 5. Description of the invention (5) 44 Micro-tunnel 45 High-ferromagnetic material layer 51 Contact window 61 Wiring 5 62 Spiral coil Firstly, please refer to the third and eighth series, which is a scraping of a preferred embodiment of the present invention A schematic diagram of the surface structure. As shown in the figure, a micro-inductor 3 shown in this embodiment. The inductive substrate 30 of the micro-inductor 3 is of the CMOS type in the preferred embodiment, and includes a substrate 31. An insulating layer 10, a first metal layer 33, a first dielectric layer 34, a barrier layer 35, and a second metal layer 36 are sequentially formed on the substrate 31. A reflective layer 43, a second dielectric layer 37, a third metal layer 38, a third dielectric layer 39, and a protective layer 41. The insulating layer 32 may be silicon dioxide (si 〇2), the first metal layer 33 series may be aluminum-silicon-copper alloy (Al-Si-Cu Alloy), and the first dielectric layer 3, 4 series may be silicon dioxide (with 〇2) ′ The barrier layer 35 includes titanium nitride and the metal layer 36, which may be A1-Si-Cu Alloy, and the reflective layer 43 may be titanium nitride (TiN). The second dielectric layer 37 may be silicon dioxide (SiO2). The third metal layer 38 may be Ai-si-Cu Alloy, and the third dielectric layer 39 may be Is silicon dioxide (SiO2), and the protective layer 41 can be silicon nitride (SiN); the manufacturing method & contains the following steps: Please refer to the fourth figure, which is the first embodiment of the present invention. The preferred embodiment is etched by lithography and dry etching technology to form a schematic cross-section of the contact window and the reflective layer of the shoe. First, step a. Use lithography and dry etching. Brother China National Standard (CNS) A4 Regulation (210X 297 mm) '. * · ~~ ---] i =. Mm ft— I— II--..... I--I ^ u_Bn ^-.. I. I (Please (Read the notes on the back before filling out this page)
、1T 線- A7 ~------------------- B7 五、發明説明（6 ) ' ' —---*-- 技術’依序地在該微電感3上姓絲護層41，第三介電層 39,第三金屬層38以及第二介電層37，形成接觸窗口 w ，該钮刻技術使用-反應式離子姓刻法（_係為一乾姓刻 法，亦可使用-磁場增強式活性離子式電浆姓刻技術_即 5 ;業者為了需要而大量生產上述半成品時，為了保護該接 觸窗口 51不受外來物質影響而產生化學變化，通常會沉積 一二氧化矽（圖上未示）於該接觸窗口 51中，當欲進行後 加工程序時，再將該接觸窗口 51的二氧化矽蝕除即可；接 著，再形成接觸窗口 51後’步驟b.利用濕蝕刻技術經由 10該接觸窗口 51蝕去接觸窗口 51處之反反光層43 ;該濕蝕 刻技術所使用之溶液為濃度約為31%雙氧水（I%)，實 施時，將浸有電感基材30之雙氧水溶液加熱至一定溫度將 電感基材30浸泡3至4分鐘，於本較佳實施例中，雙氧水 溶液可加熱至l〇(TC，其後將電感基材30取出，此時該接 15觸窗口 51之反反光層43已去除。 請續參閱第五圖所示係本發明一較佳實施例經濕蝕刻 技術蝕刻後’蝕去第二金屬層形成一微隧道之製程剖面示 意圖，步驟c.利用濕蝕刻技術經由上述接觸窗口 51蝕去該 第二金屬層36以形成一微隧道44，該濕蝕刻技術係使用磷 2〇 酸（h3po4)，醋酸（ch3cooh)，硝酸（hno3)，以及雙氧水（H202) 等之化學混合溶液，其中，該化學混合溶液中磷酸（Η3Ρ04)， 醋酸（CH3C00H)，硝酸（ΗΝ03)，以及雙氧水（H202)之濃度係各 約為85%，98%，70%，以及100%，而其溶液體積比係約為3000 毫升：400毫升：115毫升：200毫升。 第9頁 本紙張尺度適州中國國家標準（CNS ) A4規格（210/29?公釐） (諳先閱讀背面之注意事項再填窝本頁) 訂 線 A7 B7 鳑穿-部中夹榀消费合作妇印袈 五、發明説明（7 ) 接著，請參閱第六圖所示係本發明一較佳實施例經微 電鑛技術電鑛後，成長一高鐵磁性材料（錄_鐵）於微随道 内之製程剖面示意圖，步驟d.以該阻障層35氮化鈦及鈦為 電極之陰極待鍵區，並在電鑛液中加一電場進行微電鑛作 業’驅使金屬離子向陰極阻障層35方向移動，當金属離子 在陰極接受電子後，便以金屬原子的形態沉積在陰極待鍍 區上，而成長一高鐵磁性材料45於上述微隧道44中，該高 鐵磁性材料45係可為一鎳（Ni)-20%鐵（Fe)合金，而該電鍍液 配方主要成份係由胺基確酸鎳、胺基績酸亞鐵構成，以檸 檬酸為亞鐵離子的安定劑，删酸為酸驗值之緩衝劑；如此， 經由步驟d完成將該高鐵磁性材料45置入於該微電.感3之中 心内側之製程作業。 續請參閱第七圖所示’係本發明一較佳實施例微電感 的構造剖面示意圖’藉由上述製造方法所完成的該微電感 3之構造’係包含有基底31 ;絕緣層32，係為一二氧化石夕 形成於該基底31上；第一金屬層33，係為一銘-梦-銅合 金形成於該絕緣層32上；第一介電層34,係為一二氧化 矽形成於該第一金屬層33上；阻障層35,係為一氮化欽 及鈦，形成於該第一介電層34上；高鐵磁性材料層45， 為一錄（Ni)-20%鐵（Fe)之錄鐵合金，係以該阻障層35為電 極，利用一微電鍍技術而形成於該阻障層35上；反反光層 43，係為一氮化鈦形成於該高鐵磁性材料層45上；第二介 電層37，係為一二氧化矽形成於該反反光層43上；第三 金屬層38，係為一鋁-矽-銅合金形成於該第二介電層 第10頁 5 10 15 20 本紙張尺度速用中國國家標率（CNS ) A4規格（210X 297公釐）* __ - · .---------__ (請先閱讀背面之注意事項再填寫本頁) ,1Τ A7 B7 五、發明説明（8 ) 上；第三介電層39,係為一二氧化矽形成於該第三金屬層 38上；以及保護層41，係為一氮化矽覆蓋於該第三介電層 39上，以保護積體電路不受空氣的潮解或氧化。 (讀先閱讀背面之注意事項再填寫本頁) ”裝.、 1T line-A7 ~ ------------------- B7 V. Description of the invention (6) '' ----- *-Technology ' The wire protection layer 41, the third dielectric layer 39, the third metal layer 38, and the second dielectric layer 37 on the inductor 3 form a contact window w. This button engraving technique uses a reactive ion engraving method (_ 系 为As long as the method of engraving is used, magnetic field-enhanced active ion plasma engraving technology can be used, that is, 5; when the manufacturer mass-produces the semi-finished product as needed, in order to protect the contact window 51 from foreign substances and cause chemical changes, Generally, a silicon dioxide (not shown) is deposited in the contact window 51. When a post-processing procedure is to be performed, the silicon dioxide of the contact window 51 can be etched away; then, the contact window 51 is formed again. After step 'b. Use a wet etching technique to etch away the reflective layer 43 at the contact window 51 via 10 the contact window 51; the solution used in the wet etching technique is a concentration of about 31% hydrogen peroxide (I%). The hydrogen peroxide solution impregnated with the inductor substrate 30 is heated to a certain temperature, and the inductor substrate 30 is immersed for 3 to 4 minutes. In the example, the hydrogen peroxide solution can be heated to 10 ° C, and then the inductor substrate 30 is taken out. At this time, the reflective layer 43 of the contact window 15 is removed. Please refer to FIG. The preferred embodiment is a schematic cross-sectional view of the process of 'etching away the second metal layer to form a micro-tunnel after being etched by wet etching technology, step c. Using wet etching technology to etch away the second metal layer 36 through the contact window 51 to form a micro Tunnel 44. The wet etching technique uses a chemically mixed solution of phosphoric acid (h3po4), acetic acid (ch3cooh), nitric acid (hno3), and hydrogen peroxide (H202). Among them, phosphoric acid (Η3Ρ04) in the chemically mixed solution, The concentrations of acetic acid (CH3C00H), nitric acid (ΗΝ03), and hydrogen peroxide (H202) are each about 85%, 98%, 70%, and 100%, and the solution volume ratios are about 3000 ml: 400 ml: 115 ml : 200 ml. Page 9 This paper is the size of the Chinese Standard (CNS) A4 (210/29? Mm) of Shizhou (read the precautions on the back before filling this page) Threading A7 B7 Chinese and Japanese consumers' cooperation cooperation 7) Next, please refer to the sixth diagram showing a preferred embodiment of the present invention after the micro-electric ore technology power ore, grow a high-ferromagnetic material (record _ iron) in the micro-channel track process schematic diagram, step d. The barrier layer 35 is made of titanium nitride and titanium as the electrode to be bonded to the cathode, and an electric field is applied to the electric ore liquid to perform micro-electric ore operation 'to drive the metal ions to move toward the cathode barrier layer 35. After the cathode receives the electrons, it is deposited in the form of metal atoms on the area to be plated, and a high-ferromagnetic material 45 is grown in the above-mentioned micro-tunnel 44. The high-ferromagnetic material 45 can be a nickel (Ni) -20% iron. (Fe) alloy, and the main composition of the plating solution is composed of nickel amino acid, ferrous amino acid, citric acid as a stabilizer of ferrous ion, and acid as a buffer for acid test value; so , The process of placing the high-ferromagnetic material 45 inside the center of the microelectronics 3 is completed through step d. Continuing, please refer to the “Section Schematic of the structure of a micro-inductor of a preferred embodiment of the present invention” shown in the seventh figure. The structure of the micro-inductor 3 completed by the above manufacturing method includes a substrate 31; an insulating layer 32, It is formed on the substrate 31 as a silica. The first metal layer 33 is formed on the insulating layer 32 as a Ming-Dream-copper alloy. The first dielectric layer 34 is formed as a silicon dioxide. On the first metal layer 33; the barrier layer 35, which is a nitride of titanium and titanium, is formed on the first dielectric layer 34; the high-ferromagnetic material layer 45, which is a (Ni) -20% iron The iron alloy of (Fe) uses the barrier layer 35 as an electrode and is formed on the barrier layer 35 by using a micro-electroplating technology. The reflective layer 43 is formed of a titanium nitride on the high-ferromagnetic material layer. 45; the second dielectric layer 37 is formed of silicon dioxide on the reflective layer 43; the third metal layer 38 is formed of an aluminum-silicon-copper alloy on the tenth of the second dielectric layer Page 5 10 15 20 This paper is based on China National Standards (CNS) A4 specifications (210X 297 mm) * __-· .---------__ (Please read the back first Note this page again), 1T A7 B7 V. Description of the invention (8); the third dielectric layer 39 is formed of silicon dioxide on the third metal layer 38; and the protective layer 41 is A silicon nitride layer covers the third dielectric layer 39 to protect the integrated circuit from air deliquescence or oxidation. (Read the precautions on the back before filling this page) "
,1T 經浐部中夾^if^h-T消贽合作社印欠 第11頁 本紙張尺度適扣中國國家標準（CNS ) A4規格（210X W7公釐）* ·, 1T In the Ministry of Economic Affairs ^ if ^ h-T Consumption of Printing Cooperatives Page 11 This paper size is deducted from Chinese National Standard (CNS) A4 (210X W7 mm) * ·