TW382819B - Nanoscale mott-transition molecular field effect transistor - Google Patents

Abstract

There is disclosed the use of the Mott transition to effect a metal-insulator transition in the form of a practical three-terminal device with the function of a field effect transistor. The device uses as the conducting channel an array of molecules, in which charge carriers (holes or electrons) are strongly corre-lated. The Mott transition determines metal-insulator switching and has been shown to be controlled by an external gale electrode. Otherwise, the device appears to have electrical characteristics comparable with conventional silicon-based FETs. The 'ON' state has a typical conductance of about 10 e2/h. The device performance, in terms of 'ON' conductance and breakdown voltage of the 'OFF' state, are satisfactory in the circuit context. The device can be built down to smaller dimensions, about one order of magnitude smaller linear dimension, than the conventional FET. The device can be manufactured using self-assembly technology, enabling the key step of rnultilayer structures. Thus, large numbers of transistors per chip can be assembled without the require-ment of an extremely small design rule. This is facilitated by the low voltage and power requirements of the device. Hence the Molt transition field effect transistor (MTFET) is expected offer solutions to the problems arising when existing silicon technology is scaled to extremely high transistor densities.

Description

Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. 5. Description of Invention (1) This patent application is a continuation of part of Patent Application No. 08 / 652,286 filed on May 22, 2006. BACKGROUND OF THE INVENTION The generality of the invention disclosed in this case is related to semiconductor switches, especially field-effect 4a 3 'beans, and more specifically to a novel nanometer-level switch, which is based on a special Mott metal-insulator transfer of monolayer or multilayer films of designed bistable molecules. Background Existing computer circuits, logic and dynamic random access memory (Dram) are mainly 疋% efficiency transistor (F E T) switches. The number of transistors per chip on the market is an exponential increasing function of time (Moore's Law). Therefore, according to Moore's Law, the number of storage bits per DRAM chip is also exponentially increasing. Moore's Law has many expressions. For example, the density of transistors increases 10 times every 5 years, the calculation time decreases 6 times every 8 years, and the calculation cost increases 10 times every 8 years. The main reason for Moore's Law is to set the measure to decrease exponentially over time. The reduction in design metrics ultimately seems to conflict with the inherent physical limitations of silicon technology. In terms of technology, the most important physical property of silicon, compared to materials, is that the second physical property is greatly reduced in the importance of a small measure: the long free carrier average travel, and the ability to hold impurities, because the former becomes equivalent The device size is equal to or greater than the device size, and the impurity interval is also equal to or greater than the device size. So far, the number of 40 nanometers and the minimum channel length have been demonstrated in the laboratory and are believed to be close to the achievable minimum. Channel length. Therefore, when the design measure approaches the limit of 40 nanometers, and this is expected to occur in the future 10-20 years, then • 4- CNS) (210x77? ^^ -------- --------- install ------ order -------- line-(Please read the > i_notes on the back first and fill in this page) V. Description of the invention ( 2) New technology is required. At the same time, when these advantages of silicon are gradually disappearing, a disadvantage, which is limited by the two-dimensional t circuit array, is making high costs unavoidable, because the memory capacity I Moore's law also means design measurement. Moore ’s Law, and therefore the Moore ’s Law of the cost of corpse costs. A technology that can achieve multi-general construction and ^ like Meng Jing 1] technology is limited to two-dimensional, will make Capricorn ’s law for every chip The effect of the number of transistors is decoupled from the design metric to overcome this driving force of investment cost. Under these considerations, the physical properties seem to tend to choose a system with a shorter mean free path and a higher carrier concentration, that is, Metal, then: the problem of switching the genus becomes an issue. The invention disclosed in this case proposes a process of building a precision There is a solution with a high load concentration of three terminal devices to solve this problem, and when the three terminal devices are in the state of 0N, it is a metal. The switching of the device is through a related electronic system of Mott metal- This is achieved by the concept of insulator transfer. At the same time, by extending the now fairly standard self-flocculation concept, the structure produced has a certain degree of three-dimensionality that seems to be 'fatal'. The device appears to be compatible with existing FET-type circuits. Predicting electrical characteristics' that is, zero static gate current, high, 0FF, impedance, and low, 0N | quaternary antibodies.… These characteristics are printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs, and most importantly Its functional feasibility in a very small size makes the proposed device one of the possible solutions to some basic problems, and the electronics industry is expected to encounter these basic problems in the next 10-20 years. Brief description of the drawings 1A is a three-layer single-chromophore single-layer Mott transfer paper with a single gate. The scale of this paper is in the state of Shizhou, China Standard (CNS) 8-4 specifications (2 丨 0 乂 2 (; 7 public places). ΓΓ Description (Side view of a field effect transistor. Figure ⑺ is a schematic diagram of a three-terminal single-color 圑 single-layer% efficiency transistor with dual gates. ^ ^ Figure 2 is a two-gate with a single gate Di Liu Gu & m _ * First, a schematic diagram of the side view of a multi-layer Mott transfer transistor (FET) with early chromophore. Figure 3 is a dual-gate four-terminal dual-color Mott single-layer Mott Schematic diagram of the transfer of positive views. Fig. 4 shows the energy diagram of the device shown in Fig. I. In particular, Fig. 4 shows the steady-state molecular energy level of the p-type standing mode fear device. _ 土 # 囷 4 B 展Steady-state molecular energy levels of non-n-enhanced hibinron devices; and Figure 4. Energy changes of the molecular energy levels of the p-type device along the channel under / and _ source bias It is considered as the calculation of the infinite. And the channel is viewed as a tank. Figure 5 is shown by a continuous layer of capacitance—the eighth in the array—where the solid line is for a single closed pole case (both dielectrics; two: two ε), and the dotted line is For the case of double gates. . χ Figure 6 shows the graph of the potential distribution sub-distribution (dotted line) along the source-drain channel, and in the case of Figure 5, R ν 疋 for the drain pole V to the weak bias two / stop Γ1 · 5 Volts 0 7 V :: 'and V-UV, VDS-two and: the width of the clamping zone of 2 nm is nearly infinite. Fig. 7 shows the current Ids and the sum of the poles, corresponding to the gate voltage corresponding to the relationship using the equation (determined by: Vds and V). ) The size of each paper that has been extremely contaminated by the source of 斤 ⑽㈣ m⑽㈣ (2; 〇χ2 (π 公 犮 --------—— 装-f) Please read the note on the back _ Fill out this page} .ί ---- 线 ---- Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Lithology 5. Description of the invention (4) ~~~~~ Figure 8 shows the potential distribution of the channel at the gate The voltage VG = iv and the carrier and degree are below zero, where the channel length is assumed to be L = 100 nanometers, and the width of the spacer layer is dDX = 20 Angstroms (A) 'Figure 9 is (ye / d) A phase diagram relative to VG / VT, and the phase diagram shows the " OFF " edge region of molecular reed, where d is the distance between the molecular layer and the gate. Figure 10 is the device of the present invention A schematic cross-sectional view of a stacked array. Figure 11 is a schematic diagram of a prototype Mott transfer field effect transistor. Figure 12 shows the performance characteristics of a prototype Mott transfer field effect transistor. Detailed description of the invention In some types of conductors, conduction Bands are formed using well-defined atomic or molecular orbitals. In cuprate superconductors, this role is performed by the dx2 _y 2 symmetry of the copper position. One example κη c 6., the lowest triplet set of Cw degradation of unprotected occupied molecular orbital (LUMO) as similar to the role. Describe the simplest model of such materials is J. Hubbard in Proc.

The Hubbard model described by Roy. Sci. (London) A276, 238 (1963), A277, 237 (1963), A281, 401 (1963), and these papers are mentioned here for reference. In an essentially orderly system, such as a copper dioxide plane of copper salts, we have found that there are at least two possible general states of the system, insulators and metals. These states are separated by Mott transitions, which are described in a book by N. Mott: Metal-Insulator Transition, Taylor & Francis, London, 1 990, and the book is mentioned for reference . If there is exactly one electron at each copper position (filling factor η = 1), these electrons can be confined to these copper positions, causing insulation performance. This limitation is applicable to the Chinese paper standard (CNS) / \ 4 present grid (210 X 297a) --------- t ------ '玎 ----.— i (Read the first reading on the back of "" 意 事 #Fill in this page") 5. Description of the invention printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs (5) It is mainly due to the strong Coulomb repulsion of the two electronics rooms located in the same orbit. . Starting from the configuration with one electron at each position, the single-jump process involves an energy loss u, and an electron is transferred to an adjacent position during the jump. Therefore, the electrons are effectively confined to the potential well with a depth of U, which limits the electrons. This type of insulator is called a Mott insulator. It is not an insulator in terms of a band structure because it actually has a conduction band half filled, but it is an insulator in terms of interaction u and because of its special filling factor of 1. It should be clear that limiting to temperatures above U tends to collapse. In addition, U usually needs to be greater than the jump constant t, and t is a matrix element used to transfer a single electron to the nearest neighboring position (there is an exception to this simple two-dimensional square lattice, where this inequality involves the way to the next A nearest neighbor matrix element). If the occupancy situation deviates significantly from half to be filled, n = 1 soil d, where d is greater than about 0.1-0.15, based on the data from the copper salt, a solution to the limitation 'metal state will appear, Even under U is big. In the insulation state, under U is very large, there is a gap of the order of magnitude in the energy spectrum (a gap between 'High 1 and, Low' Hubble band). In the ON state, there is no gap 'as in metal. Because the conduction state is a positive metal, the conductance will not fall to the minimum metal conductance in the two-dimensional system, below, and the small metal conductance is taken as e2 / h. This number corresponds to a two-dimensional surface resistance of the order of 20 kiloohms. , The structure can be manufactured to have three terminals, and the three terminals are represented by the source, and ground, and the gate, respectively, and include a channel connecting the source and the drain, so that the material constituting the channel is in Mott insulation State or metal conductive wood paper scale border state 屮 country country 榡 Apple (CNS) Λ4 specification (211), binding -----.-- 'line! r (please read the note on the back of the page # -fill this page first) ΙΓ 5. Description of the invention u)… a — complaints, depending on the voltage at the terminal of the pole. Therefore, whether there is a conduction path between the gate control source and the terminal of the gate, so that the device becomes a gate control device. In the first example, the single-chromophore single-layer configuration-enhanced mode, the channel is manufactured using a single layer of a knife, and the molecular single layer is located in the yz plane. The molecules M constituting this monolayer contain redox cores (also called chromophores or cofactors), and these redox cores contain—unstable electrons (or holes). More specifically, the redox core is characterized by having at least one active member ′ and the at least one active member participates in these electronic processes (ie, Mott insulators • metal transitions and flow flow). A simple diagram of the single gate type of the terminal device of the Central Bureau of Standards and Consumers ’Cooperatives in Changsha is shown in Figure 1A, and the diagram shows the basic components of the second terminal device. The first is to turn on the channel, and the channel 10 contains a 2-dimensional array divided by 12 and these molecules must be strongly related to the electronic system, which means that the parameter U has a large value. The channel contacts the source 4 and drain 6 on the left and right sides thereof, respectively. The metal gate 20 is separated from the molecular layer or the channel 10 by an insulating spacer layer or a gate insulating layer i 8. Suitable materials for the spacer layer 18 include oxides, such as $ ^ τj03 and Ba! _XSrxTi03. The basic device parameters are channel length [and width evaluation, spacer layer thickness dQX, molecular radius RmcI, molecular interval A ·! In the plane, the dielectric force #number of the spacer layer ε αχ, and the dielectric constant of the filler and the layer itself ( Both of the foregoing are set to ε), the energy of the molecule relative to the source / drain Fermi level £, the distance perpendicular to the channel 10 is defined as the χ direction (from the channel to the gate), and the distance parallel to the channel 10 Is defined as the y direction (from the source to the drain), and the Z direction is the direction within the channel (that is, the direction into the plane of FIG. 1A). This paper size is suitable for 々SK standard (CNS) μ specifications (2 丨 public). 5. Description of the invention (7) The child clothes can also have a double gate configuration, as shown in Figure 1B, where false ° The same material is used for the insulator on the channel I side, and the dielectric constant of the material is ε. The symbol d is used to indicate the thickness of the insulator, and the thickness is measured from the center of the channel layer. The material of the insulator can be inorganic or organic. However, the single gate type is more compatible with the oxidation technology (, field oxide ') of the spacer layer. Although not necessary, the insulating layers 18 and 18 'of the double-gate configuration may be different materials' and these materials include organics such as polyimide. Arrays (synonyms such as channels and molecular layers can be used) can be in a conducting or insulating state * depending on the availability of mobile charges (carriers). Applying a potential to the closed pole tends to attract carriers of opposite polarity into the channel. The carrier method and degree of the channel depend on the balance between the gate potential and the electrostatic repulsive force between the carriers. The relationship between the carrier concentration and the gate voltage VG will be derived below. In the enhanced modal device, the molecular energy level keeps them in equilibrium with the source and the drain without a gate voltage, and each molecule has an odd number of electrons. In this state of charge, electrons in this layer are limited due to Mott transfer; (assuming the conditions for the jump constant t and temperature T are met). As far as the conduction between source and non-electrode is concerned, the device is in a state of 0 F F. Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs If a voltage is now applied to the single (or double) gate, the voltage will induce a charge of opposite polarity at this layer. If the polarity is a proper polarity and exceeds a threshold (usually 0-1_0 5 electrons or holes per molecule), the molecular layer will switch to the on state, and the device is now in the 10N, state . One of the characteristics of adding a modal device, ON, is that it is on the edge of the second channel. -10- This paper standard applies to the Shan Guoguo benzene standard (CRsT ^ j ^ T (21Dx 297)) ----- Λ Λ Economy Employees' Cooperatives of the Ministry of Standards and Technology of the People's Republic of China Seal 5. Coincident with the invention (8) There is a short (one or a few molecular width) non-conducting area. Carriers must tunnel through these marginal areas. The device can be manufactured using the two forms To switch to a 1 〇N state by a positive or negative voltage, according to whether the carriers are electron or hole type. This form is similar to η or p-type channel MOS device and can be similar The second example of a device is a single-chromophore single-layer configuration-depletion mode, similar to a depletion mode semiconductor FET. The molecular characteristics of the device make The electron configuration with an odd number of electrons under no gate voltage is unstable, but the plutonium molecular layer is ionized to produce a carrier concentration on the order of 0-1_15 holes (p-type) or electron ^ -type. The device is then in the ON state. Applying a proper sign (P type uses a positive voltage and η type uses a negative voltage) and a gate voltage of the magnitude can then remove the intrinsic carrier concentration, and the layer returns to the Mott insulation 1 0 FF 'state, and each Molecules have an odd number of electrons. Therefore, this device is inherently at ON, and requires a gate voltage to switch to 'OFF', similar to a depletion mode FET. Depletion mode devices are not compatible with C M 0S, but are compatible with various 0 RAM memory cell circuits. One possible technical advantage of a depletion mode device is that when it is in the 0N state, there is no insulation region on the edge of the conducting channel. In contrast, when it is in the state of 0 F ρ1, there is a conduction region at the edge of the channel, and the conduction region has no physical influence except shortening the channel. The third example, a single-shot multi-layer configuration—only added modalities are shown in Figure 2. The channel can contain crystalline or amorphous multi-layer molecular assemblies, rather than monophonic. In this enhanced modal device, the gate voltage will be induced on the surface of the molecular solid. -11-i Paper size is applicable to Chinese National Standard (CNS) Λ4 now) ------ --------- t ------ IT--Γ ----- i (Please read the precautions on the back before filling in this page) Λ 'ΙΓ Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (9) _ '—- " Broad-conduction is wide, and the width of the conductive layer is on the order of a single layer. Therefore, this conduction channel is quite similar to the conduction channel formed in the single-layer case. Regarding the breakdown voltage, that is, the voltage required to switch from 0FF to _state, '0N, conductance, whether in the linear or non-linear region, the width of the insulation region at the edge of the channel, and the width across this edge The detailed results of the tunnel penetration rate of the zone should be similar to the detailed results of a single-layer increase mode device. 7 Multi-layer depletion mode = device cannot be achieved, because all layers of a multilayer conductor cannot usually be switched to an insulated state. However, if, for example, the interface layer (the layer adjacent to the insulating spacer layer 18) is in a conducting state due to the manufacturing process, and the main body layer (the layers below the layer adjacent to the insulating spacer layer 18) is in an insulated state, then The device will be a multilayer depletion mode device. The fourth example, a single layer configuration of multiple chromophores-enhanced mode, advantageously uses molecules with two or more chromophores or redox cores. This polychromophore device is shown in Figure 3 as a dual chromophore or two-component molecule. This multi-chromophore device is a four-terminal device by itself and has two independent gate voltages. In short ', this dual-color circular device operates as follows. The two chromophores that make up the molecule form a redox pair. The simplest assumption is that the molecule, called v, has an energy level _ ε 丨 relative to the source-drain Fermi level, and the other element, called C, has an energy level ε i. If the two gate voltages are connected together (common gate modal operation_common in dual gate devices), this device operates in a manner similar to the single-shot color circle mtfer operation foot. The gate voltage of ε l / e or _ε 〖/ 6 will make the molecular layer reach the threshold 値 for obtaining n-type or P-type carriers, respectively. The closed-circuit voltage required to reach the threshold of each molecule's conductance is determined by c — -12 — The paper size is appropriate / fp !, National Standard (CNS) Λ4 ^ _Grid (21 〇x2y7 public address (please read the sobbing matter first and fill out this outfit--

.1T line 丨 V. Description of the invention (10) The calculation is like the case of a single chromophore. But 'for the operation of the differential mode, when the second gate is opposite to the source and the; and the poles (considered to be at the same zero voltage) are at opposite polarities, the C redox core is pushed up in energy, And pushing down the V-redox core's polarity will make this layer insulating. However, at the threshold of the integration voltage that usually pushes the C and V energy levels towards each other's threshold 値, it will start to inject n-type carriers from ν to the C core, and inject p-type carriers from c to V core. Once again the conductance threshold is controlled by capacitance considerations. This dual chromophore device has a richer phase space to control it, ΝΝ, and 〇 F F1 states-the main potential advantage is that in the differential mode, CMOS circuits can only be connected by these The gate modal is realized; no separate η-type and ρ-type devices are needed. The molecule M can have many types and have various chemical properties. In the simplest form, they are positive molecules, such as the Heme family (eg, F e switching between F e 2+ and F e3 + states). More complex molecules include charged complexes, such as (X + TCNQ-), where X is an alkali metal, and TCNQ is an organic tetracyano-p-pyrene dimethane, where TCNQ is switched by hole injection Active component between TCN Q- and TCNQ). More broadly, the complex used to enhance the modal device can include. Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 1) Hole-type system X + Α ·, where A is an organic receptor (of which TCNq and C60 Is an example) and X is an alkali metal; 2) an electronic system D + Y ·, where D is an organic donor (eg, TTF of tetrathiafulvalene), and Y is a halogen; and 3) hole Or electronic system E) + A-, where D is an organic donor (for example, double-13) This paper size applies Chinese financial standards (⑽) Λ4 present grid (2 丨 common) — Central Bureau of Standards, Ministry of Economic Affairs K Printed by the Industrial and Consumer Cooperatives --------_______ ίΓ V. Description of the Invention ㈠) •…… -BEDT_TTF of Ethylene Disulfide and N, NN ,, N ,,-Tetramethylamidine_p TMPD) of amines, and A is an organic acceptor (such as TCNQ) a / For any known reason, it is necessary to exclude conductive polymers as useful materials for molecule M. To further illustrate the device of the present invention, consider the p-type enhanced modal of Figure i A. In the absence of a gate voltage, the molecules of the layer 0 are in a Mott insulation state. In such a P-type enhanced modal device, if a sufficient negative voltage is applied to the = pole, the molecules will be positively charged and switch from the Mott insulator to a metallic state, and therefore allow a gap between the source and the drain. Continuity. In such a device, a suitable material for layer 10 includes a metal transfer charge transfer complex between TCNQ. If, on the other hand, the device of FIG. 1A enhances the modal device, the molecules of layer 10 are also in the Mott insulation state without a gate voltage. Now, if a sufficient positive voltage is applied to the gate, the molecules will be negatively charged and switched from the Mott insulator to the metallic state, thus allowing full conduction between the source and the drain. In such devices, suitable materials for layer 10 include a charge transfer complex between TTF and a halogen. Now, if the device of Fig. 8 is a 卩 -type depletion mode device, the molecules of layer 10 are also in a metal conduction state under the helmet interrogation voltage, and if a sufficient positive voltage is applied to the interelectrode, the molecules It will be positively charged and switched to the insulated state. The following situations will be used to clarify the characteristics of this original device, in which the device is in the state of 0FF, without an applied voltage, and in which the holes, but not the electrons, are on (ie, 0N, state) Charged carrier. The characteristics of this device in the insulated and conductive state, as well as to allow lightning carriers to be subjected to externally charged electricity -14- This paper rule / 1 suitable financial coffee conversion standard (CNS) Λ4ίΐ ^ ΤΤΐ〇 × 297

--J (Please read the precautions on the back before filling in this page-Binding · Binding H 'V. Description of the invention (12) The adjustment mechanism of the printing pressure of the Zhengong Consumer Cooperative of the Central Government Bureau of the Ministry of Economic Affairs will be subject to Explanation. The metal-insulator transfer of this device allows switching between the 'ON1' and 'OFF' states. To show the device first, the OFF1 state is in the Mott insulation state, and the device is designed to be under steady state Each position of the array has one electron on average, assuming that the following Equation 1 is satisfied. If the kinetic energy is ignored, all electrons occupy a single degraded energy level, and the degraded energy level is defined as the Fermi at the adjacent Fermi sea on the lead. Energy below the energy level, as shown in Figure 4A. Because the electrons in this layer of molecules are strongly related, they will experience strong Coulomb repulsion when they approach each other. In particular, one allows two electrons to be in a single position. The state has a very high energy 11 (1) > " " D, or any other energy measure). Therefore, this state does not actually allow any double occupation, and the electricity of the lead cannot penetrate or Pass through the array. In other words, an energy gap of an order of magnitude u is formed between a state that allows each position to have any dual occupancy (Figure 4 A) ° Under thermal equilibrium, this system continues to be-Mott insulators' only the following The conditions are met:. T < < ε] jl κΒτ «υ… 施加 The applied-inverted-source voltage I cannot easily drive this system to a metallic state. Figure 4 ° shows that under the negative bias SVf V this The electronic energy of the system; the figure should be: the sign of interest is the sign). Indeed, the energy of these array electrons at the negative and pole-source terminals. The change of the electrostatic energy of Figure 4C near the poles follows approximately the following analysis Form ·· E (< 5y) = eV-e (VG- ν) / (2 / η) δν / ύ where V. is the voltage at the pole ... is the distance of the cold pole, and the upper pole (-15-(Please (Read the precautions on the back before filling out this page.)

The paper scale is applicable to the Chinese national standard ((: NS) Λ4 present grid (2 | () y: ',, 淖) Λ Printed gram, invention description (13)… --- Think of the dielectric constant between the half-length sheet) and M-pole (think of an infinitely long sheet)! . The square root particularity of this approximation is clearly seen in Figure 4: the number solution of C. The foregoing calculation assumes that the dielectric constant is 如果 If the dielectric constant ε of the uniform sentence is used, the voltage change within the insulator of FIG. 4C will be reduced by ^ times, and the potential on the electrode surface will rise sharply. This modified image will not change the following discussion. Although the energy level of molecules close to the drain will be increased, under the following conditions: £ I ^ dsI ^ U- ε j (3) (the parameters shown in Figure 4C meet the above conditions), but the array and the drain or source Interelectron transfer does not occur because there is a systematic Hubble barrier. For electrons at the off-energy level, transferring any electrons from the array to the source on the left must start with a dual occupancy state in the middle process, and this requires energy on the order of U. It is also impossible for electrons to pass from the drain tunnel to the affinity level (upper Hubble band) of the array, because the drain Fermi level is still below the upper Hubble band. Therefore, as long as the condition of equation (3) is satisfied, the system will remain an insulator. Using a discontinuous model to replace the continuous model of the layer will not qualitatively change the aforementioned results. By applying a negative voltage between the covering gate and the substrate, once the ionization level (lower Hubble band) shifts above the Fermi level of the lead, the array will tend to switch to a metallic state. Under a given gate voltage, the actual density of available charged carriers in the array is also determined by the Coulomb interactions within the array. Suppose now that the negative gate voltage _ VG, VG > 〇 is applied to the device, and the scale is -16- m scale ((Please read the precautions on the back before filling out this page)) DESCRIPTION OF THE INVENTION The (l4) system continues to be in equilibrium. Once the layer ionization energy level e (VG_ε [) of the zero carrier density of the source-drain Fermi level becomes positive, the electron tendency of the array The injection lead is charged and the layer is positively charged. This charging trend is resisted by the accumulation of electrostatic energy within the layer. The total electrical energy of each molecule can be written as: E〇 = (eVG _ f |) (1 + 62e2 / Cm〇 |, (4) where d is the positive charge per molecule (0 < (J < 1) ,.) is defined by the following equation:

Cm〇i = ^ Vtot (| r0 ~ rj). (5) In (5), vtct is a molecule located at ri for located at r. The total (direct + induced) potential caused by the molecules. The induced potential caused by the molecule located at r0 itself is not included in (5); this. Potential is obtained by ε! Renormalization (this potential makes ε 〖decreased from its gas phase 値), but it is not included in (4 ) Of the second item. Suppose this renormalization effect is defined as 値 1. If the dielectric constants in the second region are equal to ε in the single-gate situation shown in Figure 丨 A, then (5) can be formed

C Printed by the Consumers' Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs m0f Among them: J, the knife layer is defined to be located on the yz plane, and jLRmQl is the radius of the molecules of this layer. Then, the distance between the knife and the molecule is a m. | Much lower than the distance between the molecule and the surface, the Cmuli continuous limit c can be reached. . ". Then, the following standards 1Vi 1,, ⑹ -17- V. Description of the invention (is result: α, r 4_ox + Rm〇 丨), where η is the molecular concentration per unit area ⑺ Equation (6) also It can be used at another limit, in the case of high-dielectric-function oxides, where ε QX > > ε. dQX + Rm (3l is now reduced to the molecular radius Rm., itself, and equation (6) becomes, -1 — 1 yf 1___1_ f i9t〇l ΙΓ〇- ril ΙΓ〇 ~ ri + 2iRmo | l ⑻ Use the following numbers値 Instead of dQX of equation (6), one can obtain an approximate interpolation formula between equation (6) and equation (8): d ^ £ d〇x / £ ox, Η Member of the Central Standards Bureau of the Ministry of Economic Affairs And the approximate interpolation formula is only very accurate in the case of limit 11 „1. 1 > (1 (^), and this formula makes it possible to approximate C m for any 値 of dQX in Figure 1 A. 1 Figure 5 shows the function of 値 of Cmol as a function of d = dox + Rmol or d = Rmol & am (5l ratio 値). When the molecular array is a tightly packed single layer, in the case of equation (8), Ratio 値 d / am. 〖Can be lower than 1/2 to show that cm (3l can be much higher than the continuous limit of equation (7). For the double gate configuration shown in Figure 1B, it is used for each The equation (4) of the total electrostatic energy of the molecule still applies, except that the capacitance of each molecule must now be modified as follows: -18- The paper scale is applicable National Standards (CNS) 8 4 specifications (210X 297H) --------- Gu Yi -------- ΪΤ -----.- i (Please read the note on the back first_ more matters #Fill this page) Five (10) I of the 値 'invention description (16 ° -ΗΣΣι 1— 丨,> opUr〇 ~ ri + i4pdf Also all integers are mirrored by the number of additions. CL is plotted in Figure 5 ^% WL n phase obliquely to minimize the equation ⑷ can produce: ,, __, ⑴) :: is the partial load expression connecting the closed-electrode V 'and each molecule, VT = e 1 ε 1 defines the minimum gate voltage required to charge with a non-zero concentration in the molecular layer. If d = 015, it is considered a typical partial carrier (in copper acid) required to be properly in the N (subordinate) state. Based on the salt data), by using Equation (11) and Figure 5, and Equations (6) _ (10), the required 'ON1 gate voltage for various parameter sets can be determined. 25 electron volts ( e V) of the order of ε i 値 (approximately .10 ΙΒΤ) at the absolute temperature of 3,000 degrees to the reserve. These results for single and double gate configurations are shown in Tables I and II. Table I (distance is in Angstroms ) D Rmol 9 mol ε Art 〇 δ V Sa (V) VG (V) The Ministry of Economic Affairs k 20 5 10 4 20 0.15 0.428 0.678 The standard is 20 5 10 4 100 0.15 0.228 0.478 members X 20 5 15 4 10 0.15 0.271 0.521 Consumption 20 10 20 4 10 0.15 0.214 0.464 Cooperative 20 10 20 4 100 0.15 0.103 0.353 Printed 20 10 30 4 10 0.15 0.080 0.330 -19- This paper size applies the Chinese National Standard (CNS) Λ4 grid (2Ι0 × 21; 7 public筇).--I----I-II > ^ ϋ til--taxi X,: I | >--1-..-Tn ----. —R I · HI i- , ΤΛ ^, (Please read the notes on the back before filling this page) 5. Description of the invention (17 Table 11 (distance is in Angstroms) d ε δ ν_ Vg (V) 20 10 4 0.15 0.488 0.738 20 15 4 0.15 0.187 0.437 20 20 4 0.15 0.085 0.335

These results can be summarized to show that a gate voltage between 0.4 and 0 s can be used for display operation. Assuming U is on the order of 1-2 e V, this range is reasonable because if the gate is driven by a source-drain voltage, then equation (3) is satisfied, and this display is by appropriate design, The proposed device can operate as previously described. For later engineering analysis 'and this analysis relies on continuous processing of the array, the following definitions are introduced for ease of use (n = molecular concentration per unit area of the array), C7T = nC' moi, (12) standard in the Ministry of Economic Affairs Q'h = ne & (13) At the same time it should be noted that the maximum number of holes available is limited to J s 1 ° In other words, for the gate voltage vG s For vT + ne / c, T, the hole density of the array will remain unchanged at η. In order to express this fact more explicitly, V & 疋 escapes to vT + ne / c’T, and equation (11) is rewritten as:

VG ~~ VT -20- ㈣ scale is suitable for Zhongguanjiasu ------------ install -------- order--Γ-> .-- ^ line--(Please read the back first (Notes for refilling this page) (14) Printed by A 'IΓ, Consumer Work Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 5. Description of the Invention (is) — It should be noted that the threshold voltage Vt The hooks are distributed over the wide channel of the device and are deduced. If the device has a -spacer layer, and the inter-h layer has a variable width from source to non-pole in the pass. Then the aforementioned threshold voltage is incorrectly applied. When a finite m source bias is applied, the hole distribution will also change. In this latter case, the situation is further complicated by the existence of a current in the first channel $ channel. At the same time, when the electrostatic type 7F and the formula (4) in this table are written, the edge effect of the array-lead contacts on both sides is ignored, but this will be discussed in detail below. In addition to ignoring edge effects, the effect of the intermolecular jump constant t is also ignored in the aforementioned formula. We expect that t is unlikely to be much larger than about 100OmeV in terms of molecular layer, and the kinetic energy effect (approximately equal to t) is measured in terms of the moon deduction of the table and s is small, and therefore it is a first-order treatment in the Mote transfer F E τ It is acceptable to be ignored. By applying an appropriate gate voltage, the relevant electronic system of the array can be switched from the state of '0 F F' to the state of '0 N' and vice versa. Now consider the current-voltage characteristic curve of a metal state in the presence of a drain-source voltage. _ As far as the linear region is concerned, first consider the situation where the device is at a low drain-source voltage Vds. In this case, the gate-array bias and therefore the charge (hole) distribution is almost uniform from the source 14 to the drain 16 along the entire conduction channel. Equation (1 4) roughly describes the moving charge density of this system. A stable current ′ is pulsated by V D s and flows along y (that is, along the source_dead direction). Therefore, Ohm's law can be written as: * DS = " Y ") C t (VG ~ Vt) VDS · (15) -21-Applicable scale, 17¾ National Standard (CNS) Λ4 ^ lattice (zioxm public 犮) '~~ --- nn —It ml I ί I -I 1----_--n-ί I ...... a aJt--I (Please read the notes on the back before filling this page ) 发明 V. Description of the invention (丨 9) Printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs where “h = er / mh is the hole mobility and is assumed to be constant. Therefore, under a given gate voltage, the channel conductance GL = aiDs / 5VDs 数 $. The dependence of equation (15) on vG is entirely due to changes in the available mobile holes of the array. Now the hole density has an upper limit (one hole at each position), as mentioned in the discussion leading to equation (14) above, and the energy band of the array at this point is empty, and it becomes -traditional (relative) Yumot) insulators. The largest channel conductance therefore occurs between ^ and ㈣. In the non-linear region, if the non-polar source voltage is increased until the comparison: the gate voltage% non-polar source voltage is not negligible, the foregoing analysis is no longer applicable. -Finally infinite pole · source voltage can be used to change the potential distribution along the conduction channel. Because of &, the voltage between the gate and the channel, the spot's actual charge density will be a function of the gy from the source to the potential. The charging potential is increased while actually reducing the available hole density. In order to obtain a quantified image of the current-voltage characteristic curve under any VDS, the + conductor device is widely used in the physical method of the gradual channel approximation method. This approximation assumes that the electric field in the direction of the current is much smaller (and slowly =) the electric field in the vertical queue. In this approximation, the functional relationship between the incremental% voltage drop along the channel and the (steady-state) channel current can be expressed as lDS < 5y = / ihWQ'h (y) 3Vy. (16) where Q, (y) It is the hole density at the position of the channel, and the hole density will change from the source to the non-pole, and once again assume the flat "" h 疋 -constant, and this can be derived from the copper 1 salt data. If the and pole are negatively biased and -22 · This paper size is applicable (CNS) Λ4 ^ 71Ϊ〇7 ^ 7α7Γ (Please read the precautions on the back and fill in this page first). Install-、-& l · 级 ΙΓ V. Description of the invention (20VDS = -V, and 乂 > 0, the hole portion of the asymptotic channel approximation method can be approximated by the equation ("), where: VT is replaced by m as At the position of the channel, the imitation of 俨, and & T〆 varies between (0, V). Then in the channel., The current limit I, and the charge carrier density can be obtained as follows: The total Q h (y) = c't (Vg ~ ντ — vy). (17) Combined with the equation (17) and equation (ls), the uniform current i can be used to calculate the potential of y at any position in the channel. Letter from Factory DS

Vy-(vg-ντ)-/ (VG-νγ) 2 (18) Variations of v and Q along the source-inverted channel under moderate and strong bias are shown in Figure 6 (A) BW . In addition, the current as a function of the travel voltage can also be expressed by extending = the branch path to the entire channel from the source to the pole as follows: I c, t (vg ~ ντ-—- V) V. (19) Economy The printed current 103 printed by the staff of the Ministry of Central Standards Bureau Cooperative Destruction Cooperative is now a non-linear function of the electrodeless-source voltage VDS (= _V). When the electric pole is negatively biased, as the VDS increases, the increase in current will be slower, and eventually at -V D S = V s a t = V G-V T the current will reach the maximum value, and 'sat

T (我) 〇Ά-ντ) 2 (20) As in the case of a traditional MOSFET, and should be easily from equation 07) ^, when the non-pole is biased by -Vsat, the non-pole voltage just offsets the negative open core ^ .23-This paper is punishable by the Chinese National Standard (CNS) A4 «L Grid (2 丨 OX297) --------- Approval ------------ τ--r--. —— '0 (Please read the notes on the back before filling out this page) 5. Explanation of the invention (21 Central Bureau of Standards of the Ministry of Economic Affairs-Industrial and Consumer Cooperative Press 1i) The effect of the pressure on the close-to-extreme related electrons, as a result there is no moving charge ( The hole) becomes available (Q, h (L) = 〇). When the drain is further biased so that | VDy> Vsai, the so-called pinch region can be observed near the drain, where There are no carriers available, as shown in Figure 6B. The current in the channel is maintained by injecting charged carriers along the pinch region, and the pinch region is subjected to a strong electric field. The magnitude of the current is maintained at or slightly below Isat Instead of the decrease as shown in equation (19), due to the negative feedback phenomenon that is well known in the field of silicon MOSFETs, and if the pinch region becomes too wide, then The current will decrease and the pinch region itself will disappear. Figure 7 shows the current-spreading characteristic curves at various gate voltages. In Figure 7, β = 〇] 〇5 (curve from bottom to top) curve current Ids And the voltage Vds are adjusted relative to io ^ Tn ^ VQ and VQ = e / Cm., Respectively, to adjust the size. The voltage of the questionnaire of the enhanced modal device is negative, and when the time from the bottom curve to the top curve moves to the time of the electrode ^^ Will increase; and the gate voltage of the depletion mode device is positive, and the gate voltage will decrease when the bottom curve moves to the top curve. As can be seen from equation (2), the voltage in the saturation region Hole electric households,-11sa ,, the square of the inter-electrode voltage is proportional. When the gate voltage becomes more ^ ', (or VG increases), the drain saturation voltage vsat and the available live load of the channel,' Λ ding "Thinking that VG increases linearly. The transconductance defined by GT = aisat / 3VG is therefore a pole-correspondence 1. gt = " 〇t (vg —ντ)

v (f) l ~ 2 ~), -24. Pull-out staple I H. 'Line {Please read the note on the back first' Note 4-Fill this page} Linearity of voltage (21) (22) This paper is very standard Applicable to China National Standard 隼 (CNS) VIII (4) (23) Λ 'Η — V. Description of the invention (22) where I represents the average free travel of charged carriers, nh = kf2 / 47r is the hole concentration of this layer, And kf is the corresponding wave vector. For a system with I of some order of magnitude of the p-distance between molecules, the transconductance G τ is the order of conductance of many quantums, because the conductance e 2 / h of a quantum corresponds to about 2 6 Thousand ohms resistance 'therefore typical saturation transconductance corresponds to thousands of ohms. When in the linear region and the drain bias is small, please note once again that the transconductance cannot increase without limit as VG increases, because when the carrier When the density j reaches one hole per molecule, the system becomes a traditional band insulator. Therefore, G τ will reach the maximum value in the middle of a certain impurity. & ≪ j 〇 <: 1 will assume the average free path is a number The magnitude of the molecular separation distance, the maximum conductance is the following magnitude: „GTmax2 ^ "! ~ 10) h (2 4) Printed by the Central Ministry of Economic Affairs of the Zhuhai Mining Consumer Cooperative, that is, thousands of ohms. Finally, when a positive bias voltage is applied to the drain (Vds > 〇), it is not expected that the pinch zone will appear, and the The current-voltage curve will have a saturation region under the pole-source bias. However, the electromotive density may approach the limit at the extreme of the channel. When the combined effect of the gate and drain voltage becomes too strong, At this-upper limit, the current decreases rapidly, and the system will eventually become an insulator. ^ V After analyzing the device characteristic curve focusing on the P-type enhanced mode, the analysis of the n-type translation device can be performed in the same way. However, in After the ^ mid-phase car has an Ap device, the energy diagram is reversed. For example, from Figure 4B, the upper Hubble zone now involves metal-insulator switching, and the presence of this strong mode is seen in%. -------- I ------ ΪΤ--r-,---(Please read the notes on the back before filling out this page) -25-This paper is applicable in the standard _ house standard隼 （CNS） Λ4 is present (210X297.:,,- ^; printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs, printed on paper ϋNational standard (c, NiS) 6 4 grid (21〇x2y7 common conversion) Λ * " ίΓ ~ ^ 111 ~ " ™ · ·-·-—— V. Description of the invention (23) 'instead of electricity The hole becomes a charged carrier. Similarly, the device is in the 10 FF 'state under zero gate voltage, and when a sufficiently large positive closed-pole voltage is applied, the device switches to the ΌN' state. It can conduct under low VDS, and the vG bias channel becomes a metal region. The tunnel penetration through the edge can limit the conductivity of the entire device, and the edge can be non-conductive. A continuous analysis of this effect can be performed as follows. In FIG. 8 ', when a typical gate voltage is first applied and the channel is still insulated (< 5 == 0), the potential distribution of the channel is traced. The potential change at the two terminals can be approximated as follows:, V (< 5y)-VGV (2 / n) < 5y / d (25) where cJ1 y is the distance from the source (or drain), And d is the interval between the molecular layer and the gate. Even when the channel becomes conductive, as long as Θ y is very close to the electrode, the equation (2 5) is still correct. Therefore, a small insulating region is expected to appear at the edge of the molecular layer near the source and the electrode. FIG. 9 shows a phase diagram for determining the width of the insulating region at the edges. A balance is reached at a given gate voltage ′ -VG, and the conducting portion of the molecular layer will bear a potential ′ -VT. This phase diagram is depicted in the ye / d-VG / VT parameter space, where ye is the width of the insulating edge region. It should be seen from Figure 9 that, first of all, for medium and strong gate 'voltages, the insulation region tends to be limited to—or within two molecular diameters. On the other hand, below the threshold voltage vg of the threshold 値 V τ 'the entire layer will become insulated, and when the gate voltage VG approaches VT from above VT', the insulation region grows rapidly, and it is clear It should be shown that the gate voltage is greater than the threshold voltage enough to avoid the negative effects of the insulation edge region. For example, at -26- a ~ ---- --------- rape clothes ------ 1T ------- m (Please read the precautions on the back first + fill out this page ) A Ⅴ. Description of the invention (24 VG = 2VT, if the spacer layer is 20 Angstroms wide, the edge region is about ι0 Angstroms. Because the edge region is usually on the order of one or two molecular diameters, and the charged carriers The barrier of (holes) is ε s 0.25 eV, so tunnel penetration can easily occur 'and the marginal area is expected to have only a very limited impact on the function of the device. Assume that charged carriers face an order of magnitude S sVG in the marginal area. / yet For a triangular barrier with an effective electric field, where ye is the maximum barrier width determined using the phase diagram of Figure 9, the tunnel conductance through the barrier can be easily calculated and written as follows: _e2 / 8kfW \ V ^ (eyG _h v 3π y " + £ (

G .exp, Ύ 2meVG, (^ \ ΊΓ 3/2 '(26) {Please read the notes on the back before filling this page. Equipment-To estimate the magnitude of the conductance, assume the following 値: ε f = 〇 _ 5 e V and device width W = 〇〇〇nm. Even for unfavorable parameter selection ε | -0.5eV, VG = 1.〇V, (can be found from Figure 8 if d = 40 Angstroms ye (Approximately 17 Angstroms), the tunnel through-conductance can be estimated to be approximately equal to 3 e2 / h. On the other hand, by selecting ε = 〇25εν and VG = 0.6V, it can be found that the resistance is below d = 30 Angstroms. The barrier width ye is approximately equal to 丨 丨 and the conductance reaches about 25e2 / h. To more accurately analyze the tunnel through-conductance, the actual potential change in the fringe zone is shown in equation (25), and the barrier of the mirror force The drop effect must be taken into account, and the barrier reduction effect of the mirror force can be described by Vim-e 2/2 π ε β y. It is expected that the barrier height will be reduced by 3 (eVG) 2/3 (2e2 / ε d) l / 3 / 27r, and this amount is quite large compared to the barrier height of £ 1. Therefore, for the barrier width of one or two molecular distances, the barrier Width-27- Paper ^^? ^ 1 ^ Standard (CNS) Tiege (210x2y7, M ') -5 Printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs V. Description of Invention (25) The phase diagram is used to determine that the mirror force can further increase the tunnel through current and thus reduce the possible edge effects. Therefore, the following conclusions can be made: the edge effects have little effect on the correct operation of the original device. In addition to the single layer described above In addition to the enhanced modal version of the transconductance switch, there is also a depletion modal version of this device. However, the gate potential is outside the range of the source and non-polar potentials, making this version not suitable for C Μ 0 S applications. However, since the depletion modal version is compatible with various D r AM memory cell designs, it is expected that the depletion modal device will be very useful. The P-type depletion modal device is achieved by: The molecular energy level S 1 is negative, so that these molecules tend to ionize even without a gate voltage. The zero VG carrier concentration is controlled by equation (1 1) as follows, where Vc = 0: C | = — 5 / Cmo, on the table ί-〇. For the '0N' hole concentration of 15, the required value of £ 1 can be obtained from line 7 of Table I. By making the gate voltage positive, the device can be switched to 0F, required The voltage amplitude is the same as the voltage swing in the last line of Table I. It is printed by the Consumers 'Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs, so' except for the different adjustments of St and the offset of the gate voltage | ) Is determined using the carrier concentration), and the device operates in accordance with the characteristic curve of FIG. 7. The advantage of a depletion mode device is that there is no tunnel through resistance at the edge of the channel. Because the channel is ON under the gateless electric field, the molecules on the edge are always in the ON state, and these molecules are shielded by the metal electrode. -28- In the paper) ------- In the memory V. Invention description (26 Therefore, 0 is on regardless of the rest of the channel, and it will only be slightly 2 under the state of Qing, In edge molecule applications, this advantage may be extremely critical. In the manufacture of single-interrogation devices, the idea of metal electrodes and the existence of them is made by a manufacturing-heating process. Connect "1 = come-layer. This oxidation procedure is limited to two == if the other erbium oxide procedure occurs during the deposition of layers above the sub-layer, the molecular layer is assumed to be heated. The dual interrogation device can be manufactured by an all-in-one process, organic insulator, such as polyimide. The above procedure can be used to build a multilayer structure. If the gate length is 100 nanometers (an array of the order of 1000 times the number of molecules of 1000) and has 32 layers, a storage capacity of the order of 101] bits is feasible, and this capacity is for traditional technical resources It creates challenges. The molecules constituting the conduction channel of the device may be of a single-layer type, or in the case of an enhanced modal device, it may be a macroscopic crystalline or amorphous three-dimensional molecular array, of which only those that are close to the gate The molecular layer constitutes a channel. The surface of the insulator needs to be treated to receive molecules, while the surface of the insulator can be an oxide. The surface must be in a state where the surface is flat and has a low step density. The surface can be cleaned, or especially in the case of a single-layer channel configuration of the device, it can be treated with an active chemical group ', and the active chemical group is selected to be compatible with the molecule to be assembled, and the The description of the active chemical group is given in A. Ulman's An Introduction to Ultrathin Organic Films, from Langmiur-Blodgett to Self-Assembly ", Academic Press, Boston (1991) »-29- ) Λ4 Yuege () --------- Approve clothes ------ IT-„--- r——.. (Please read the precautions on the back before filling this page) Printed by the Consumer Standards Cooperative of the Ministry of Standards of the People's Republic of China Printed by the Central Standards Bureau of the Ministry of Economic Affairs of the Ministry of Economic Affairs of the Consumers' Cooperatives of India Fan Fifth, Description of Inventions (27) -11 ... Papers by JA T Read et al.] Am Chem ^, 117, Xian, 1995 These books and papers are mentioned here for reference. The process of assembling molecules can be carried out using solutions, or by evaporation, or by using molecular beams, or by other procedures. The self-suffice «can be reached by Attach molecules using a chemical base incorporated into the molecule The surface, or a chemical group attached to the surface in advance, can be implemented. The molecules can be attached by the Langmiurmdget procedure, or by exposing the surface to a solution that can dissolve the molecules, or by other methods. A layer of tightly packed layers, which may cause ordered molecules to attach to the surface in a highly directional manner. These molecules, in addition to the chemical base that adheres them to the surface, must contain a redox core, and the redox core It plays an important role in the function of the MTFET device. Therefore, this case has explained a three-terminal device with a single-layer channel, and the three-terminal device is operated by Mote transfer, which is called Mote transfer field effect transistor. The device uses an array of molecules as a conduction channel, in which charged carriers (holes or electrons) are strongly related. Mote transfer determines the switching of metal-insulators and has been proven to be controlled by an external gate. No ^ The device appears to have the electrical characteristics equivalent to a conventional; 5 yoke type F £ τ. The ΌN 'state has a typical transconductance of about 10e2 / h One of the key criteria for the selection of possible candidate molecules for the molecular layer is the (live) library repulsion force U. MTFETs require the correct operation of a logical environment. For molecules with a radius in the range of 0.5-1 nanometers, the Coulomb repulsion force of the device environment卩 is at least equal to 1.5-0.7 5 e V. -30. The size of this paper is applicable to China National Standard Clothing (CNS) Λ4 (21〇κ297) --------- I-- ---- ΪΤ —— ^ --- r——_.il -_ ΐ (Please read the notes on the back before filling out this page) A ΙΓ V. Description of the invention (28) In short, Mote transfer The field-effect transistor has the following characteristics and advantages. The Mott transfer device is characterized by the use of a high carrier density to allow a relatively short average free path of approximately four lattice intervals. Unlike silicon technology, the device does not require high-purity, ordered materials, which can simplify the manufacturing process. The device can operate at the absolute minimum size of the order of one carrier's average free stroke, assuming that more than one carrier is available . Therefore, a minimum size of the order of _4 * 4 array (for example, 4nm by 4nm, depending on the grid interval) should be feasible. The number of carriers, in a 4 * 4 array, belongs to the order of 2 carriers at any time, and this is once again close to the lower limit of the device's operability. This minimum size can provide a stacking density that is 1000 times higher than that of a conventional minimum size FET. 'ON1 resistors are size dependent and belong to the order of quanta conductance', such as thousands of ohms, and this is estimated to be suitable for logic and memory applications. The working voltage is about 0.5 volts, and this electricity | is not only larger than the noise at room temperature, but also greatly reduces the ohmic heating to lower than the current technology. The device can be manufactured into versions similar to η and p, thus enabling the construction of C M 0 S technology. The depleted modal version of this device, although not suitable for C μS applications, is still suitable for DRAM environments. The advantage of this device is that, in the ON state, there is no edge effect; the edge effect appears in the · 〇 F F | state, and in the · 〇 ρ F 1 state, the edge effect printed by the staff consumer cooperative of the Central Standards Bureau of the Ministry of Economic Affairs is harmless. If there are serious edge problems, then select exhaustion Modal configuration is a feasible solution. This device can be built into a stacked array by successively performing the following steps 'as shown in Figure 10', where first a single layer is applied by, for example, standard self-assembly technology using a solution, and then depositing insulators and electrodes on -3 Use the Chinese standard mark on the side of the paper (^ ~ 一 A 7 _____— B7 One——--—-_ __ V. Description of the invention (29) on a single layer. The device array is on the y_Z plane and the stack The array is located in the X direction (as previously defined). This procedure is particularly suitable for the device's dual-gate 'fully organic' type. The bit density that can be achieved using the stacked array DRA M technology is expected to be 1 0 1 1 The range from 10 to 12 depends on the aggressiveness of the design measurement. Stacked array logic devices are also feasible, and the operation of this device does not need to cross the highest occupied molecular orbital and the lowest unoccupied molecular orbital (HOMO-LUMO) energy gap of the molecule. (Different from organic LEDs), which can increase the life of the device. In Figure 10, layer 22 is a planarized insulator, and layer 24 is a grounded shielding plane, and layer 24 prevents the stacked devices from interfering with each other. The single gate variant of the interference 'stacked array is formed by removing the gate 20 and the adjacent second oxide layer 18'. Fig. 1 1 shows a type shown in Fig. 2 (ie, multi-layer, single gate) Prototype enhancement mode, ¾, Mote field effect transistor 1 00, and the transistor has a source 丨 14, drain 1 1 6 'gate 桠 1 2 0, gate insulator 1 1 8 and channel 1 1 0. As mentioned earlier, the copper salt constitutes a material exhibiting Mott metal-insulator transfer. This makes the copper salt suitable as the (or equal) molecular layer of Figs. 1 A, 1 B, and 2. In addition, copper salts are suitable for integration with high-dielectric oxides, and these high-dielectric oxides include titanate fins (SrTi03) and Bai-xSrxTi03, and these 咼 dielectric oxides are suitable for use in Figures 丨 A, 丨 B, and 2 gate insulator 18. The prototype device 100 shown in FIG. 11 is upside-down with respect to the manufacturing sequence thereon, and the manufacturing sequence will be described below. The device 100 is grown with a pole as an impurity. Titanate gill substrate (Nb_SrTi〇3) 120. The rice 120 is used as an impurity to make the substrate 120 conductive. The substrate 120 is a device 1 0 Gate of 0. A dielectric layer with a thickness of about 1 8 0 Å, epitaxial epitaxial paper & standard house Mou U'NS) Λ4 specification (

In I. n ^ i-ϊ 1 I.: I— · I—-»I 1 I- II! M I. ..... ---, I---I ---- *-n ^ i (please read the iili-Issue of the back of the book first) (3〇Λ 7 Β7: Α in the part il and eliminate f /-if 卬 way to grow into the matrix 120, by gallium titanate gill in the empty deposition chamber The standard self-assembly procedure of laser fusible single θ-day deposition. We have found that if you want to make the = pole ,,. 彖 spacer 丨〗 8 to obtain good dielectric characteristics, such as high avalanche β% pressure, low leakage current, and high The dielectric constant must be accumulated in the presence of oxygen. For the prototype device 100, the oxygen pressure is about 300 mTorr without removing the device from the laser melting deposition chamber, A Mot transfer layer channel u of about 2 @ 〇〇angstrom thickness can be deposited by laser fusible single crystal self-assembly procedure at a pressure higher than part of the oxygen pressure (here, .4 pen holders), epitaxially grown in the gate insulator layer 丄 18, and the channel 110 contains copper salt Y0Pr〇5Ba2Cu3〇i. This makes Mote T # and layer channel 1 1 0 stoichiometric Is controlled to produce the desired characteristics. The surface resistance of the layer is c. The source i 4 and the drain i 6 are then deposited on the cuprate mote transfer layer by electron beam evaporation using a contact mask. The source 114 and the drain 116 are platinum and have a thickness of 2000 angstroms and an area of 讪 f multiplied by 50 μm. The prototype device 100 has a channel length of 5 μm and a transport width of 50 μm. The thickness of the source electrode and the thickness of the electrode layer in the copper layer is very large, so that it can be electrically conducted to the most affected by the gate electric field; the copper acid f moth transfer layer, and the copper salt molybdenum The special transfer layer is the layer of the acid salt / acid interface. The performance test of the prototype Mote transfer FET is performed under the source 114 ground. The drain current is determined to be a function of the drain voltage at various questions. Electrical waste (bottom.) The performance of a ⑤-type Mott transfer FET is shown in Figure 12. In Figure 12, the relationship between the drain current and the drain voltage is depicted. Each curve in Figure 12 represents a different gate voltage. The performance data of Figure 12 clearly shows the device. 33- This paper ruler Zheng Shi / ΠShi Yan Yan Jiabiao Ping (cisjS) 8 4 Specifications (2 丨 0κ2 () 7mm (诮 Read the precautions on the back before quoting this page), y3 —line Λ " Β7 V. Description of the invention (3 丨) 0FF state of the positive gate voltage (high (Resistance) to 0N state of the negative gate voltage (low resistance). Although the physical parameters of the prototype device are not optimal, the prototype device clearly shows that the Mote transfer device is feasible and can achieve superior switching Performance. As it is extended beyond the prototype device, it is now possible to build a three-dimensional stacked array device of a type not shown in Figure 10. Under such a structure, the source electrode and the gate electrode can be formed by, for example, being familiar with a technique known in the art to perform selective ion implantation of the insulating spacer layer. This type of array does not appear in traditional silicon technology, because it is very difficult to extend into high-quality silicon channels on the oxide material. This case also shows that LaaCuC »4 and Yo6PrG.4Ba2Cu307_ are suitable materials for the Mott transfer channel 110. Therefore, a very wide range of steel salts can be used as the material of channel 100, including copper salts with the following general formula: ββ PrxBa2Cu3〇7, La2-xSrxCu04 and La2.xBaxCu〇4 (where 0 S χ s 1). All of the above factors contribute to the multilayer (ie, low cost), low power, and small size manufacturing of the FET technology described. These needs are specified by future technologies, and the extension of existing silicon technologies will eventually fail to meet these needs. -34 · This roar Zhang Jian 玟 砘] 丨 丨 屮, ♦: 次 次 _; eNS) Λ4 specifications (210/297 public 尨〉 --------- " ------ ίτ --.---_--- Γ line-- (" Read the back first. " ί Italian matter is stored in this book)

Claims (1)

Economic. Deng Central Standards Bureau employee consumer cooperatives printed — .. soil-... '~~~~ "% efficiency transistors, and this field effect transistor contains-source,-pole and a gate, And there is a conduction channel between the source and the drain, and the conduction channel includes molecules of at least one layer of a 2-dimensional array, and the channel is separated from the intervening electrode by an insulating spacer layer, wherein The molecular negative electrode is enough to undergo a Mott metal-insulator transfer. 2. If the transistor of the scope of the patent application, the molecules are redox cores containing-unstable electrons. Transistor, where these molecules are of type d + Y _, where D + is an organic donor, and γ- is a halide ion. 4. As for the transistor of item 2 of the patent application, where these molecules It is 0+ plant type, in which D + is an organic donor, and A- is an organic acceptor. 5. If the transistor of the patent application No. 3 item, wherein d + is tintin F, and the Is bromine (B〇. 6. For example, the transistor of the scope of patent application No. 4 wherein D + is BED T -TTF, and The A- is TCNQ. 7. If the transistor of the scope of the patent application is applied for, the molecules are redox cores containing an unstable hole. 8. If the transistor of the scope of the patent application is applied for, the Isomolecules are of the type χ + Α-, where X + is an alkali metal and Α- is an organic acceptor. 9. For example, the transistor of the patent application No. 7 in which these molecules are 〇 + Α · Type, where D + is an organic donor and A- is an organic acceptor. 10. For example, the transistor of patent application No. 8 in which the X + is an alkali metal and the A ' It is cobalt sixty (Co6Q). 11. For example, the transistor in the eighth scope of the patent application, where χ + is an alkali metal -35- This paper is used _ National Standard (CNS) A4 (210X297) Public A) --------- Installation ------ Order 丨 ---- „-t-line * (Please read the precautions on the back before filling out this page) Staff of Central Bureau of Standards, Ministry of Economic Affairs Consumption cooperative printing IV-'Λ ________ [) ;, 6. Patent application park — and A · is TCNQ. 12. The transistor as claimed in claim 9 wherein the D + is T M p D and the A · is TCNQ. 13. The transistor of claim 1, wherein the insulating spacer is an oxide. 14. A% government electric crystal, and the field effect transistor includes a source, a drain, a first gate, and a second gate, and there is a conduction channel between the source and the drain, and The conduction channel includes at least one layer of one molecule of a 2-dimensional array, and the child channel is separated from the first gate by a first insulating spacer layer, and is separated from the second gate by a second insulating spacer layer. , Where these molecules are able to undergo-Mott metal-insulator transfer. 15. In the case of the transistor in the scope of application for patent No. 14, the molecules are redox cores containing a unstable electron. 16. For example, the transistor of the scope of application for patent No. 15, wherein the molecules are of the D Y I type, where D + is an organic donor, and y is an ion. π. If the transistor of the patent application No. 14 of the patent application, where the portion is divided into 3 D A type, ¾, where; [) + is-organic donor, and A-is-has a body. Text 18. The transistor of item 15 of the Rushen patent, where d + is τ τ f and Y — is bromine (B r;). 19. For example, if the transistor of the patent application No. 17 is used, the D + is TTF and the A— is TCNQ. _ 20. If the transistor of patent application No. 14 is applied, the share is the redox core of an unstable hole. . This paper size applies to Chinese National Standards (CNS) --------- Installation ------ Order i --- L-- 丨 Line 1-(Please read the precautions on the back before filling in this Page) -36-I Yrr ^ Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs 6. Application for Patent Scope 21. For the transistor with the scope of patent application No. 20, where these molecules are of type XTA_, where X + Is an alkali metal, and A — is an organic acceptor. 22. For example, the transistor in the scope of application for patent No. 20, wherein the molecules are in the form of D + A—, where D + is an organic donor, and A · is an organic acceptor. 23. For example, the transistor of the 21st scope of the patent application, wherein X + is an alkali metal and A- is the first sixty (Co6O). 24. For example, the transistor of item 21 of the patent application park, wherein X + is an alkali metal and A— is TCNQ. 25. The transistor according to item 22 of the patent application scope, wherein the D + is T MP P and the A. is TCNQ. 26. For the transistor in the scope of application No. 14, the molecules are polychromophores. 27. For the transistor in the 26th scope of the patent application, the molecules are dual chromophores. 28. The transistor according to item 14 of the patent application scope, wherein the first insulating layer is an oxide 'and the second insulating layer is an oxide. 29. If the transistor of the patent application No. 28 is applied, the oxides of the first and second insulating layers are the same. 30. If the transistor of the scope of patent application No. 29 is applied, the oxides of the first and second insulating layers are different. 31. —The stacked transistors of the array, and the transistors are transistors as described in the patent application No. 14 range. 32. The array of the 31st scope of the application for a patent, and the array is a logic device. -37- The scale of this paper applies Chinese national standard (CNS> A4 specification (210X297mm) --------- installation ------ order 丨 · ——.—— Γ line (please read first Note on the back, please fill out this page again.) 6. Scope of patent application 33. For example, the array of item 31 of the patent application park, and the array is a memory device. 34. —stacked transistors of the array, and The crystal is a transistor as in the scope of patent application item 1. 35. The array as in the scope of patent application item 34, and the array is a logic device. 36. The array as in the scope of patent application item 34, and the array It is a memory device. 37. For example, the transistor of the second scope of the patent application, wherein the material is a copper salt. 38. For example, the transistor of the 15th scope of the patent application, the material is a copper salt 39. For example, the transistor of the 37th scope of the patent application 'wherein the copper salt is Y: PrxBasCusO?-· 3 ·, where 40. For example, the transistor of the 38th scope of the patent application, where the copper acid The salt is Y 1 PrxBa2Cu3〇7- &lt; y, where 0 ^ χ each 1. 41. For example, the transistor of the 37th scope of the patent application Wherein, the copper salt is La 2 SrxCu〇4, of which 〇 $ χ $ 1 0 42. For the transistor of item 38 in the patent application scope, wherein the copper salt is La 2 -χ SrxCu〇4, where OSxSl. Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs (please read the precautions on the back before filling out this page) 43. For the transistor with the scope of patent application No. 37, the copper salt is L a 2 _χ BaxCu04, of which 0Sx each 1. 44. For example, the transistor of the 38th scope of the patent application ^ where the copper salt is La 2_χ BaxCu04, of which OSxS1. 45. For the 39th patent of the patent application park Crystal, where the copper salt is -38- This paper size is applicable to Chinese National Standard (CNS) A4 specification (210X297 mm) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs B .: C; v Sixth, the scope of patent application Y 〇.5Pr〇5Ba2Cu3〇7 — j 0 46. For example, the transistor of the patent application No. 4 〇, wherein the copper salt is Υ0.5 P Γ 〇 0.5 B a2 Cu3 〇7 -J 0 47. Such as The transistor of the scope of patent application No. 41, wherein the copper salt is La2Cu〇4 〇48. As the scope of patent application No. 4 The transistor of 2 items, in which the copper salt is La 2 C u 04. 49. The transistor of item 3 in the patent application range, wherein the oxide is SrTi03 ° 50. As in the application of item 13 of the patent range, Transistor, in which the oxide is Bai-xSrxTi〇3 〇51. Such as the transistor in the scope of the patent application No. 28, wherein the oxide is SrTi03 0 52. As in the patent application scope of the 28th transistor, where The oxide is Bai-xSrxTi〇3 〇53.-A field-effect transistor, and the field-effect transistor includes a matrix,-a source, a drain and a gate, and at the source and the drain There is a "passage channel" between them, and the conduction channel contains at least one layer of an array of material, and the material can undergo Mott metal-insulating layer transfer, and the channel is separated from the gate by an insulating spacer layer The insulating spacer layer and the channel of the electrodes are grown by epitaxial method. 54. The transistor according to item 53 of the scope of patent application, wherein the at least one material includes a redox core, and each of the redox cores includes a unstable electron. ^ • 39- This paper size is applicable to China National Standard (CNS) A4 (210X297 mm) --------- Installation ------ Order 丨 ^ ———— l·Line ( Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs and applying for a patent scope 55. For the transistor with the scope of patent application No. 53 in which the material of at least one layer is a copper Acid salt. 56. The transistor according to claim 55 of the patent scope, wherein the keto acid salt is γ ^ X PrxBa2Cu307j, where 〇 contains xSl. 57. The transistor as claimed in claim 55, wherein the acid salt is La2xSrxCu04, and 0Sx guest 1. 58. For example, the transistor of claim 55, wherein the salt is La2-xBaxCu04, where 0 is 1 each. 59_ The transistor according to item 56 of the patent application range, wherein the copper salt is Y0.5Pr0.5Ba2Cu307-tf. 60. The transistor as claimed in item 57 of the patent application, wherein the steel salt is L a2 C u 〇 4 0 61. The transistor as claimed in item 53 of the patent application, wherein the oxide is SrTi03. 62. The transistor as claimed in claim 53, wherein the oxide is Baij SrxTi03. 63 · — An array of stacked transistors is provided, and the transistors are transistors as described in Item 53 of the patent application park. 64. A field-effect transistor, and the field-effect transistor includes a substrate, a source, a drain, a first gate, and a second gate, and there is a gap between the source and the drain. A conduction channel, and the conduction channel comprises at least one layer of a material of an array, and the material is capable of undergoing Mott metal-insulating layer transfer, and the channel is separated from the first gate by a first insulating spacer layer, It is separated from the second gate by a second insulating spacer layer, and its -40- This standard is applicable _ National Standard (CNS) A4 specifications (210X297) by '~~------ ---- Install ------ Order 丨-^ --- „-line (please read the precautions on the back before filling this page) Λ: ', Cis D8 -X The equal electrode, the insulating spacer layer and the channel are grown in an epitaxial manner to form a transistor in the patent application No. 64, in which the package includes: a redox core, and each of these redox cores; Electronics. 66. If the scope of the patent application for the item M is only <% body 3, of which at least one layer is-copper salt. Zinc &lt; wood 67. If applied The scope of the patent No. 6g crystal 'where the ketonic acid salt is γ PrxBasCusOhi, of which one team is applying for the patent scope No. 电 of the crystal, where the snapperate is La2.xSrxCu04, where 〇§χδ1. 69. No. 66 transistor of the patent range, where the keto salt is La2-xBaxCu04, of which 0SxS1. 70. For example, the transistor of the 67th scope of the application for patent, wherein the copper salt is Y0.5Pr0.5Ba2Cu3 07 j. 71. For example, the transistor of scope 68 of the patent application, wherein the copper salt is L a2 C u 〇 4. 72. For example, the transistor of scope 64 of the patent application, wherein the oxide is SrTi03 73. For example, the transistor in the scope of the application for patent No. 64, wherein the oxide is Ba SrxT103. 74.-The stacked transistors of the array, and these transistors are in the scope of the patent application for No. 64 Transistor. -41-This paper size applies the national standard (CNS) A4 specification (210X297 hectares) II Zhuang Yi — II order I — I i line, i (Please read the notes on the back before filling this page} Printed by the Consumer Standards Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs