TW381223B - Split-queue architecture and method of queuing - Google Patents

Abstract

A split queue architecture and method of queuing entries to the queue has a three part queue. The first part of the queue is a write side in which entries to the queue are received. The second part of the queue is read side from which entries exit the queue after flowing through the queue. Entries normally flow from the write side to the read side. An overflow area, located off-chip in an external memory, forms part of the queue on an as ended basis to store entries from the write side when the read side no longer has capacity to accept more entries from the write side. When the read side regains capacity to accept more entries, the overflow area transfers its entries to the read side.

Description

A7 B7 Printed by the Consumers' Cooperative of the Central Bureau of Standards, Ministry of Economic Affairs

V. Description of the invention (1) Jishu Chengji This invention relates to the temporary storage of data. In particular, it relates to the queues of receiving, temporarily storing, and releasing input data. Persistent Past In many system types, from simple data to complex data, the entries in the system often cannot be processed immediately by the system. However, it is not necessary to abandon these input data, but the “queue” method can be used to temporarily hold some input data, and when the system can process the next input data, release one input data for general processing. An example of queues in daily life can be compared to customers such as banks or airport counters waiting in line to buy tickets. The general queue is maintained in the first-in-first-out (F I F 0) order of the input queue. There are many types of electronic data systems that can use queues. These electronic data systems include, for example, microprocessors, memory transfer systems, airline positioning systems, and packet switching networks. In most systems, the queue is expected to have a low waiting time, so that the processing of input data (e n t r y) will not be delayed too long due to the delay caused by the queue itself. Queues have a low waiting time I, which means that compared to queues with a high waiting time, their input data can be quickly entered into the queue from the population and then transmitted to the queue's exit. There is an important factor that significantly affects the waiting time of the queue, which is the length or capacity of the queue. The greater the capacity of the queue to store input data, the higher the queue waiting time. In some systems, when designing the queue size, a compromise is made between the competing factors of latency and capacity. For example, the size of this paper is applicable to the Chinese National Standard (CRS) Λ4 specification (21.0X297 male H 1 91469 (please read the precautions on the back before filling this page) ----- ^ 1 Pack --- --- Order ------------------ \ A7 Mingfa r five-net changing station end on the road network. In the \ 1 / road. Net too B \) / 2 Such as / _ \ 月 例 rtm / (Said there is a connection-exchange of materials for the package and delivery of the package. The port receiving and sealing the package will not be sent by the port. Do n’t pay this. Overlaying the transfixion station and changing the terminal will give you the time to match the time to the right time. In the package, the package can be merged. We will use multiple packages to seal the order. It is necessary to send the package in a reasonable manner. Whenever there is a need, you must be able to do it. Should be settled until the response should be 'for package encapsulation and some of this will be put into the package when the Lhr 0 Anhe designed. Network package port seal more and more i just here' The quality of time is enough because of competition and the ability to install and exchange and interact with each other, and other people, and people who have expanded and listed on the envelope are often motivated by reason. And, as appropriate, it ’s common to think that the value of the package is often a quick question to put this pretext in place and to exchange it. The weight is enough to install it is enough to have enough money to talk about it. First, wrap it and seal it, but discard the material. The home room must be lost without delay. In addition, the increase in crowded period and large acceptance (I read the precautions on the back before filling in this page). Central Standards Bureau of the Ministry of Economy To make Xu Xing and Xiaoli Zhi more press-fitting to change this intersection, Lu Jing made the face to the net.. That is to say, the test of the ability to test the power of Dossi shares has a deeper presence. It ’s so expensive and so expensive. It ’s so expensive, too. 0 0 The above-mentioned piece of power can be used in a row, and it can be used as a hope. You can install and change the traffic network port in many places like this. It has its own requirements, and it is necessary to read the description of each crystal on the port. 0 This paper size is applicable to the Chinese national standard (CNS) Λ4 ^ (21〇X 297 ^ t) 9 1469 V. Description of the invention (3 A7 B7 Central Ministry of Economic Affairs) The standard bureau ’s work and consumption cooperatives print highs and lows, and there are promising examples. One, one, and one pair M are used to provide a special area as the main area. Column M must be listed as ue2 space-time. When you are waiting, you should understand this. You are not going to use yq to wait for the material to be listed. You are waiting for it, and you are sending out the information. You have to wait for a period of time. It is listed as the lowest amount when the first t is applied. The district's input and output are the second most important ones, and they are necessary to be listed in the first order. , Between rooms. He e _ makes it possible to meet the needs of the energy of this combination, and its P1 can be accessed to the second time. The large column from the coupling to the work capacity area of the U coupling center area According to the same method, he planned to recover the section and other sections. The U11 area can be held only when it is listed. It has the necessary information to adjust the transfer and reduce the distribution (ΠΙ— standing for planting and maintenance). There are two basic structures in the logic and the other structures are still in the overflow. To the input and output areas, the number of items must be settled when the node is closed, but it needs to be included. It is crowded in the number of columns, waiting for the time. If necessary, the connection will be made. The capital investment will be held for a while, and it will be waiting for the waiting list. All the materials will be listed. Guaranteed capital t, overflow, etc., one overflow (one, three, three, etc.), no matter. The joint venture investment is lost and the withdrawal is sufficient for the time required. (Because of the loss), the district's first time can be invested in the district, and the district's materials are listed in the list. The district's heavy tutu competed in row and so on. The second entry is listed, which lists the basis of the multi-ec competition and the second intermission. If you enter the first entry and the last it, the second time is the same amount. The number of queues in the reception area of the reception area is the first one, such as ar, etc. (please read the precautions on the back before filling this page) This paper size is applicable to Chinese national standard beer (rNS ) Λ4 size (210X 297 mm) 3 9 1469 A7 The seal of the Consumers' Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs is listed as a condition timepiece and lost to the outside ranks. He wants to set up the connection. There are many in the list, and the phasors are equal. Some of them need to be coordinated to couple the materials on the chip. This system is used for some systems. -The chip is used as a memory chip. Now it is available in some systems. It is worthwhile to list here. The treatment is only available when the lifting equipment is exported and in place. The income of this asset is not a big deal, but it is expected to be used indirectly as an indirect piece of work, and superior or i. Between the same ~ ~-capital, the area of losing the crystal, the success of the district, when the time is lost, the material is not the first one, the position is changed to the same position, then the waiting-the capital investment, including the memory Overflow of spills reached. Waiting in, waiting for the inclusion. To the package, remember. The retransformation that has arrived is high and the area can be transported and lost in time. It is used to return to the Rongyi area by the body area area. Multiple queues can be transported by using the external memory to send the area location. For the second-order time-limiting example of the fixed overflow crystal, this record and the overflow area of the overflow material depend on the regular impeachment. The content of the film overflows the used stream in place. The actual demand of the heavy-duty equation. When the crystal is included in the body, the basic overflow of the system will increase the number of squares in the ground. There are contours, and others are known. Keep in mind the inconveniences needed in the debit. 4 To be more detailed, it can be included, and can be used to make the available space between the { This special memory in the period of the Ming Dynasty is sufficient for the hairpin is enough to send hair in a row, the amount of material used. The to-do note is to say that the area can be used to recall the resources in the Banda materials, use more than one supply operation, and so on. If you can lose one row, you can record the energy assets into the present and further improve it. Part 1 of the single case, the person who also enters this section will be used if the area is lower than the lower five (please read the precautions below and fill out this page) This paper size applies to Chinese national standards (('灿) 8 4 specifications (210 乂 297 mm) 9 1469 Α7 B7 V. Description of the invention (5) Another embodiment of the present invention provides a multi-port network switching device for packet switching network. This packet switching network It has a plurality of queues for a plurality of ports, through which the packets from the network can be received, and the packets can be sent to the network through the ports. The plurality of queues correspond to the plurality of ports. At least one of the queues is a split queue, with the write side receiving the input data corresponding to the sending packet, and the read side outputting the input data. There is an external memory interface. When no read side is available Capacity to receive input data, the input data goes through this external memory The writing side is sent from the writing side to the overflow area of the external memory used for queueing; and when the reading side recovers the available capacity to receive input data, the input data is externally transmitted through this external memory interface. The memory is returned to the writing side. Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economics (please read the precautions before filling this page) The multi-port network packet exchange of the present invention has an advantage of using a split structure The queue has a write side and a read side. Because the exchange device uses a plurality of queues, a relatively small queue is used in the exchange device and the input data is sent to external memory only when needed, which reduces this The amount of memory space required in the swap device itself. However, this does not reduce the capacity, because the capacity can be provided by external memory when needed, although this generally increases the waiting time. Some embodiments of the invention are related The switching structure of the packet switching network includes an external memory with an overflow area attached to the switching device. The foregoing requirements may also be addressed by the present invention. Other embodiments are achieved. These embodiments provide a method for enqueuing input data. This method includes the following steps: receiving input data in the first section of the queue, and determining the available capacity of the second section of the queue, The input data can be removed from the queue in this second section. This paper size applies to the Chinese national standard ((, NS) Λ4 size (210X297 mm) 5 9 1469

7 B 6 / fv clearly states that the five, five, and the amount of content will be used, and can be used to enter the section. The second amount is used for the content. The available amount is used. The section is not included in the third section. The second section of the guide is the same as the first section of the district. The third section of the second section of the guide will be straight from the second section of the section. The districts in the first stage of the investment are listed in the third stage. The districts are listed in the third stage and are used to enter and lose. For the M-notes provided, the section fruit area, as the words show, refers to the C section of the guide section, and the loser of the second section has entered the direct guide section. The verses of the verses are available through the excuse of the district. 伫 If you want to enter the material, you can also refer to the formulas if you want to use them for reference.

Duanneng District is also the third. The first list needs to be used only when it is used, and the borrowing 'special time is to be used only when it is needed. The Mingfa style map is attached. It is clearly stated that it is not necessary to make detailed information. The input volume of the input of the capital is much more changed than that of the capital. The point is optimized and the point is viewed. The picture of Zhimingfa is as shown in Figure 1. -------- ιρ, ^-(Please read the notes on the back before filling in this page) The Central Consumers Bureau of the Ministry of Economic Affairs prints $ 1 block map 2. The picture in the block diagram is based on the installation of the port for the construction of the system of exchanging seals and substituting the system of applying the seals and substantiating points. The system of multiple systems is the replacement of the 4th one of the "Building of the System". Mapping 3 and 3 examples to illustrate § Shi Ming Shi Shi I The _ of the β of the β system 0 0 0 * 次 * According to the picture, according to the installation, it is as shown in Figure 3, and there are many exchanges. Figure 2 Figure 3 Columns in the block area, the system of output and output of 1 order. The paper size is applicable to China National Standard Net (CNS) Λ4 Rule (.210 × 297 mm) 9 1469 3

I A7 __B7 V. Description of the invention (7) Figure 5 is a more detailed description of the first type of output queue according to the example of the present invention. Fig. 6 is a more detailed explanation of the second type of output queue according to the embodiment of the present invention. FIG. 7 is a more detailed description of the overflow area of the external memory structure according to the embodiment of the present invention. FIG. 8 is a block diagram of a link table data structure used in the present invention. Figures 9a and 9b are schematic diagrams illustrating the header format of a data frame punch according to an embodiment of the present invention. Fig. 10 is a more detailed description of the multi-copy, recycling, and idler slot area of the exchange device in Fig. 4 constructed in accordance with a practical example of the present invention. Fig. 11 is a diagram constructed in accordance with an embodiment of the present invention. Block diagram of the structure of the space buffer zone. 12th is a block diagram of a multi-copy queue structured according to an embodiment of the present invention. Printed by the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperatives (please read the notes on the back before filling out this page). Figure 13 is a schematic diagram of a multi-copy fast flash memory buffer constructed in accordance with the real example of the present invention. The first 14JB is a block diagram of a buffer manager of a switching system and a queue area block of a port vector FIFO constructed in accordance with a practical example of the present invention. The detailed description of the example is described in the present invention by taking a switching device in an Ethernet (IEEE 802.3) network as an example. However, after the following detailed description, it should be clearly understood that the present invention can also be applied to other packaging and exchange papers. The paper size is applicable to China National Standard Soap (CNS) Λ4 specification (210X 297). 9 9 1469 A7, 丨. __ ^ _ B7_ V. Description of the invention (8), and other general systems. Fig. 1 is a conventional block diagram of a typical example in which the advantages of the present invention can be realized. The proposed system 10 is a packet switching network such as Ethernet. This packet switching network includes an integrated multi-port switching device (IMS) 12 which can perform data packet communication between websites. The network can include websites with different structures, such as 24 websites with 10 million bits per second (M \ bPs) 14, their M IOMUps network data rate for sending and receiving data, and 2 100M \ bps websites 22. Its network speed of M100M \ bPS sends and receives data packets. Therefore, the switching device 12 selectively transmits the data packet received from the website 14 or 22 to an appropriate destination according to the Ethernet protocol. According to the disclosed cell example, the 10M \ bPS website 14 sends data packets to the switching device 12 via the media 17 according to the half-duplex Ethernet protocol, and receives packets from the switching device 12. The Ethernet protocol IS0 / IEC8802-3 (ANS / IEEE Std. 8 02.3, 1 9 9 3 Ed.) Defines a half-duplex media access agency, which allows all websites to access the network channel with an equal opportunity of 14M ( Please read the precautions on the back before filling this page.) Presence of goodness or multiple areas should be felt. There are no waves of interest. There are 17 specific media in the investigation and investigation. 14 In the environment of the network under the site Labor makes half a double. 〇 楢 The upper body of the Central Bureau of Standards, the Ministry of Standards and Consumers ’Cooperative Cooperative printed the interest-receiving news and passed it on to the face of the network ’s Taiyi ’s resolution. It was received on 1 AM. Send message whether there is ea on

S station network He Ren ’s transmission and transmission information is required. Ο Go to test and determine G. Pre-I (I a waiting room and other rooms will be sealed by contract. If you know later, the time-determined wave will be fixed and received in advance. On the road, the body is connected to the media, and the maps are sent to the company when the time is 4 and 1. The material for transmission is 4 11 The number of stations is the same as that of the road network Yu Ruo and M confirmed that the receiver received the upper body The sense of the media is in response.} The counter station is 0 P and the GI-I is different. The size of this paper is applicable to the Chinese National Tick (CNS) Λ4 specification (210X297 mm) 8 9 1469 A 7 ___B7_ ', V. Description of the invention (9) After the distance, if you want to send data, it will cause a collision. Therefore, the sending station will listen to the media M to determine whether there is a conflict due to another website sending data at the same time. If a conflict is detected, then Both websites stop sending, wait for a random time, and then try again. The website 22 of 100 M \ bPs is best to have flow control according to the proposed Ethernet standard IEEE 802.3x-page sketch (0.3). Full-duplex operation in full-duplex mode. The full-duplex environment provides a two-way, point-to-point communication link between each of the 100M \ bps websites 22 and the switching device 12, which can simultaneously send and receive data packets on the switching device 12 and individual websites 22 without conflict. 100M each \ bps Website 22 is coupled to the network media 17 via a 100Base-TX or 100Base-FX type 100M \ bPs physical (PHY) device 20. The switching device 12 includes a Media Independent Interface (MII) 24, which is provided to the entity The connection of device 20. 100M \ bps website 22 can be used as a server or router to connect to other networks. Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling this page). As shown in FIG. 1, the network 10 includes a series of switching device transceivers 16. The transceiver 16 can perform time division multiplexing and time division demultiplexing on data packets transmitted between the switching device 12 and the 10M \ bps website 14. The magnetic transformer module 19 maintains the signal waveform on the medium 17. The switching device 12 includes a transceiver interface 18, which uses a time-division multiplexing protocol that passes over a single serial non-return-to-zero (NRZ) interface 23 Data packet Send to each < switching device transceiver 16 and receive data packets from the switching device transceiver 16. The switching device transceiver 16 receives packets from the serial NRZ interface 23, demultiplexes the received packets, and passes these packets through The medium 17 is output to an appropriate terminal station 14. According to the disclosed embodiment, each switching device transceiver 16 has 4 independent 10M \ bPs. This paper size is applicable to Chinese national standard (CNS > Λ4 specification (210X297 mm) 9 9 1469 Employee consumer cooperatives printed and printed paper size (general Chinese national standard) (CNS> Λ4 specification (2 丨 0X297 mm) 91469 A7, _ B7 V. Description of the invention (10). Cunning wire to port, and use more than 4: 1 By moving through this serial NRZ interface, the number of pins (PINs) required by the switching device 12 is reduced by 4 times. The switching device 12 includes a decision engine, a switching engine, a buffer memory interface, structure / control / The state register, management counter, and MAC (Media Access Control) protocol interface, M supports the path of data packets between the Ethernet ports of service network stations 14 and 22. The switching device 12 also contains enhanced functions for Intelligent exchange decisions, and provide statistical network information in the form of K management information base (MIB) without external management entities, which will be described in detail below. In order to reduce the chip size of the switching device 12, the switching device 12 also includes An interface capable of externally storing packet information and switching logic. For example, the switching device 12 includes a synchronous dynamic RAM (SDRAM) interface 34, which provides access to external memory 36, which is used to store Received data frame data, memory structure, and MIB counter information. Memory 36 can also be 80, 100, or 120 MHz synchronous DRAM with 2 Mb or 4 Mb memory size ° Switching device 12 also includes management port 30 * This The management port 30 can allow an external management entity to control the overall operation of the switching device 12 through the management MAC interface 32. The switching device 12 also includes a PCI interface 26 to enable access by the management entity through the PCI host and the bridge 28. or The PCI host and the bridge 28 can be used as an expansion streamer for a plurality of switching devices 12. The switching device 12 includes an internal decision engine (Figure 2), which can optionally send data packets received from a data source to At least one destination website. The internal decision engine can be replaced with an external rule checker. The exchange device 12 includes an external rule checker interface (ERCI) 40, which allows the use of external 1 0 -------- II (Please read the precautions on the back before filling this page) * 1T A 7 _ ____B7_ 'V. Description of the invention (11), internal rule checker 42 instead of internal decision engine M decision Data frame transmission. Therefore, an internal decision engine or external rule checker 4 2 can be used to make data frame decisions. The switching device 12 also includes an LED interface 44 that can record the status of each port and drive the LEDs. External logic 46. The LED external logic 46 sequentially drives the LED display unit 48 that can be recognized by the naked eye. The oscillator 38 provides a 40 Mhz clock input for each system function of the switching device 12. Du Yinju, Vice President of the Central Bureau of Standards, Ministry of Economic Affairs (please read the notes on the back before filling out this page) Figure 2 is a block diagram of the integrated multi-port switching device (IMS) 12 in Figure 1. The switching device 12 includes 24 10M \ bps media access control (MAC) ports 50, which are used to send and receive data packets in K half duplex between each 10M \ bps website 14 (埤 1-24), M And two 100M \ bps MAC ports 53 are used to send and receive data packets between each 100M \ bps websites (ports 25 and 26). As mentioned above, the management interface 30 can also operate according to the MAC layer protocol (port 0). Each MAC port 50, 53 and 30 has a receive first-in-first-out (FIFO) buffer 52 and a transmit FIFO 54. The data packets from the website are received by the corresponding MAC port and stored in the corresponding receive FIFO 52. The received data packet is output from the corresponding receiving FIF052 to the external memory interface 34 and stored in the external memory 36. The header of the received packet is also transmitted to the decision engine, and the internal rule checker 58 or the external rule checker interface 40 is used to determine that a MAC port will output the data packet. In particular, the packet header is transmitted to the internal rule checker 58 or the external rule checker interface 40 according to whether the switching device 12 is configured to use the internal rule checker 58 or the external rule checker 42. The internal rule checker 58 or the external rule checker 42 provides decision logic to determine the paper size applicable to the Chinese National Standard (CNS) grid (2 丨 0 X297 mm) 11 91469 A 7, ________B7_ V. Description of the invention (12) 2. Specify the destination MAC port of the given data packet. The decision engine therefore outputs the given data packet to a single port, multiple ports, or all ports (ie, broadcast). For example, (Each data packet includes a header with a source address and a destination

Address, the engine can mark the appropriate output MAC port based on this destination address. Alternatively, the destination address may correspond to a virtual address. When the virtual address corresponds to a plurality of websites, an appropriate decision engine may be used for identification. Alternatively, according to the ΙΕΕΕ802.Id agreement, the received data packet may contain a VLAN (virtual LAN) tag data frame. This IEEE802.Id agreement specifies another network (via a router on one of the 100M \ bps websites22). ) Or specify a group of sites. Therefore, whether it is the internal rule checker 58 or the external rule checker 42, the interface 40 determines whether the data frame temporarily stored in the flush memory 36 will be output to a single MAC port or to multiple MAC ports. The use of the external rule checker 42 has advantages such as increasing capacity, and using random ordering to determine queues. This use of random ordering will allow the data frame to be determined before it is completely stored in external memory. The order is decided independently of the order received by the switching device 12. Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling out this page). Determine the engine (that is, the internal rule checker 5 8 or the external rule checker 42). The way the K port vector indicates each MAC port The transmission decision is output to the switching device subsystem 56. This MAC port will receive data packets. The vector from the rule checker includes the address location of the bank packet stored in the external memory 36, and the MAC port identification. M receives the transmitted data packet (for example, MAC ports 0-26). The switching device sub-system 56 obtains the data packet marked on the port vector from the external memory 36 via the external memory interface 34, and supplies the obtained data packet to the appropriate sending FIFO marked 54. ^ This paper standard applies to China Standard rate (CNS) Λ4 specification (210X 297 mm) 12 9 1469 A7 __B7 _ 'V. Description of the invention (13) Additional interface provides management and control information. For example, the data management interface 59 enables the switching device 12 to exchange control and status information with a switching receiver 16 and a 100M \ bPs entity device 20 in accordance with the management regulations of M I I (E E E 80 2 .3 u). For example, the data management interface 59 outputs a data management clock (MDC) that provides timing references to the bidirectional data management IO (MDIO) signal path. The PC I interface 26 is a 32-bit PCI reprint 2.1 compliant slave interface, which is used by the PCI host processor 28 to access the internal IMS state and configuration register 60, and is used for external memory 36 access. The PCI interface 26 can also be used as an expansion bus for multiple switching devices. The management port 30 is connected to the external MAC engine through a standard 7-wire anti-serial GPS I interface, so that the host controller can reach the switching device 12 through a standard MAC layer protocol. Printed by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economics. Fig. 3 shows a more detailed description of the exchange device sub-system 56 in Fig. 2 according to a preferred embodiment of the present invention. The other components of the multi-port switching device 12 in FIG. 2 are redrawn in FIG. 3. M shows the connection of the switching device sub-system 56 to these other components. The switching device subsystem 56 includes a core switching engine for receiving and transmitting data frames. The main function blocks used to implement the switching engine include: port vector FIFO 70, buffer manager 72, multiple port output queues 74, management port output queues 75, expansion bus port output queues 77, and space space The slot 104, the multi-copy queue 90, the multi-copy fast buffer register 96, and the recycle queue 98. The operation and structure of these functional blocks will be described in more detail, but first, a brief description of the switching device sub-system 56 of FIG. 3 will be provided. K provides the content required for the individual components discussed later. There are two basic types of data frames for the multi-port switching device 12 input from each port. The paper size applies to the Chinese National Standard (C'NS) Λ4 specification (210X297 mm) 91469 (Please read the precautions before filling this page ) 13 A7 ,, __B7 'V. Description of the invention (14): Single copy data frame and multiple copy data frame. The single copy data frame is a data frame sent by the multi-port switching device 12 to a port that has only one other port. Conversely, a multi-copy data frame is a data frame that is input to more than one port and received on one port. In Fig. 3, each port is represented by the sub-MAC 50, and has its own receive FIFO 52 and transmit FIFO 54.

I Whether it is a single copy data frame or a multiple copy data frame, the data frame is received by the internal MAC engine 50. When a data frame packet is received at the port, it is placed in the receiving F I F 0 52. Each data frame has a header and is provided to the internal rule checker 58 or the external rule checker 42. Based on the information in the header, the rule checker 4 2 or 5 8 decides where the data frame packet will be delivered, that is, the data frame packet will be sent from which port or ports. The Central Standards Bureau of the Ministry of Economic Affairs Ηprinted by the consumer cooperative (please read the precautions on the back before filling in this!) When the rule checker 42 or 58 decides to transfer the data from there, the Yuan punch manager 72 is from the space 锾An index of the space buffer is obtained at the slot 104. The empty buffer index is a position in the external memory 36, and the data frame in the memory 36 will be stored in this position by the receiving FIFO 52. Once the free space indicator is obtained by the free space manager 104 from the free space slot 104, the free space indicator indicated by the free space indicator is no longer considered: it is idle. The data in the data frame is processed by direct memory access (DMA), from receiving F I F 0 5 2 to the external memory 36 through the data bus 80. The data frame is stored at the location indicated by the space element punch indicator obtained at the free element slot 104, although many other element punches can be used to store the data frame, as will be described later. In addition to the header information, the rule checker 42 or 58 may also receive an idle element indicator from the buffer manager 72. This idle element indicator is now called the Chinese paper standard (CNS) _Λ4 size \ 210X 297 male f) ~ 14 91469 A7 B7 V. Description of the invention (15) is a data frame indicator because he indicates that At the memory location in the external memory 36, the data frame is stored in the external memory 36. The rule checker 4 2 or 5 8 uses the header information to make a transmission decision, and generates a transmission instruction in the form of an M “port vector”. In the preferred embodiment shown here, the port vector is a 28-bit vector with a bit set for each output frame, and the #M extension base is sent to these output ports. Assume that the data frame received for this example is a single copy data frame. Therefore, only 1 bit is set in the port vector generated by the rule checker 42 or 58. The bit set in the unitary vector corresponds to one of the specific ports. The rule checker 42 or 58 places the port vector and data frame pointer (M and control operating system code and VLAH index) into the port vector FIFO 70. The port vector is checked by the port vector FIFO 70 to determine the specific output queue 7 4 (or queues) in the port vector that matches the data frame index of the vector. The port vector F IF 0 7 0 places the data frame pointer at the upper end of the appropriate output queue 74. This is the transmission of the queued data frame. At the certain time point, the data frame index reached the output queue 74 after passing the output queue 7 4 at some time points. Lower end. When the data frame index reaches the lower end of the output queue 74, the yuan punch manager 72 obtains the data frame index, and transmits the data frame index via the data frame index reading bus 86 to the appropriate sending FIFO 54 of the correction port. . This schedules the procedure for transmitting data frames. The data of the data frame is read by DMA processing from the location of the external memory 36 specified by the data frame index, placed in the appropriate sending FIF0 54 and then sent out. A multi-copy transmission is similar to a single-copy transmission except that the port vector has multiple bytes, and specifies that multiple frames of the data frame will be transmitted. The data frame indicators are set on each paper scale and apply the Chinese national standard ((: NS) Λ4 specification (210X 297 mm) 15 9 14 6 9 A7, B7 'V. Description of the invention (16) Appropriate output queue 74, and Send from the corresponding transmit FIFO 54. The buffer manager 72 uses a special control queue, namely the space buffer slot 1 0 4 ^ multi-copy queue 9 0, recycle queue 9 8 and multi-copy fast burst The register 96 is used to manage the processing of the allocation buffer that stores the received data frame, and the management of the recovery buffer that is used once the data frame has been transferred to his designated output port. The storage buffer manager 72 is also used at The external memory 36 maintains an "overflow" area for output queue 7, 4, control queue 1, 104, 90, and 98, which will be described in detail later. This operation overview armpit background The rules will discuss in detail the various sections and characteristics of the switching device sub-system 56. The first feature to be explained is the structure of the various output queues 74 of the present invention. In addition to the output queue 74, 10Mb / In addition to s output port and 100Mb / s output port, output queue 75 is provided with management port 30 , And output queue 77 is provided with expansion port 26. These output queues 75, 77 have the same external structure as output queue 74, but have different internal structures, which will be described. Consumption Cooperative Yinzi Figure 4 is a block diagram of the external structure of the output queue 74 according to the real example of the present invention. It is obvious from Figure 4 that the output queue 74 of the present invention has a three-part structure. For the best performance, it is best to keep all the queue structures on the chip (refer to the multi-port switching device 12), but occupying an area on the chip is very expensive. When the chip design is completed (replacement of the device is required) It also needs a large number of input data, which becomes a dilemma. The present invention is designed on the wafer with a single output queue containing high-performance, low-capacity sections, and provides an overflow area outside the wafer. The dilemma is solved. When needed, the overflow area can be queued as a large-capacity queue, although this paper size applies the Chinese national standard (0'15) 6-4 specifications (210 'dog 297 male). 91469 (Please read first Note on the back page, please fill in this page again) 16 A 7, B7 'V. Description of the invention (17) Compared with the upper part of the wafer, it has relatively lower performance. According to the cell example in Figure 4, the invention is single The logical output queue 74 has three physical parts. The three physical parts are the output queue writing side 7 6, the output queue reading side 7 8, and the output queue overflow area located in the external memory 36. (Generally designated as 110). As explained previously, for all output queues 74, the external memory interface 34 is accessed to the external memory 36 via the external memory interface 34. The present invention has a bursting of current external memory The advantage of this method is that the data (such as the data frame index) is sent to the chip via the bus 8 4 Μ group connecting the chip 12 and the external memory 36 to the overflow queue 1 1 〇 . The output queue writing side 76 and the output queue pickup side 7 8 are located on the wafer 12. The writing side 76 and the picking side 78 are considered to be small because the area on the wafer is a very expensive resource. In contrast, the overflow area 110 forming the third part of the output queue 74 is made large because it is not expensive. The write side 76 and the read side 78 have high performance, while the path through the overflow area provides a low-performance, large-capacity path. (Fill in this page) In operation, the output queue writing side 76 receives input data. In a typical implementation example of the multi-port switching device 12 according to the present invention, the input data is a data frame index indicating the first element in the external memory and the first 2 56 bytes of the data frame. Stored in this external memory. However, it is clear that these technology output queue structures 7 4 in this technique are not limited to using only data frame indicators as input data, but can be widely applied to other multi-port switching devices and other technologies. Type input data queue 0 The paper size is suitable for the national standard of China (CNS> Λ4 specification (210 × 297 mm) '17 91469 A 7, B7' V. Description of the invention (18) Input data input and reach the output queue After writing to the bottom of the side 76, the control logic of the output queue 74 in cooperation with the auxiliary i determines what the input data will do. If there is space on the output side bl fetch side 78, and the overflow area 110 for the output queue 74 is If it is empty, one or more input data is directly transferred from the output queue writing side 76 to the output queue reading side. This input data or input data directly transferred from the writing side 76 to the reading side 78 is all It is implemented on the chip 12, and therefore the input data has a low waiting time and can flow quickly. If the output queue read side 78 is full, and there is at least one group on the output queue write side 7 6 The amount of data (such as 16 bits) Input data of the group value), then the data is written in groups to the overflow area 11 0 of the output queue 7 4. If the output queue read side 7 8 is full, but written in the output queue Side 7 6 does not yet have a group size data amount, the input data will remain on the output queue writing side without further processing. Finally, the output queue reading side 78 will be empty, and when the output queue reads The fetching side 78 has enough space to accommodate the amount of data of the group size. When M and data are in the overflow area 110, the grouped data is provided from the overflow area 110 into the output queue reading side 78. 钟Employees' Cooperatives of the Central Bureau of Standards of the People's Republic of China (please read the notes on the back before filling out this page) on the output queue structure, the side 7 8 acts much like the conventional queue, because it is obtained from the input The data part is obtained one by one. The output queue writing side 76 is almost used as a selection function to group data into groups. \ Group data is used to write to the external memory 36. Therefore, the present invention will Events (put input data into output queue 74) into groups Event. If necessary, the writing side 76 allows the data to be accumulated and then sent out in a group, reaching the overflow area of the external memory 36. The overflow area 1 1 0 provides cheap paper standards applicable to Chinese national standards (CNS ) Λ4 specification (210X 297 mm) 18 91469 A7 _, __B7_ V. Description of the invention (19) Storage can be crowded several times, and only relatively little use is needed, 'no expensive chip resources are used. Even this The invention uses the overflow area 110 outside the chip, and this area 110 can also be accessed by an effective method of sending many bytes of information in a group. This method is compared with the known queue structure, which is known The row structure is to write a single input data to the queue and retrieve from the queue. During operation, if a lot of input data reaches the output queue 74, these input data will be put into the overflow area of 1 10M to avoid the 7 8 overflow on the chip. Therefore, the queue structure of the present invention can greatly prevent discarding the data frame. In addition, the total number of memories dedicated to the overflow area 110 can be easily changed by changing the size of the external memory 36. In addition, the size of the individual specific overflow area 1 1 0 can be planned to meet the customer's queue size needs, without shrinking the performance of the output queue 74. Printed by the Consumers' Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs (please read the notes on the back before filling out this page). Generally speaking, it is listed as the structure of the FIFO order. However, in some types of queues, such as the recycle queue 98 and the empty Yueyuan slot 104, it has nothing to do with the order of input data. If possible, the data is sent directly from the writing side 100 to the capturing side 102. The present invention allows information to be transmitted directly from this path, and the queue is sent to the overflow area by bypass. Even if there is information in the relevant overflow area, as long as the information is not sensitive to the order, this can be allowed. For example, the recovered yuan punch is not sensitive to the order. (Because for any order, the Yu yuan punch no longer needs to store the receivable data frame, the buffer will eventually return to the free slot 1 0 4 in the free column. Therefore, if the reading side 102 has room to accommodate the input data, in order to avoid when the data is not sensitive to the order, the recycling queue 98 in the external memory 36 caused by writing into the paper size applies China National Standards (CNS) (210X 297 ^ 1 :) '19 91469 A7 B7 V. Description of the invention (20) The bandwidth to the overflow area 110 conflicts, and the information can be transmitted directly from the writing side 100. Go to the reading side 102. The recovery queue 9 8 is an example of a queue type that queues the data. It is not sensitive to the order. However, there are many other types of data for different applications. It is not sensitive, so that this feature of the present invention can be used in these queues, which can queue other types of data. The multiple exchanges of the present invention shown in Figures 1 and 2 A typical example of a device with 28 output queues ( With one output port): 24 user ports for 10Mb / s, 2 user ports for 100Mb / s, 1 for management port, and 1 for expansion bus port. When the data frame indicator While the queue is waiting for transmission, the output queues 74, 75, and 77 provide temporary storage for it. The queue uses the form of port vector FIFO 70 to write data frame indicators to the various output queues indicated by the transmission port 74, 75 and 77. Printed by the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperatives (please read the precautions before filling out this page). In some specific preferred embodiments of the present invention, various output queues 74, 75, and 77 contain several or all of the following bits: single-copy bits, data frame indicators, control codes or control signals, and VLAN (virtual area network) indexes. Single-copy bits are sent to only one output The data frame of the port is marked. The data frame pointer points to the data frame located in the external memory 36. The control operation code confirms the special information about the data frame (for example, the latest obtained data frame, etc.). The control signal uses the control operation code & lt The message means How this data frame will be processed before transmission. The VLAN index provides a reference for the VLAN tags that will be inserted into the output data frame (if necessary). However, these bits are only examples, when the invention is applied to other output queues , This paper has a different type of position. This paper size is applicable to the Chinese National Standard (CNS) Λ4 grid (2 丨 0 X 297 gong) 20 91469 Printed by the Central Standards Bureau Off-line Consumer Cooperatives A7, __ ^ _B7_ _. V. Description of the Invention (21) Figure 5 shows the internal structure of the first example of the embodiment of the output queue 74, 10 M / bps port output queue. The 10 M / bps output queue 7 4 is used to keep j input data in the data frame of port 10 M / b p s. In the example of the embodiment for explanation, the output queue writing side 76 holds 32 input data for these queues, and the output queue capture side 78 holds 16 input data, although other sizes It is contemplated and within the scope of the present invention. Each input data in the 10 M / bps output queue 74 contains a single copy bit and a data frame indicator (14 bits). In the example of the multi-port switching embodiment of the present invention, no VLAN index is required, so there is no VLAH tag in the 10 M / bps port. Fig. 6 shows the internal structure of the second embodiment of the output queue 74, 100 M / bps port output queue. The 100 M / bps output is listed as a data frame that will be sent to the 100 M / b s port to hold input data. The output queue writing side 76 holds 64 input data for this type of output queue, and the output queue reading side 78 holds 16 input data. Each input contains a VLAN index, part of the control operation code (bits 4-0), a single copy bit, and a data frame indicator. FIG. 7 is a diagram showing an example correspondence of the external memory 36. For example, the total capacity of the external memory 36 may be 4Mb, although other capacities of memory may be used in different embodiments. According to the present invention, the application of the external memory 36 to the overflow area can increase or decrease the output queue size by simply changing the external memory. When the wafer is manufactured, all sorting capacities are set, and M allows the queue structure to be all located on the wafer, which is an advantage of the entire system. This paper size is applicable to Chinese National Standard (rNS) 8-4 test (210X 297 cm) _ ~~ 21 91469 (Please read the precautions on the back before filling this page) Booklet A 7, __B7_ 'V. Description of the invention (22 ) In order to meet the storage requirements of the swap device 12, an example of an embodiment of the external memory 36 is to allocate space in the following areas: space element overflow slot 120, recycling queue access position 1 2 2, multiple copy queue overflow position 1 2 4 , Management port output queue overflow 126, Independent output queue overflow for each 10 M / bps and 100M / bps purpose 1 2 8, Expansion bus output queue overflow 1 130, Μ IB Counter 1 3 2 and overall data frame Yuan slot 1 1 4. There are 60 memory registers on the chip. B A S Ε address register The BASE address for all memory areas in the register is programmable. The BASE address of each area in the external memory map is programmable in the register settings. No length register is needed because the length of the designated area is equal to the area from the BASE address of this area to the BASE address of the next area on the corresponding map. Because the length of each independent overflow area (that is, its capacity) is programmable, the total capacity of each queue can also be regulated. This feature of the invention allows the exchange of customized K to provide a special output queue that can increase capacity as needed. The following overflow areas for storing input data that are not suitable to be placed in the control queue on the crystal unit 12 are placed in the external memory 36. The space buffer is printed by the Consumer Standards Cooperative of the Central Bureau of Standards (please read the note on the back first # Fill this page) Slot overflow bit 120 stores the currently unused address indicators in the overall data frame Yuan slot 1 3 4 . The recycle queue overflow 1 2 2 stores the data frame indicators of the linked series that are no longer needed. Multi-copy queue overflow 1 2 4 Number of stored copies "> = 1" (for sorting data frame indicators) The data frame indicator and number of copies are "-1" (for successful data frames) Box indicators. The following overflow areas are input queues that store input data that is not suitable for placement on the chip. Management port output queue overflow area 1 2 6 Storage waiting to be transmitted to management This paper size applies Chinese National Standard (CNS) Λ4 specification (210X 297 mm) 22 91469 A7 B7 V. Description of invention (23) Data frame of port index. The output queue overflow area 1 2 8 stores data frame indicators waiting to be transferred to the appropriate 10 M / bps port or 100 M / bps port. Expansion bus output queue overflow 130 stores data frame indicators waiting to be transmitted to the expansion bus. The MIB counter 132 contains all statistical data for each communication port, which is regularly updated by the switching device 12. The swap device 12 includes 8-bit and 16-bit counters on the chip for storing * MIB statistics. The switching device 12 updates the 32-bit or 64-bit MIB counter in the external memory 36, which is updated without the frequency necessary for the MIB data to be lost. The overall data frame element slot 134 includes a yuan punch for storing the received data frame data in the link string. At any time, these linked strings have valid data frame data and discarded buffers. The discarded yuan punches will be returned by the buffer manager 7 2 to the idle yuan slots 1 0 4 or by the PCI main processor. 28 owned. Printed by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the notes on the back before filling this page). Now refer to Figure 8. In the example of the embodiment of the present invention, it is received from any MAC port or PCI bus. The data frame data is a K-link serial data structure format stored in the external memory 36. The length of the elementary punch 140 used to generate the concatenated string is 256 bytes, although elements of other lengths are used in different embodiments of the present invention. The address pointer to each buffer 140 is stored by a free buffer slot 104 in the switching device 12. When a data frame is received in one of the ports of the switching device 12, the buffer manager 72 requests the address of the linked element punch 140 from the free element slot 104 to store this data frame. Point to the external memory 3 6 to store the data frame of the first element of the index indicator into the data frame index of the data frame. Apply this paper size to Chinese national standard. (CNS> Λ4 specification (210X 297 mm) 2 3 9 1469 Μ Β7 Printed by the Consumers ’Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (24) 1 I Data frame The indicator is used to exchange the row 1 1 I in the secondary system 56 as the data frame to be transmitted. The sequence is 0 1 1 1 by 'for each bit used to indicate the position of the next buffer in the memory πΆ! 冲 y— ^ 1 I Please 1 I The device index in the header 1 4 2 binds the yuan punch 1 40 m together. The element is read first 1 I read 1 I header 1 4 2 contains other relevant yuan punches The data hub contained in the device 1 40: the information back 1¾ 1 1 of the information 0. The header of the first element punch is 12 bytes, as shown in Figure 9a. Example Header Format 〇 The heading term of each elementary punch is then 1 p is 4 bytes, as shown in Figure 9b. The internal memory group is 2 sets of X 16 Ming · Writing book, 1 byte leader, so the actual data frame storage capacity in each element is 1 2 5 6 B -1 6B = 2 4 0 Β 1 1 As described in Figures 9a and 9b, the first and second element header format 1 1 contains the following bit order. 1 element punch format bit indicates which type of punch format is being used. 1 1 I indicates the first buffer format, whose length is 12 bytes. 0 indicates the sub-punch 1 I format, whose length is 4 bytes. 0 When the elementary punch is connected, it is used for the remaining 锾 (J; 1 E bit (end of data frame) This is the last 11 buffers of the data frame. When the E bit is set, it means that there is no buffer in the link 1 1 device 0 1 1 C bit (CRC error detection) Shows the receiving end, C RC error has been detected 1 I 0 When C bit is detected The transmission function will intentionally transmit the reverse CRC 0 1 IL bit (alignment error): Shows that data was detected in the receive data frame 1 1 1 Frame alignment error (and CRC error) > 1 1 0 bit (receive FIF 0 overflow at the end): Shows that the receiving end FIF 0 has overflowed, and 1 1 2 4 This paper size is applicable to China's national standard (CNS) Λ4 is present (2 丨 〇297mm) 91469 A 7, B7 V. Invention Explanation. (2 5) The information in Yuan Yuan's punch may be invalid. Yuan punch length: The total number of valid bytes starting from the first check byte after the Yuan punch header in the data field of the punch punch. This length does not include the value of the bit shift tuple. Next buffer indicator: An indicator pointing to the next yuan punch. After the E bit is set, the next yuan indicator is invalid. Bit-shifted byte counter: The first byte of the displayed data frame starts from the data frame data area of the elementary buffer. 〇The displacement indicates that the data will start from the first byte after the header 142. 〇The displacement indicates that the data frame data will start from the byte immediately after the 16th byte in the buffer. A shift value other than 0 indicates that the data frame data will start from the beginning of the yuan punch immediately after the 16th byte + the offset. The transfer function will skip the number of bytes indicated by the shift byte. Printed by Dibei Central Bureau of Peugeot Consumer Cooperative (please read the precautions on the back before filling this page) P bit (communication port type): Displays the type of communication port that receives the input data frame. 0 means a 10 M / bps communication port and 1 means a 100 M / bps communication port. This bit is used by the host 28 and the time stamp 櫊 when the data exchange device 12 transmits the data frame to the expansion bus before the data frame is completely received and flushed to the external memory 36. T bit: indicates the form of the data frame received by the device: marked or unmarked. 1 indicates that there is a tagged data frame and the VLAN tag word bit contains the receiving VLAN ID. 0 means no tag data frame and VLAN ID is invalid. Number of receiving ports: The number of ports from which data frames can be received. VLAN tag: The VLAN ID received from the tagged port. If the data frame is received from the untagged port, this bit is invalid. This paper size is applicable to the Chinese National Standards (rNS) Λ4 grid (210X 297 mm) 25 9 1469 A 7, B7 'V. Description of the invention (26) R bit (recalculated CRC): indicates that the transmission function is required Renounced and recalculated CRC. This bit is set by the switching device 12 when a tagged data frame is received. In addition, if the host 28 corrects the content of the data frame, the host 28 will set this bit. When the switching device 12 transmits a data frame, it checks this bit M and decides to transmit the existing CRC or discards and recalculates the CRC. Α bit (with additional C R C): indicates that there is no C R C ° at the end of the data frame. The host can generate a data frame (no CRC) in the memory, and then set this bit. When transmitting a data frame, the switching device 12 generates and appends a CRC. If bit A is set, the data frame length will not include the CRC. F bit (format bit): indicates the position of the data frame length / time stamp. 0 means this bit is the time stamp of the input data frame. 1 indicates that this field is the length of the data frame received. Yinzi, a Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the notes on the back before filling this page) Data frame length / time stamp: determined by F bit. If the F bit is cleared, this field indicates the time stamp from the time the data frame was received. The resolution of this time stamp is lus. If the F bit is set, the total length of the data frame received contains the CRC and any received VLAN tags. When the data frame is received, the switching device 12M time stamp (from the timer register) marks this position. If the host 2 8 has planned the switching device 1 2 to transmit the expansion bus data frame before the data frame is completely received, it uses this time stamp (and the receiving port speed) to determine how much data can be sent from the external memory 36 without Read too much data frame data. Once the entire data frame has been received, the exchange device 12 writes the data frame length into this field and sets the F bit. Number of copies: used to indicate the number of copies successfully sorted by the port vector FIFO 70 for transmission. If Yuan Punch Manager 7 2 needs to be used in multi-copy fast Yuan Punch paper size, the Chinese national standard (rNS) Λ4 specification (210X 297 mm) 26 9 1469 A 7,, __B7_ V. Description of the invention (27) Storage When space is created in the device 96 for new input data, this bit is used to store the number of copies of the data frame pointer. Printed by the Central Standards Bureau of the Ministry of Economic Affairs, Consumer Cooperatives (please read the precautions on the back, and then fill out this page) Figure i 0 is a detailed illustration of some components of the exchange system 5 6 in Figure 3. These components are used to provide data frame storage devices, and to recover these data storage devices, and to make them available again when they are no longer used to store data frames. As described previously, each output queue 74, 75 (except output queue 77) transmits a data frame indicator to the buffer manager 72, which is a predetermined transmission time of the data frame indicated by the data frame indicator. The buffer manager 72 controls the following functions: 1) manages the internal buses of the switching device 12; 2) assists in sorting / unordering the data frame indexes of the output queue 7 4; 3) management control queue 9 0, 9 8 in order to find the yuan punch and return the empty reading yuan slot 104; 4) control the flow of data to and from the external memory 36; and 5) maintain the memory structure, including MIBs and overflow areas. The buffer manager 72 contains scheduling functions for configuring all accesses to the external memory 36. These accesses include: 1) writing the received data frame data to the memory buffer 140, 2) reading the data frame data for transmission from the memory buffer 140, and 3) outputting the queue 7 4 And control queues 9 0, 9 8 maintain (for example, write and read) data frame indicators in each overflow area, and 4) update the MIB counter. After the yuan punch manager 7 2 copies the given data frame index to all appropriate output queues 7 4 and 7 5, the port vector F ΙΨ 0 7 0 calculates the number of copies (number of copies) and the data frame index The number of copies is placed on the writing side of the multiple copy queue 9 0 9 2. The number of copies "0" indicates that this data frame has not been transmitted, "1" indicates a single copy transmission, or "> 1" indicates a multi-copy transmission. These three examples are described below. 9 1469 27 This paper is suitable for China National Standards (CNS) Λ4 specification (210X 297 gong) ~~ Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7-__B7_ V. Description of the invention (28) When the number of copies is "0 ", It means that the data frame index has an empty transmission port vector without any bit setting, and the vector vector FIFO 70 directly sends the data frame index to the writing side of the receiving queue 9 8 1 0 0. When the Yuan Punch Manager 72 is used as the recovery queue 98, it will be described later. The Yuan Punch Manager 72 breaks the link of the Yuan Punch device and points to each "space". The address index of the punch is sent back to the write side 106 of the free slot 104. When the number of copies is "1", for single copy transmission, the port vector F I F 0 7 0 copies the data frame index, control signal / control operation system code, and V L A N index to the output queue 74 of the appropriate communication port. The single copy bit K of the vector FIFO 70 set in the output queue 74 (refer to Figs. 5 and 6) indicates that this is a single transmission. When the yuan punch manager 72 reads the data frame pointer and the single copy bit from the output queue 74 of this port, it is the predetermined transmission time as previously discussed.冲 The punch manager 72 uses the data frame pointer to find the first buffer that stores the data frame in the external memory 36. The buffer manager 72 fetches the data frame index from this first elementary puncher, obtains the data from the first elementary puncher, and puts this information in the appropriate MAC transmission FIFO 54. Assuming that this data frame spans multiple buffers, the key element manager 72 is provided for the key element of the elementary element to find M and transmit the addresses of all elementary elements used in this key element in the key element. Once the data has been placed in the FIFO 54 for transmission, the element buffer becomes idle and is returned to the free buffer slot 104K, and then it is designated to store another frame of data. When the number of copies is greater than 1, the port vector FIFO 70 copies the data frame index, the V L A N index, and the control signal / control operation code to each appropriate output queue 74. (When referring to output queues 74, it means that queues 75 and 77 are also referenced). Port vector FIFO 70 is the appropriate resource in output queue 74 (Please read the notes on the back before filling this page)

This paper size applies to the Chinese National Standard (CNS) Λ4 specification (210X297 mm) 28 9 1469 A7 B7 Bei Gong Xiao Cooperative Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs f Cooperative Cooperative Printing 5. Description of the invention (29) Copy bit, and put the data frame 1 I with the number of copies "> 1" into the multi-copy queue 90 on the write side of 92 0 \ 1 I each; when the yuan punch manager 72 outputs the queue 74 One reads the data frame refers to // --- > When 1 1 1 is marked and the single copy bit is cleared, the yuan punch manager 7 2 schedules this data frame for reading 1 1 transmission time, while checking the multi-copy fast yuan The 1 1 index on the back of the data frame in the punch memory 96 has the input data with the number of copies "1". If you notice 1 in the multi-copy fast fast note 1 | Event 1 There is a data frame index with the number of copies in the punch memory 96. ; 1 ", then fill in the red element 1 © Manager 72M The same way as the single copy data frame transmission Means a predetermined time transmission and recovery of these red Yuan transmission period in between. However, if the data frame index is not in the multi-copy fast buffer memory 96 or the number of copies of the data frame index in the multi-copy fast 1 1 buffer memory 96 is greater than 1, then the yuan punch Tube 1 1 and 1 processor 72 transmit this data frame but do not recycle this element. After the transfer is successful, the buffer manager 7 2 puts the copy of the data frame indicator and the number of "-1" copies into the 1 1 multi-copy queue 90. Writer side 92 0 1 1 After each multi-copy data frame transfer Yuan Yuan punch manager 72 puts a copy of the data Φ, frame index into multi-copy queue 90, Yuan Yuan punch manager 7 2 has not sent the data frame in 1 I multi-copy cache buffer 96 The indicator provides the sub 1 1 number "1". Therefore, at any time »multi-copy queue 90 contains a data frame indicator with a copy 1 1 number > " 1 " and several copies of the same data frame indicator. For -1 〇1 1 the primary buffer manager 72 continuously serves the multi-copy queue 90 and the multi-copy cache 1 | cache memory 96 so that free buffers can be reclaimed. When it serves multiple 1 I queues 90 and reaches a data frame indicator with the number of copies > " 1 ", the buffer tube 1 1 I processor 7 2 attempts to add new input data (data frame Index and number of copies) put in more than 1 1 This paper size is applicable to the side (called M specifications⑺ ™ Chu) 91469 A 7, B7 V. Description of the invention (30) The copy quick punch storage 9 6. If the multi-copy fast flash storage 96 is full, the flash storage manager 72 finds space for the new data frame index. Yuan Yuan tube S 7 2 take "old" multi-copy quick input data, for this input data update its copy number in the external memory 3 6 Yuan Yuan punch header, and then from the multi-copy quick Yuan punch The memory 96 clears the input data. When the space of the multi-copy cache 96 becomes available, the yuan punch manager 72 may put new input data from the multi-copy queue 90 into the multi-copy cache 96. Dangyuan punch manager 7 2 serves multiple replica queues 9 0 and reads a data frame index with the number of replicas "-1", it searches for multi-copy fast yuan punch storage 9 6 to find and copy number "> = 1 "matching data frame pointer address so that it can be reduced or deleted. If the buffer manager 7 2 finds a matching data frame index, the yuan punch manager 7 2 will: 1) if the number of copies "> 1" * then reduce the data frame index of the multi-copy fast yuan punch storage by 1 ; Or 2) If the number of copies is "1", delete the data frame index / copy number input data of the multi-copy fast memory storage and delete the data frame index into the recovery queue 98. ί; Yin Fan, Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the notes on the back before filling this page). If Yuan Punch Manager 72 does not find a matching data frame indicator, then Punch Manager 72 A header header for the data frame index in the external memory 36 (refer to 9_) for the number of copies. If the number of copies in the memory is "1", the Yuan punch manager 7 2 will enter the data frame index into the recovery queue 9 8 ° If the number of copies in the memory is "> 1", buffer The manager 7 2 puts the data frame index into the multi-copy fast memory 9 6 together with the number of copies, and then reduces the number of copies. Yuan Chong Manager 72 2 continuously reads the data frame indicators to read back the paper size. Applicable to Chinese national standards. (('NS) M specification (210X 297 cm) " 30 91469 A7 B7 V. Invention Explanation (31) Close the sequence 9 8, and then move the link string K to send the element punch back to the space buffer slot 104. The element punch returned by this action is used to have a free port vector and borrow ' The port vector FIF 0 7 0 sorts it and sends it to the data frame of the recycle queue, or the data frame with multiple copy transmission vectors and all copies have been transmitted. As described above, when the data frame is transmitted, it is used for single The copy of the data link in the copy box is directly returned to the free buffer slot 104. Printed by Fangong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling this page). If the port vector FIFO 70 is because When the output queue 74 and its overflow area 1 1 0 in the external memory 36 are full, it is impossible to put the data frame pointer for the single copy transfer vector into the output queue 74, and then the data frame is discarded. . Then the data frame indicator returned to the recovery queue 98 and was abandoned The data frame is annotated by the resource management of the switching device. If the port vector FIF0 70 is full because one or more output queues 74 and its overflow area 110 in the external memory 36 are full, it cannot be placed for multi-copy transmission When one or more information frame indicators of the vector are sent, only the data frame with space is sent to the output queue, and the number of copies placed in the multi-copy queue 90 will only reflect the data frame indicators that have been successfully placed. The data frame index is filled by each exchange dock by the resource management of the exchange, so this data frame index will not be sorted. If the port vector FIFO 70 has all the output queues 74 and its overflow in the external memory 36 When the area 110 is full and cannot place any data frame indicators for the multi-copy transmission vector, the data frame indicators are transferred to the recycle queue 9 8 and the exchange's resource management is notified in a timely manner. The multi-copy queue 9 0 is High priority queue, Yuan punch manager 7 2 uses its continuous tracking to complete a certain number of specific times before all buffers (ie, address indicators) used to store data frames return to the idle Yuan slot 1 0 4 Multiple copies The paper size of the frame is applicable to the Chinese national standard (CNS> Λ4 specification (210X297 mm) 3 1 91469 A7 B7 V. Description of invention (32) Transmission. The writing side 92 and yield side 94 of this output queue are held separately 64 and 16 entries. The multi-copy queue 90 provides multiple copies of the current cache memory 96 used by the buffer manager 72 to determine when to recycle the buffer. The internal structure of the multi-copy queue Shown in Figure 12. Port vector FIFO 70 places the data frame index and the "> 1" number of copies into the multiple copy queue 9 based on the number of data frame indicators that have been successfully placed in the output queue 74. 0. If the output queue 7 4 of a particular port is full, the port vector F I F 0 7 0 cannot put a copy of the data frame index into the output queue 7 4; therefore it cannot be included in the success event that determines the number of copies. Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling this page) Each time the punch manager 7 2 reads the output queue data frame indicators and finds that its single copy bit is "0 ”(That is, multiple copies), then check whether the multi-copy cache has a data frame indicator with the number of copies“ 1 ”, which indicates that this is the last transfer. If there are those who meet the conditions, the Yuan Punch Manager 7 2 transmits the data frame and in the same way as the single copy transmission, after transmitting the contents of each Punch Punch, by providing the space Punch Punch to the idle Yuan Yuan trough 104 and Yuan Yuan punch are recovered. If no eligible person is found, the Yuan Chong manager 72 transmits a multi-copy data frame and puts the copy with the data frame index of "-1" into the multi-copy queue 9 0. When the host has finished using the multi-replication data frames that are arranged to the expansion bus output queue 7 5 or the management port output queue 7 7 (via the PCI interface 26), the host will have the number of copies as A copy of the data frame index of “-1” is written into the multiple copy queue via the data frame index register. This register is one of the registers described in block 60 of the register in Figure 2. Same as the output queue 74, the multi-copy queue 90 is constructed to have one output paper size applicable to Chinese national standards ((: NS) Λ4 specification (210X 297 mm) 32 91469 A7 B7 staff consumption of the Central Bureau of Standards, Ministry of Economic Affairs Cooperative printed 5. Description of the invention (3 3) An input path and an output path. The input path, or write side, allows the port vector FIFO 7 0 and the yuan punch management to put the data frame index / copy number into multiple copies: 伫Column 90 1. The output path, or read side, allows multiple copies of queue 90 to put the data frame index / copy number into the multi-copy fast memory bank 9 6. It is provided in the external memory HiL 36 for Data frame index / copy number additional storage for multiple copy queue overflow 12 4 When the data frame index / copy number is written to an empty multiple copy queue 90, it is transferred from the write side 92 to the read side 94 Until the reading side 94 is full. Put other written multi-copy queues 90 writing side 9 2 data frame index / copy number into external memory 3 The multi-copy queue overflow area 1 2 4 of 6. Once the read side 9 4 of the multi-copy queue 90 and its overflow area 12 4 are full, the other data frame indicators placed in the multi-copy queue / The number of copies starts to fill the writing side 9 2. The order of the data frame index transmission through the multiple copy queue 90 is fixed. If the space on the read side 94 of the multiple copy queue is cleared, the data frame index / The number of copies is moved from the multi-copy queue overflow area 1 24 to the multi-copy queue read side 94, and from the multi-copy queue write side 92 to the multi-copy queue overflow area 124 0 multi-copy fast buffer memory 96 and Multi-copy queue 9 is similar, except that it provides a searchable area for scanning data frame indicators / number of copies. The multi-copy fast memory 96 holds up to 2 5 6 input data. Buffer manager 72 from multiple copies Queue 90 takes the data frame index and decides whether to put it in the multi-copy cache memory 96 or process based on (whether the number of copies is> 1 or -1) Each time the yuan punch manager 72 fetches the data frame index from the reading side 78 of the output queue 74, the yuan punch manager 72 schedules the transmission time. This paper size applies the Chinese national standard date (CNS) Λ4 specification. (210X297) 嫠 Q 1 4 R «η Read the precautions on the back first-fill out this page V. Description of the invention (34 A7 B7 tube" device Γ Crush as a deferred} Duo 96 is a device that saves the intention to ignite Γ Yuan f. The speed is a fast element. The secondary specimen is a multi-finger pair in the 'box list 72 materials such as'. This table shows that the removal of 2 7 311 administrators is in accordance with the requirements of the return to the completion of the rush and the delay of 72 arranging the tube slot between the arsenal 0 and the air transport of the circulator. If the input and output match, it is not fake. It is the number of deputies of Gantian who has the input of the index frame material. The index frame material is obtained by borrowing 2 7 devices. Multi-period in fixed bidding 8 Yuan Yuanzi And this works two. The reason is nowhere to lose or pass 6 -9 of the container box. Storage materials. Reserve funds. Rush and Yuanxing. Fast forward. Fast work. Putian. ΐ ο put 9 the list of readers with the specified frame materials ο management "tube-1 device" red or Yuan 1 "according to" > It is a number of issued books The speed of the storage of the secondary finger frame and the storage of funds are quickly reduced. 9 9 田田 列 多 伫 In this case, there are many deputies. From 1 '' 2 > 7 '' Punching tool yuan standard 1i must be deputy K 2 more 7 if the device is false 0 pipe material is flushed into the yuan r, a new one into 9 — write F U. deposit, the storage room is empty 96 yuan speed The fast full is the finished work. Within the space 6 9 memory storage 8. Yuan Lin quickly clear (please read the precautions on the back before filling this page) Printed by the Central Standards Bureau of the Ministry of Economic Affairs The old one can be used to get the 6 9 device storage sample Yuan Kuaimoto, and the deputy will be stored by borrowing a number of deputy units. Β Biaoyuan finger speed frame Kusada Hita has a 6 6 body memory. Yuan's index of the number of deputies in the storage of the deputy will be fast and will soon be deputy, and more new year. The divider stores ^ 0. Yuan teE, the quick copy of the material input and input space, the new device 96, the new memory will be used to store the copy, and how quickly can you write several copies of the nj 畐 / index finger box. The paper size of the device is applicable to the Chinese National Standards (CNS) Λ4 specification (210X 297 mm) 34 91469 A7 B7 V. Description of the invention (35) 2) Yuan punch manager 7 2 is listed in 9 copies from multiple copies Read data frame means

1X I device ”The number of the tube is the same as the tube of the device. You can find and search the number of 96. The tube of the device is stored in the storage box. According to the rules of the pipe, the device is matched with the red tape. According to the 96, it is the speed of the red tape. The speed of this example is two. Manager 9 Yuan, Deputy Yuan's fast material, fast capital, and vice versa. 6 2 9 7 Machine storage, storage, storage, tube buffering, speed, and speed. I 1 畐 ”is mostly the same as the fake material. The storage of the feeder box feeder will save the deposit and the yuan will be removed quickly and the material will be imported as soon as it is paid. 1 Lose 98 ”> is listed as the number of deposits, deposits, deposits, and returns to the deputy. It manages 0, then decrements, deputies, and deputies. 6 9, storage, storage, and depletion. It organizer donates and meets the meaning of this. The pieces of the frame material are matched to find the rushed 36 'slow body. Recall that the head of the superscript device has been linked to Chong Yiyuan. Marking refers to the frame and bill of materials that are linked to the materials and funds (please read the precautions on the back before filling out this page). "謓 则 中" head Γ is labeled as 丨 δ Yuan to be required to be equal to 72. This principle is like a tube. Zhongli Memorandum 8 9 column 伫 frame received material back into the index finger material in the material body this memory will be recorded 72, in the device} c management device Yuan value then this is assumed to be the management tube 3 device body Chong Yiyuan remembers that the parts of the frame will be stored externally. 0. 媛 元本 速 Hu h ^ l 0 iron / deputy multi-input put deputy deputy anu Hita will be 6 9 擢 擢 媛 I逋 Quick copy 畐 If the paper size is applicable to the Chinese National Standard (CNS) Λ4 specification (210X 297 mm) 35 91469 A 7, '________B7 V. Description of the invention (36) Storage 96 is full, then Yuan Chong The manager manager 72 clears the space by moving one of the old resource box indicators / copy numbers into the external memory f 3 6. The recycle queue 98 holds pointers to data frames that are no longer needed in the linked serial link. Yuan Chong Manager 72, when serving the multi-copy fast buffer storage and found that the number of copies of the data frame index is "1" (that is, the last transmission of this data frame has been successfully completed), it writes this data frame index to the recycler Queue 9δ. In addition, the port vector FIF0 70 writes the data frame pointer to the recycle queue 98 in the following cases: 1) the communication port vector of the data frame pointer is empty, or 2) the data frame pointer is output by all transmission vectors. The columns are full and cannot be sorted. Finally, when the host completes the single copy data frame by entering the expansion bus output queue 7 7 or the management port output queue 7 5, the data frame indicator is written to the recycle queue 98 (using the data frame indicator register) ). Printed by the Consumer Standards Cooperative of the Central Bureau of Standards (please read the precautions on the back before filling out this page). When the Yuan Punch Manager 7 2 processes the recycle queue input data, its guide data frame indicators link to the serial chain. The knot sends each buffer back to the spatial buffer slot 104. The internal structure of the recycling queue will not be explained, but only the data frame index (14 bits) is included in the example of the embodiment of the present invention. The recycle queue writing side 100 holds 64 inputs and the recycle queue writing side 102 holds 16 inputs. Similar to the output queue 74, the recycling queue 9J is constructed to have an input data path and an output path. Enter the data path, or write to the side 100, to allow the Yuan Chong manager 72 to put the data frame pointer into the recycle queue 98. The output path, or the read side 1 0 2, allows the yuan punch manager 7 2 to read the data frame index and send all the relevant yuan punches back to the free buffer slot 104. The external dimensions of this paper are applicable to the Chinese National Cricket (rNS) Λ4 specification (210X297 male feet) 36 91469 A7 ', ___B7 V. Description of the invention (37) Recycle queue overflow area provided in memory 3 6 1 2 2 series Provides additional storage for data frame indicators. (Please read the precautions on the back before filling in this page) When the data frame indicator is written into the empty recycle queue 98, it is transferred from the writing side 1 0 0 to the reading side 1 0 2 until the fetching side 1 0 2 is full. Put the extra data frame index that has been written into the write side 100 of the recycle queue 98 into the recycle queue overflow area 1 2 2 in the external memory 36. Once the collection side 10 2 of the recycling queue 9 8 and its overflow area 1 2 2 are full, the data frame indicators that have been put into the recycling queue 9 8 will begin to fill the writing side 1 0 0. Figure 11 of the Consumer Consumption Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs illustrates the internal structure of the free balance slot 104 of the embodiment example. The idle slot 104 is a FIFO, which contains address pointers to all the free buffers 140 in the external memory 36. When the data frame is received, the buffer manager 72 obtains the available address index K from the free slot 104 and stores the input data. The buffer manager 72 also obtains available address indicators from the free buffer slot 104 to the host processor 28 (when needed). The host can request or send back the address index to the space buffer slot 104 by fetching or writing the free memory slot register located between the registers 60 through the direct input data / output space. The writer side 106 and the read side 108 of the idle slot 104 each hold 64 input data in the exemplary embodiment of the present invention. The free buffer slot 104 is constructed to have an input path and an output path (similar to the output queue 74). Entering the path, or writing 嗰 10 6, allows the yuan punch manager 72 or the host 28 to put the address pointer into the free punch slot 104. The output path of free slot 1 104, or read side 1 0 8, allows Yuan punch manager 7 2 to provide the address index to host 2 8 or take it out of slot 1 0 4 for storing the received Address indicators for data frame data. Provided in the external memory 3 6 The paper size is applicable to China National Standard Net (CNS) Λ4 specification (210 X 297 mm) 37 9 1469 A7, 1 __B7_ V. Description of the invention (38) is the available address The extra storage area for the indicator is used to flush the overflow area 1220, as previously described. When the female switching device 12 is started, the free buffer slot 104 generates an address index from the reading side 108. After the data frame is entered, the space table in the empty reading slot 104 is read. If there are not enough element indicators on the write side 106 to handle communication commands, accessing the overflow area of 120 K will get more element indicators. Certain embodiments of the present invention provide advantageous configurations and methods that can provide a buffer index when the switching device 12 is activated. When the switching device 12 is first started, the overflow area 120 in the external memory 36 is not required to accommodate the buffer index. In contrast, the Yuan Chong indicator is dynamically generated. At start-up, the switching device 12 may generate a yuan indicator and place it in the overflow area 120, but there may be 16,000 or 32,000 such indicators, and this will slow down the startup process of the switching device 12. The present invention takes advantage of the fact that all element punches are spatial at start-up, and the identification of these element punches is known. Therefore, the buffer indicators are generated using counter 180 when they are needed after startup, as shown in Figure 10. The space table count generator 180 is an input connected to the multiplexer 182. Printed by the Bebe Consumer Cooperative of the Central Bureau of Standards of Didi (please read the precautions on the back before filling this page). The idle table in Space Yuan Slot 1.0 4 is empty at startup, so the idle table counts. The device 180 generates a yuan punch indicator. Once the idle expression reaches the highest count value, no element indicator will be generated. When the switching device 12 receives the data frame packet, it divides the data frame packet into a fixed-length buffer. Basically, the size of the data frame is variable. The size of the yuan punch is 2 56 bytes and the data part of the yuan punch is 2 40 bytes. After the content of the buffer is transmitted, put the indicator of the yuan punch into the recycling queue. The paper size applies to the Chinese national standard (CNS) MiAM · (210 X297 ^ # ·) '38 91469 A7 _____________B7 V. Description of the invention (39 ) 98, or if the yuan punch link can be moved, you can directly put the free time slot 104 free slot. During the operation of the switching device 12, any address index returned to the idle slot 104 is transferred from the writing side 106 to the reading side 108. If the reading side 1 0 8 is full, an additional address index is transferred to the overflow area 1 2 0. Once the read side 108 and overflow area 120 are full, the extra address index of the free slot 100 104 will start to fill the write side 106 of slot 104. Fig. 13 is an explanatory diagram showing the internal configuration of the multi-copy fast flash memory 96 according to the embodiment of the present invention. As discussed briefly previously, the chronological order of inputting the input data of the multi-copy fast memory storage 96 is fixed. In the present invention, the maintenance of the time sequence is not performed by time sampling as in the prior art, but by the actual sequence in the memory. At the same time, the multi-copy fast flash memory 96 of the present invention can avoid the use of valid bits, but instead encode the validity, as will be discussed later. Printed by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling in this page). Refer to Figure 13 and use the multi-copy fast element storage 9 (the 5 construction is used as the memory for the four-way setting association) The input data of the input multi-copy fast buffer memory 9 6 includes the data frame index and its number of copies, as explained previously. The lowest 6 bits of the data frame index determine the setting association memory 96. This input is stored. Columns of personal data. In the illustrative embodiment of the present invention, the flash buffer memory 96 has 64 columns, although if the flash memory is made larger, it will not limit the use of other numbers of columns. \ Will The quick punch storage 96 for setting association is divided into four positions, and each of them can be searched in parallel. When the input data of the punch punch manager 72 is stored in the quick punch storage 96, this input data is usually input First, the top (5 1: 3 9) bit of the row indicated by the lowest 6 bits of the data frame index

The dimensions of this paper are based on Chinese national standards. ((, Called the 8th secret (210 '乂 297mm) ~ Q-,, QA 7,' _________B7_ V. Description of the invention (4〇). When this column is taken At the time, all input data is shifted to the right by 13 bits, and then written back to this column. Finally, the input data packet that is actually written into the fast buffer memory 9 6 is the highest mark frame material. The key shape has the index number of the deputy meta-finger reference frame materials and the 9 and the liter device storage location ij-ff yuan be s quickly from the input when the input, follow the fast indexing and mark the location with a designated index The formation of the frame material is new and the old material is entered. The oldest and the most medium are stored in the oldest 6 9 machine. 0 The fast number of the rush rate will be V HU. The full value of the penalty is 8 J 9. It is listed as a storage holiday. 9 Yuan Ru Instruction box This material is written into the material. In addition to the capital, the capital will be transferred to the already lost. The new 96 will be removed and the storage will be stored. Depositing and recalling the deposit refers to the storage of the slow-moving material in the red part of the red box. In the use of the body. Department of memory 2Φ0) Note 1414 heads external standard punching device slow write punching, the number of frames and sub-frame materials of the materials and materials are displayed in the display, that is, the storage of Quan Yuan 逋 Quickly use the child Set 〇 In the district is a bit of overflowing nature, special interest, deputy deposit, storage and distribution 6 9 I manager Okimoto (please read the precautions on the back before filling this page) Slow and fast Entering 00 from material resources and entering 00 is a cost-effective and cost-effective solution. It is ignorant if you do not have access to materials and resources. 2 Central 7 9 Central Bureau of Standards, Ministry of Economic Affairs-Industrial Consumption Cooperatives print out fast-sending, fast-changing books. Non-structural execution permits are allowed to store their deposits as red dots. The speed is reduced and the speed is simplified. 6 This 9 writers are stored and moved to 96 stores. The decision to store the quick red has been marked by the search and return of 9 pieces of materials and management 8 pieces of materials for the input and output of materials due to the input of materials.平 ο Let 通通 ni 四 be remembered by the descriptive body ^ 0 of M. Although Surrounding 0, Fan® f the speed of Μ's 丨 do search-the book is only searched and moved up. Partial but mention, it will be more subtle, remember and remember to use lianlianguan _ 定 4 set in the storage device Quickly publish this book by Ming Ming to explain the descriptive description. From this paper scale, China National Standard (CNS) is applied. Λ4 is present (2 丨 0 × 297 mm) 40 91469 A7 B7 Printed by the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperatives V. Description of the Invention (41) 1 I Μ is listed as the basic input data entity positioning and maintains the fast buffer memory. 1 1 I The time sequence of input data (age). The physical positioning of the input data in 1 is an indication of the relevant year of the input data. ○ 1 1 Please 1 I substantially rearrange the input data in the memory. The first read of the input data can be performed. 1 Read 1 aging 0 Back 1 1 Of 1 The specific embodiment of the present invention provides that the switching device 12 can be customized on the communication port. Note that the waiting time of the data frame exchanged as a reference is customized. Refer to FIG. 14 Figure 9. Item 1 Refill the port vector FIFO 70 to check the receiving port The planned exchange mode K will determine how to write this package. The information frame indicators and related information can be placed in the appropriate output of the transmission port. Page V __ ^ 1 74 0 For the first mode, — ^ — (low latency mode ), The port vector F IF0 70 does not have 1 1 There is a limit on when the data frame indicator can be placed in the output queue 74 〇 As far as the second mode 1 1 (medium waiting time horizontal), the port vector F IF0 70 is only receiving data Box 64 puts the data frame indicator into the output queue after ordering I bytes. 〇 In the third horizontal form 1 I and -A-. (High wait time mode), the unitary vector F IF0 70 is in the fully received data frame 1. 1 I can only put the asset box indicator into the output queue 7 4 0 1 There are some special conditions that can change the port vector FIFO 7 0 Pass the data frame index 1 to the output queue 7 4 Timing 1) The data frame is from the first or second horizontal 1 1 10 M / bp s 璋Send to 100 M / b P s port; 2) Data frame is sent to management port 3 0 1 1 and 3) Data frame is sent to expansion bus communication port 0 In condition 1), since 1 | 10 M / b P s port to] 00 M / b P s port with an unmatched rate of eight forces its transmission mode 1 I to become the third, higher 时间 temple time mode. In condition 2), all data frames sent to management 埤 30 1 1 | are the third mode data frame 0. In condition 3), any data frame sent to the 1 1 1 expansion bus communication port uses the expansion bus communication At the turn of port 26 1 1 Change mode 0 When the multi-copy port vector contains any of these special communication ports 1 This paper size is applicable to the Chinese national standard (ΓΝ;?) Λ4 specification (210X297 mm) 41 91469 Α7 Β7 V. In the description of the invention (42), the ordering of the data frame indexes for the entire port vector becomes the one that exchanges the longest waiting time in the port vector. For example, if the data frame received by the first @second mode communication port and its multi-copy transmission port vector contains management 璋 30, its exchange mode is the third mode. In this case, a copy of the data frame indicator is placed in all output queues 74 only after the data frame has been completely received. The exchange mode will now be described in more detail. The switching mode applied on the input port (ie, receiving) determines the waiting time of the sender (once it starts receiving data frames, how quickly the switching device will send the data frame), and reduces the ability to fragment / error transmit to the output port . Second, the middle latency mode is the default value for each communication port; however, the exchange mode can be planned in the register 60 in units of ports. Printed by the Central Standards Bureau of the Ministry of Economic Affairs of the Bayer Consumer Cooperative (please read the precautions on the back before filling out this page) In all three modes, the data frame data received in the receive FIFO 52 of the internal MAC port will be sent as soon as possible Go to buffer 1 4 0 in external memory 52. At about the same time, the rule checker 4 2 or 5 8 receives the destination address and source address, the number of receiving ports, data frame indicators, and some additional information, and then performs the appropriate query. Once the query is completed, the rule checker 42 or 58 returns the data frame indicator and sends the transmission port vector to the port vector FIFO 70. The port vector FIFO 70 is the lack of output in the port vector. Put the data frame indicator into the output queue. 7 4 of the write side 7 6. Definition of the exchange mode of the receiving port The waiting time between the port vector F I F 0 7 0 receiving port vector (and data frame indicator) and putting the data frame indicator into the output queue 7 4. These three modes will be described below. Once the data frame index is transmitted to the output side of the output queue 7 4 The paper size is applicable to the Chinese National Standard (CNS) ΛΟΙ grid (2 丨 0X 297 mm) 42 91469 Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs , '____B7 V. Description of the invention (43) 78, the punch manager 72 captures the data frame indicators and schedules the transmission time. Yuan The punch manager 72 starts to move the data frame data from the address specified by the data frame pointer. Once the transmission of the M A C port F I F 0 5 4 is ready at its starting point (and assuming media for data transmission is available), the data frame transmission is started. The first mode is designed to provide the least waiting time. M line rate to receive and transmit data frames. In this first mode, there is no network error protection, because the data frame is sorted for transmission before deciding whether the data frame is a fragment (ie, length < 64 bytes) or contains a CRC error. In the first horizontal mode, the data frame reception may not be completed before the output port data frame transmission starts. If the receiving data frame is terminated due to a shortage or due to an invalid CRC, the receiving MAC flags these conditions as the header header 142 in the external memory 36. The transmission MAC guarantees that the MAC will generate a bad CRC if the transmission has begun with a data frame that will be terminated later due to a shortage or due to an invalid CRC. If the transmission of the data frame has not yet started in the transmission MAC, and the data frame shown in the header of header element 142 is terminated due to a shortage or has an invalid CRC, the element manager 72 will not send the frame to the output port. The second horizontal mode provides low latency and some network error protection for transmitting data frames. A data frame is received or transmitted after 64 or more bytes have been received. This allows the switching device 12 to filter (i.e., not transmit) fragments of the data frame; however, it cannot completely oversize the 64-byte tCRC error data frame. In the second mode, the data frame index of the data frame that reaches the 64-byte threshold in the receiving MAC is sorted and sent to the appropriate output queue 7 4. Delete the data frames that cannot reach the minimum threshold of 64 bytes, and do not delete their data (please read the precautions on the back before filling this page)

， 1T ΙΘ. This paper size applies to the Chinese national standard (CNS &gt; Λ4 size (210X 297mm) 43 9 1469 A7… __ ^ B7__ V. Description of the invention (44) The material frame index is put in the output queue 74. If it is greater than 74 Or the receiving data frame of 64 bytes is terminated due to invalid CRC, then the receiving MAC is the _ punch header 1 4 2 in the external memory 36, which indicates the status of this condition. If it is greater than or equal to 64 bits The data frame of the tuple has begun to be transmitted, but it will be terminated later with an invalid CRC, and the transmission MAC will complete the transmission with the bad CRC. If the transmission MAC has not started the data frame transmission, and the buffer header 142 Displaying a data frame (greater than or equal to 64 bytes) is terminated due to an invalid CRC, the Yuan punch manager 7 2 will return the data frame index to the recycle queue 9 8 (for single copy transmission) or multiple copy fast buffer storage Device 9 6 (transmission to multiple copies) instead of output port 7. 4. Economy. Deng Central Standards Bureau staff consumer cooperatives Yin Jia (Please read the precautions on the back before filling this page) The third mode is storage and transmission mode Which is here This mode provides the highest level of network error protection but has the longest transmission latency. The data frame is fully received before the switching device 12 sends it to the output port. In this mode, the switching device 12 will All fragments are separated from the erroneous CRC data frame. In the third mode, once the valid data frame (ie, with a valid CRC and greater than or equal to 64 bytes) has been successfully completed at the receiving end, the data frame indicators are sorted Send to the appropriate output queue 7 4. Delete the data frame that was terminated due to a reception error (invalid CRC, shortage (&gt; 64 bytes), etc.), and do not put its data frame indicator in the output queue 74 Regardless of the mode selected by the receiving port and the amount of data received, the port vector FIFO 70 determines whether to place the unitary vector into the output queue 74. In the above embodiment, it has three critical values, although in other embodiments, They are different threshold values. In the example of the embodiment, these threshold values are 1) receiving n bytes (eg, 6 bytes) where n <64 bytes; 2) receiving 64 bytes ; And 3) this paper The scale is applicable to Chinese national standards ('NS Μ4 specification (210X 297 cm) ~~ 7 ~ 7Γ ^ 44 91469 Α7 Β7 V. Description of the invention (45) Receive all data frames. The present invention transmits data frames to the threshold value Output queue 7 4. The port vector FIF 0; 7 0 rearranges the transmission order according to the number of types of data received and the mode planned by this port. Although the example of the embodiment makes a transmission decision based on the amount of data received, Other embodiments of the present invention make a transmission decision based on other factors, such as the type of data received. In implementing the transmission plan of the present invention, the yuan punch manager 72 maintains a table 160 in the fast flash storage memory (CAM) 161, which establishes the association between the data frame index and the receiving port. Each time the port vector FIFO 70 receives a new port vector and data frame indicator from the rule checker 42 or 58, and it makes a connection K to determine whether the receiving port has completed receiving the data frame. If not, it determines how many data frames Has been received. The unitary vector F I F 0 7 0 did not receive any information about the identification of the receiving port from the rule checker 42 or 58. The information received by the port vector to provide any port identification is a data frame indicator. Printed by Shellfish Consumer Cooperative of Central Bureau of Standards of the Ministry of Economic Affairs (please read the precautions on the back before filling this page). Port vector FIFO 70 uses data frame indicators to challenge the address table 160. If the data frame is still being received, the address table is returned to the receiving port, or the address table 160 cannot find the data frame indicator, which indicates that the data frame has been received. Once the data frame has been completely received, the data frame pointer is moved out of the address table 160. This means that it has reached the third threshold (data frame completion). Therefore, the data frame index can be immediately placed in the output queue 74. If the address table 160 has been returned to the receiving port, the port vector FIFO 70 puts the data frame index and related information into the holding area 16 2 and starts tracking two signals from the receiving port. These two signals are flagged to signal any of these three events. When the port receives n bytes, it uses the flag to signal the first event. At that point, this paper size applies the Chinese National Standard. (CNS) Λ4 grid (2.0 × 297 mm) 45 9 1469 A7 B7 Printed by the Shellfish Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 5. Description of the invention (46 ) 1 I If that port is in the first horizontal mode, the port vector FI F0 7 0 starts processing the data frame index by sending it 1 1 I to the appropriate output queue 74. If the receiving port 1 1 I is not In the first mode, the port vector F IF0 70 waits until it receives the indication—V 1 1 Please 1 I The second event occurs 0. If the port is in the second mode, the port reads 1 I first 1 | Volume FIFO 70 releases the data frame pointer from the holding area 1 62 and enters the appropriate back 1 2 1 1 1 output queue 7 4 0 Last 9 If the receiving port is in the third mode, the port will pay attention to review 1 I Amount FI F 0 7 0 Waiting for reception Flag indicating that the data frame is complete c Each reception Item &gt; 1 decoration (Refer to reference number 1 64 in Figure 14) Maintain this flag and provide this message to% ▲ Page 1 Port vector FI F0 7 0 (determined by port vector F IF0 70 and data '—- 1 of the frame index | Associate 0 port vector F IF0 70 Maintain the message for confirming the 1 1 pattern held by each communication port. 0 ·· * — of 9-Once the frame index is received, the port vector FIFO 1 1 70 first asks the address manager 160 of the receiver manager 72 to determine the address of the receiver, and sets the 1 receiver port determination mode, and then traces the flag from the receiver, and releases the data frame according to the mode and the i 1 flag. Index 0 1 1 The queue structure of the present invention has been incorporated into a multi-swap exchange device as an example. It is described as «cindL Ming 0 skin, and the queue structure and method of the present invention can be applied to other types of technology. Technology applied to this skill Medium 0 For example 1 1 9 This queue structure can be used by a microprocessor or other 1 1 digital processors queued on a chip. Therefore, the present invention is not limited to use as many 1 1 .port switches as described above. 0 1 1 1 Although the present invention has been illustrated and described in detail, it is clear that the 1 I solution is for illustration and example only and not for limitation. The 1 1 I Limited by the scope of the attached patents 0 1 1 1 1 This paper size uses China National Grandpa (CNS) Λ4 size (210X 297 mm) 46 91469

Claims (1)

The Ministry of Economic Affairs Central Standards Bureau's employees' cooperatives have printed holes and applied for patents. \ __ The queues for sorting input data include: The first queue area has queue inputs &gt; Input data with queue output 9 Logically couple input data of queue from here output and j-queue area to queue input and queue output of the first τ line area from queue line area Receives and sorts the input data M and sends the input data back to the — 'queue area V .. As the adjustment function for hundreds of input data in the first queue Iw 0 2. Such as the queue of item 1 of the scope of patent application The -th queue area has a write side. The write side includes queue inputs> λ and m are coupled to the write side. M receives input data from the write side. This queue includes queue outputs.3. If the second line of the scope of the patent application is applied, the second line area is the overflow area. This overflow area is coupled to the writing side M. It receives input data M from the writer side and is coupled to m. The input data is input to the fetching side 0 ', 4, and a multiple wait time queue architecture includes a first wait time queue area to receive and output input data M and an overflow area coupled to the first wait time queue area. In the ___th waiting time queue area, the queue space can be used to receive and sort the incoming data from the first waiting time queue area. This first waiting, time-queue, queue, and overflow area thus form the first The second waiting time queue area t The waiting time of the second waiting time queue area is greater than the first-· The waiting time of the waiting time queue area 0 Please kj Please read 1¾ The paper size applies to Chinese national standards CNS &gt; A4 specification (210 X 297 mm) 47 91469 Ϊ A8 B8 C8 D8 6. Application for patent scope 5. For the structure of the fourth scope of patent application, the first waiting time is listed as the consumption of employees of the Central Standards Bureau of the Ministry of Economic Affairs The cooperative prints and then transfers M. "When the F side is listed, the order will be kept in order. Data, go straight to the side E, and enter Λ. Take the data from the input department. The person sees the capital input t. After reading it, it is time to enter the capital Λ ,, and write the Mth capital into the column. Μ 片 Enter into Μ never existed. "i a loser" and the material can be received; the crystal's position 'receives capital, loses and loses, the material side — the first come ,, the asset. 1 .. Over, amount. Incoming and gaining three: input to the input side of the input side, when receiving the application, accept the input of the input and then enter the input structure of the input ί Lost to t, if the material is successfully passed, the side will be oversold. Coupling into the writing rack, the reading and sending, the material won three · 输 lose, win the lose, order, lose using the chain I * to pass and then pass the i data into the first and sometimes to read the transfer bank, 伫One? Useless? On the input side? Searching for land reclamation comes with 'coming from the outside side.' [Mu], input columns for the bit output ^^ ^ owned receiving side while the feed side of the side taken with -, then 'Chen Yi Chuan overflow queue I ,, -, there into the, information, item to item [eta];: ： The item reading time is 5 and the time is from 6. When the 6 is written, it is not connected to the listed crystal memory and the reading is the second expected amount and the expected first I is even lost. And side-to-side M-files, and only the second side of the board has a position to enter the M-send order.... I enter into the access range and come to take the first, list, write, read and pass profit. Intermediate area loses and loses even if the amount of profits is lost (outdated)-the body and the structure and the side of the special position will be the special line I two special, to allow for the input of the film, the film, the side frame, please enter the area, please I No., please feel that ... the transfer of funds with the crystal record package included in the application to write to the application / to get outdated Shen Minzheng access ^ into the input area, write from such as' overflow-such as read the input material such as Not now connected with S-Let's pass (please read the notes on the back before filling this page) This paper size is applicable to China National Standard (CNS) A4 specification (210X 297 mm) 48 9 1469 6. The scope of patent application includes Queue overflow area Receiving zone and sorting of the input data queue, and [mu] is returned to the input data queue, as the active capacity in the queue of the wafer, regulatory function. 10. The configuration of item 9 in the scope of patent application, wherein the queue on the chip includes: a write side, which has a queue input, and receives queued input data; a read side, which has a queue output and a queued input. The input data is output in this queue and leaves this queue; M and control logic control the flow of input data in the queue and between the thickness of the 伫 r. And the overflow thickness of the queue, so that when: When the available capacity of the input data and there is no input data in the overflow area, the input data can be directly transferred from the writing side to the reading side; when there is no available capacity of the input data on the 謓 @side, the input data is from the writing side Transfer to the overflow side; μ and when the capture side obtains the available capacity of the input data again, the input data is transferred from the overflow area to the read side. 1 1. According to the configuration of item 10 in the scope of patent application, where there is no available capacity on the grabbing side, the writing side is configured to collect a plurality of input data, and the input data is grouped into a plurality of input data in a single The processing method is sent to the overflow area of external memory. '' Printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs of the People's Republic of China 12 // If the configuration of the scope of patent application item 11 is configured, the control logic includes overflowing when the reading side obtains a group that can queue input data. Send the group of input data to the organization on the reading side. 13. If the configuration of item 9 of the 'Patent Scope' is applied, the capacity of the overflow area is programmable. 14. A multi-network switching device that uses a separate packet exchange network, comprising: a plurality of ports through which packets are received from the network. The paper size is applicable to the Chinese National Standard (CNS) Λ4 specification (210 × 297). (%) 9 1469 (Please read the notes on the back before filling out this page) 49 A8 B8 C8 D8 Apply for a patent scope, and send multiple packets from this to the Internet I want to I to the port should be a logarithm, regain the connection 0, but should be entered into the pair, there is a list of 庁! The number of columns 伫 complex splitting is. On the side of reading and losing, take readings and notes, and record the input of the Ministry of Foreign Investment and Input Funds. In the order of the input, arrange the future introduction, the body of the memory outside the memory of the overflow department. When the material is received on the input side, the input is received and written, and then the material is sent back. When the material is sent, the personnel department will receive the material from the receiving material. External reading Replace the road network with a traffic seal. Separate writing for entry «to M number package repacking, this will be re-installed by the port, the number re-installation, this exchange will be connected to the network by the traffic path, the number of re-packing of the dock to the number of network rewrite" from the receipt The number of ports should be as low as possible. The number of ports received should be multiplexed. The entry should be written. There should be a pair of columns. '' The input side of the input and output of the input and output capacity can be read and read, and the side of the input can be taken as the source of the asset * into the U-body package. Remember to send the letter to the delivery department (Please first (Please read the notes on the back and fill in this page.) Printed by the Central Bureau of Standards, Ministry of Economic Affairs, Consumer Cooperatives, and printed with written materials. This body is remembered by the Book of Records, and the material is expected to be sent to the side when the book is written. The book is written to the book and then returned. The mediator recalled the way the rolling section intersected from the line to the coupling plane. In the ceremony, the memory area of the memory area is covered by a warrior's body, memory in0, memory space and department of the memory., M is external; the paper size of the side change is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) ) 91469 々, input range of patent application scope, material list. 16. For the configuration of item 15 of the scope of patent application, where multiple queues are split queues, and external memory includes plural corresponding to split queues. Overflow zone, so that each split queue of the multi-port network switching device has its own overflow zone. 17. For the configuration of the 16th scope of the patent application, each split queue includes a write side. The first connection between the read side and the read side is to transfer the data directly from the write side to the read side. 1 8. If the configuration of the 17th scope of the patent application, it also includes `` located on the write side and external memory The second connection between the physical interfaces is used to transfer input data from the write-into the external memory interface and the overflow area of the external memory, and the third connection between the reading side and the external memory interface To overflow from external memory Area and external memory interface to send input data to the capture side. Printed by the Central Standards Bureau of the Ministry of Economic Affairs, printed by the Consumer Cooperative 19. For the configuration of item 18 in the scope of the patent application, the capture side of the split queue is not available At the time of capacity, the write side of each split queue is configured to collect multiple input data to form a plurality of input data of the input data group. A single processing method is sent to the overflow area used to split the queue in external memory. _2 0. As for the configuration of item 16 in the scope of patent application, the capacity of each overflow area in the external memory can be independently programmed. 21. For the configuration of item 15 in the scope of patent application, the input data is the data frame index. 22. — A method for inputting tributary materials, including the following steps: 9 1469 (Please read the notes on the back before filling out this page) This paper size applies to China National Standard (CNS) Α4 size (2 丨 〇 X 297) (1) ", 5 1 々, the input range of the patent application in the first section of the queue receives input data; determine the available capacity of the second section of the queue, the input data is printed here by the Consumers Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs Duan will be two-"Into the capital" and "Into the capital", the Baotou District is in the input area. Write the line with the input side and the second line. If the data is one, enter the number of transfers. For example, the number of units that will be included in the material and section i of the French port will be in the input area of the asset M, and the material will be imported. If there is a certain number, then if you enter it, you will lose it. The film is duplicated, the film is, and the input section is. The first part of the body. The number is included in the crystal, one. The crystal amount section has the section section. All the three sections of the Biography of the Guide and Historian are described in the third section. The second section, the middle section, and the closing section. For the overflow, use the side-by-side method of the second section and the second section of the outer section of this method. This method of the overflow area of Faley-Λ three guides in the side of this area. In addition, the writing of the crystal three body, the plural overflow of the loser is connected to the district, and the paragraph term is side to the first memory term. There are multiple terms in the ministry transmission term. , The outer real 24 body of each of the 25 columns and segments, and SS Rongsan reading area and part of the time and formula to take the memory should be divided into the ff area of the perimeter of the perimeter of the position is the amount of Η. Second round] The direct use of the material from the Fandan overflow area and Fan Rongjing's sub-fan ministry phase is the first to benefit the three areas. The second section of the second section is dedicated to the special use of the central and special areas. If Li Lixian has the entry, please enter the area, please make it to the group, please set up the second section to enter the section-Shen, three guides apply to the group For the application, the independent submission area will be listed as follows. (Please read the precautions on the back before filling out this page.) This paper size applies to China National Standard (CNS) A4 specifications. ( (210X297 mm) 9 1496 ABCD 6. Application for patent range exchange. The device has a plurality of frames. This method also includes designating each of the plurality of ports as a separate line and corresponding to the overflow area. 27. If applying for a patent The method of scope item 26, wherein the input data is a data frame indicator, which is used to indicate the position of the _ data frame received by the multi-device exchange device and stored in the external memory. (Please read the precautions on the back before filling this page ) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs. The paper size is applicable to the Chinese National Standard (CNS) A4 (210X297 mm) 53 9 1469