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Priority claimed from JP08008581Aexternal-prioritypatent/JP3133667B2/en
Application filed by Sanyo Electric CofiledCriticalSanyo Electric Co
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Publication of TW369720BpublicationCriticalpatent/TW369720B/en
This invention aims to seek the high integration of split gate type flash EEPROM by forming a source electrode area 3, a drain electrode area 4 on the substrate, and a floating gate 8 is formed by oxide film 6 on the channel region 5 sandwiched between the source electrode 3 and drain electrode 4. A control gate 9 is formed on the floating gate 8 via oxide film 7. A part of the control gate 9 constructs the selection gate 10 arranged on channel region 5 via oxide films 6 and 7. A selection transistor 11 is constructed by selection gate 10 which is constructed by side walls 12 and 13 of floating gate 8 and side of oxide 7, as well as the part 14 that covers the side walls 12 and 13.
TW085101291A1996-01-221996-02-02Split gate type transistor, method for making a split gate type transistor, and a non-volatile semiconductor memory
TW369720B
(en)