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Application filed by United Microelectronics CorpfiledCriticalUnited Microelectronics Corp
Priority to TW087103865ApriorityCriticalpatent/TW365050B/en
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A kind of forming method for trench isolation area which includes the following steps: forms a definition layer of trench on the semiconductor substrate; removes part of definition layer to form the opening in the trench definition layer; employs the trench definition layer as the mask to remove part of semiconductor substrate to form the trench; forms a buffer layer on surface on the trench which is used for growing the first insulation layer; last, forms the first insulation layer on surface of the trench.
TW087103865A1998-03-161998-03-16Forming method for trench isolation area
TW365050B
(en)
Local oxidation method employing polycide/silicon nitride clearance wall by controlling the width of pad oxide and silicon nitride to optimize the forming of isolation area
Method for manufacturing shallow trench isolation structure without producing microscratches on surface of shallow trench isolation structure (revised edition)