TW359821B - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
TW359821B
TW359821B TW086119897A TW86119897A TW359821B TW 359821 B TW359821 B TW 359821B TW 086119897 A TW086119897 A TW 086119897A TW 86119897 A TW86119897 A TW 86119897A TW 359821 B TW359821 B TW 359821B
Authority
TW
Taiwan
Prior art keywords
self refresh
source voltage
refresh mode
semiconductor integrated
integrated circuit
Prior art date
Application number
TW086119897A
Other languages
Chinese (zh)
Inventor
Kyoji Yamasaki
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of TW359821B publication Critical patent/TW359821B/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Control Of Electrical Variables (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)

Abstract

The semiconductor integrated circuit device having a regular operation mode and a self refresh mode is provided with a Vref generation circuit 1 for dropping an external source voltage and supplying an internal source voltage int.Vcc to an internal circuit 7, a differential amplifier 3, a P channel MOS transistor 11, a self refresh detection circuit 5 detecting the self refresh mode and the P channel MOS transistor 17 to be turned on at the time of a self refresh mode, and supplies the external source voltage from the external source voltage node 9 to the internal circuit 7 at the low voltage operation (self refresh mode) time.
TW086119897A 1997-09-04 1997-12-29 Semiconductor integrated circuit device TW359821B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9239728A JPH1186544A (en) 1997-09-04 1997-09-04 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
TW359821B true TW359821B (en) 1999-06-01

Family

ID=17049054

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086119897A TW359821B (en) 1997-09-04 1997-12-29 Semiconductor integrated circuit device

Country Status (4)

Country Link
JP (1) JPH1186544A (en)
KR (1) KR19990029191A (en)
CN (1) CN1210338A (en)
TW (1) TW359821B (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100317319B1 (en) * 1999-05-19 2001-12-22 김영환 Low voltage driver circuit for memory device
JP4053718B2 (en) 2000-09-07 2008-02-27 富士通株式会社 Internal power supply circuit for semiconductor memory device and internal power supply method for semiconductor memory device
JP3908493B2 (en) * 2001-08-30 2007-04-25 株式会社東芝 Electronic circuit and semiconductor memory device
KR100456597B1 (en) 2002-07-16 2004-11-09 삼성전자주식회사 Semiconductor memory device having internal voltage generation circuit for selectively generating internal voltage according to external voltage level
KR100448246B1 (en) * 2002-09-09 2004-09-13 주식회사 하이닉스반도체 Device for controlling high voltage
US7391193B2 (en) * 2005-01-25 2008-06-24 Sandisk Corporation Voltage regulator with bypass mode
JP2006318192A (en) * 2005-05-12 2006-11-24 Sharp Corp Electronic equipment
KR100885491B1 (en) * 2007-03-31 2009-02-24 주식회사 하이닉스반도체 Semiconductor memory device having high-voltage generator
JP4971970B2 (en) * 2007-12-27 2012-07-11 ルネサスエレクトロニクス株式会社 Step-down circuit, semiconductor device, and step-down circuit control method
JP2010086642A (en) * 2008-10-03 2010-04-15 Nec Electronics Corp Semiconductor device and method for supplying internal power supply of semiconductor device
JP5241641B2 (en) * 2009-07-27 2013-07-17 三洋電機株式会社 Semiconductor integrated circuit
JP2014149764A (en) * 2013-02-04 2014-08-21 Mitsumi Electric Co Ltd Semiconductor integrated circuit device
CN110797061B (en) * 2018-08-03 2021-03-23 华邦电子股份有限公司 Memory device and control method thereof

Also Published As

Publication number Publication date
JPH1186544A (en) 1999-03-30
CN1210338A (en) 1999-03-10
KR19990029191A (en) 1999-04-26

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