TW359817B - A non-volatile ferroelectric memory device with leakage preventing function - Google Patents
A non-volatile ferroelectric memory device with leakage preventing functionInfo
- Publication number
- TW359817B TW359817B TW084107975A TW84107975A TW359817B TW 359817 B TW359817 B TW 359817B TW 084107975 A TW084107975 A TW 084107975A TW 84107975 A TW84107975 A TW 84107975A TW 359817 B TW359817 B TW 359817B
- Authority
- TW
- Taiwan
- Prior art keywords
- potential
- transistor
- section
- bit lines
- memory cells
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 abstract 2
- 239000003990 capacitor Substances 0.000 abstract 1
- 230000006870 function Effects 0.000 abstract 1
- 239000011159 matrix material Substances 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Abstract
A non-volatile ferroelectric memory device includes a plurality of memory cells provided in a matrix manner, each of which comprises a transistor having a gate and source and drain regions formed in a semiconductor region, and a ferroelectric capacitor having first and second electrodes and a ferroelectric layer interposed between the first and second electrodes. The second electrode is connected to one of the source and drain regions of the transistor. The memory device further includes a plurality of pairs of bit lines, each of the bit lines of each of the pairs being connected to the other of the source and drain regions of the transistor of each memory cell in a column of the plurality of memory cells, a plurality of word lines each of which is connected to the gate of the transistor of each memory cell in a row of the plurality of memory cells, a plate potential section for generating a first predetermined potential intermediate between a reference potential and a high DC voltage and supplying the first potential to the first electrode of each of the plurality of memory cells, a well potential section fro generating a second predetermined potential lower than the first potential with respect to the reference potential and supplying the second potential to the semiconductor region of each of the plurality of transistors, and a sense amplifier section for sensing a data using potentials on the bit lines of each of the plurality of pairs of bit lines. The well potential section functions as a preventing section for preventing a leakage current from flowing from the ferroelectric layer.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19044894A JP2953316B2 (en) | 1994-08-12 | 1994-08-12 | Non-volatile ferroelectric memory |
Publications (1)
Publication Number | Publication Date |
---|---|
TW359817B true TW359817B (en) | 1999-06-01 |
Family
ID=16258304
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW084107975A TW359817B (en) | 1994-08-12 | 1995-08-01 | A non-volatile ferroelectric memory device with leakage preventing function |
Country Status (4)
Country | Link |
---|---|
US (1) | US5615144A (en) |
JP (1) | JP2953316B2 (en) |
KR (1) | KR0172017B1 (en) |
TW (1) | TW359817B (en) |
Families Citing this family (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5798964A (en) * | 1994-08-29 | 1998-08-25 | Toshiba Corporation | FRAM, FRAM card, and card system using the same |
US5787044A (en) * | 1995-10-23 | 1998-07-28 | Micron Technology, Inc. | Memory-cell array and a method for repairing the same |
JP2937254B2 (en) * | 1996-04-25 | 1999-08-23 | 日本電気株式会社 | Repair method for ferroelectric memory |
KR970076816A (en) * | 1996-05-06 | 1997-12-12 | 김광호 | Chipped ferroelectric random access memory using leakage current |
JP2939973B2 (en) * | 1996-06-06 | 1999-08-25 | 日本電気株式会社 | Driving method of nonvolatile semiconductor memory device |
JP3629099B2 (en) * | 1996-06-28 | 2005-03-16 | 株式会社東芝 | Semiconductor memory device |
DE19631361A1 (en) * | 1996-08-02 | 1998-02-05 | Siemens Ag | Process for the production of integrated capacitive structures |
US6097624A (en) | 1997-09-17 | 2000-08-01 | Samsung Electronics Co., Ltd. | Methods of operating ferroelectric memory devices having reconfigurable bit lines |
KR100224673B1 (en) * | 1996-12-13 | 1999-10-15 | 윤종용 | Non-volatile ferroelectric memory device and driving method thereof |
KR100297874B1 (en) | 1997-09-08 | 2001-10-24 | 윤종용 | Ferroelectric random access memory device |
KR100247934B1 (en) | 1997-10-07 | 2000-03-15 | 윤종용 | Ferroelectric ram device and manufacturing method thereof |
KR100275107B1 (en) * | 1997-12-30 | 2000-12-15 | 김영환 | A Ferroelectric Memory device and driving method thereof |
US6370057B1 (en) | 1999-02-24 | 2002-04-09 | Kabushiki Kaisha Toshiba | Semiconductor memory device having plate lines and precharge circuits |
DE19854418C2 (en) | 1998-11-25 | 2002-04-25 | Infineon Technologies Ag | Semiconductor component with at least one capacitor and method for its production |
US6310797B1 (en) * | 1998-12-02 | 2001-10-30 | Seiko Epson Corporation | Drive method for FeRAM memory cell and drive device for the memory cell |
JP3604576B2 (en) | 1999-02-19 | 2004-12-22 | シャープ株式会社 | Ferroelectric memory device |
KR100296917B1 (en) | 1999-06-28 | 2001-07-12 | 박종섭 | Apparatus for generating reference voltage in ferroelectric memory device |
JP2001076493A (en) * | 1999-09-03 | 2001-03-23 | Nec Corp | Ferroelectric storage device |
DE19948571A1 (en) | 1999-10-08 | 2001-04-19 | Infineon Technologies Ag | Storage arrangement |
JP2002016232A (en) * | 2000-06-27 | 2002-01-18 | Matsushita Electric Ind Co Ltd | Semiconductor memory and method of driving the same |
JP2002016233A (en) * | 2000-06-27 | 2002-01-18 | Matsushita Electric Ind Co Ltd | Semiconductor memory and method of driving the same |
US6515889B1 (en) * | 2000-08-31 | 2003-02-04 | Micron Technology, Inc. | Junction-isolated depletion mode ferroelectric memory |
US6466473B2 (en) * | 2001-03-30 | 2002-10-15 | Intel Corporation | Method and apparatus for increasing signal to sneak ratio in polarizable cross-point matrix memory arrays |
JP3776857B2 (en) | 2001-10-16 | 2006-05-17 | 株式会社東芝 | Semiconductor integrated circuit device |
US6661695B2 (en) | 2002-05-01 | 2003-12-09 | Ramtron International Corporation | Capacitance sensing technique for ferroelectric random access memory arrays |
KR100831799B1 (en) * | 2004-04-08 | 2008-05-28 | 가부시끼가이샤 르네사스 테크놀로지 | Semiconductor storage |
US7372726B2 (en) * | 2004-04-08 | 2008-05-13 | Renesas Technology Corp. | Semiconductor memory |
US7209394B1 (en) * | 2005-09-08 | 2007-04-24 | Advanced Micro Devices, Inc. | Memory structure for providing decreased leakage and bipolar current sensitivity |
US10083973B1 (en) * | 2017-08-09 | 2018-09-25 | Micron Technology, Inc. | Apparatuses and methods for reading memory cells |
US10529410B2 (en) | 2017-12-18 | 2020-01-07 | Micron Technology, Inc. | Techniques for accessing an array of memory cells to reduce parasitic coupling |
US10762944B2 (en) * | 2017-12-18 | 2020-09-01 | Micron Technology, Inc. | Single plate configuration and memory array operation |
US11081157B2 (en) * | 2018-12-11 | 2021-08-03 | Micron Technology, Inc. | Leakage compensation for memory arrays |
US11017831B2 (en) | 2019-07-15 | 2021-05-25 | Micron Technology, Inc. | Ferroelectric memory cell access |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4888630A (en) * | 1988-03-21 | 1989-12-19 | Texas Instruments Incorporated | Floating-gate transistor with a non-linear intergate dielectric |
JPH088339B2 (en) * | 1988-10-19 | 1996-01-29 | 株式会社東芝 | Semiconductor memory |
JPH02110865A (en) * | 1988-10-19 | 1990-04-24 | Mitsubishi Electric Corp | Digital recording and reproducing device |
US5303182A (en) * | 1991-11-08 | 1994-04-12 | Rohm Co., Ltd. | Nonvolatile semiconductor memory utilizing a ferroelectric film |
JP2930168B2 (en) * | 1992-10-09 | 1999-08-03 | シャープ株式会社 | Driving method of ferroelectric memory device |
JP3191549B2 (en) * | 1994-02-15 | 2001-07-23 | 松下電器産業株式会社 | Semiconductor memory device |
-
1994
- 1994-08-12 JP JP19044894A patent/JP2953316B2/en not_active Expired - Fee Related
-
1995
- 1995-08-01 TW TW084107975A patent/TW359817B/en active
- 1995-08-04 US US08/511,527 patent/US5615144A/en not_active Expired - Fee Related
- 1995-08-12 KR KR1019950024913A patent/KR0172017B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JPH0855484A (en) | 1996-02-27 |
US5615144A (en) | 1997-03-25 |
KR960008831A (en) | 1996-03-22 |
JP2953316B2 (en) | 1999-09-27 |
KR0172017B1 (en) | 1999-03-30 |
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