TW357438B - Semiconductor manufacturing process with integrated self-aligned silicide and self-aligned contract window - Google Patents
Semiconductor manufacturing process with integrated self-aligned silicide and self-aligned contract windowInfo
- Publication number
- TW357438B TW357438B TW086119546A TW86119546A TW357438B TW 357438 B TW357438 B TW 357438B TW 086119546 A TW086119546 A TW 086119546A TW 86119546 A TW86119546 A TW 86119546A TW 357438 B TW357438 B TW 357438B
- Authority
- TW
- Taiwan
- Prior art keywords
- forming
- active area
- layer
- self
- aligned
- Prior art date
Links
Landscapes
- Semiconductor Memories (AREA)
- Electrodes Of Semiconductors (AREA)
- Non-Volatile Memory (AREA)
Abstract
A semiconductor manufacturing process with integrated self-aligned silicide and self-aligned contract window, including the following steps: (a) on a substrate, separation with a shallow trench or field oxide layer a first active area and a second active area, being the first active area for forming logic circuits and the second active area for forming memory circuits; (b) forming accordingly on the substrate a gate oxide layer and a polycrystalline silicon layer; (c) forming on the second active area a silicide and a mask layer; (d) on the second active area, defining said layers for forming a polycide gate coated with a mask layer; (e) on the first active area, defining the gate oxide layer and the polycrystalline silicon layer, for forming a polycrystalline silicon gate electrode; (f) forming on the side of the gate structures a lateral wall layer; (g) forming source/drain electrode on the substrate of both sides of the gate electrode structure; (h) forming a blocking layer, coating the structure of the second active area; (i) by using a self-aligned silicide, forming silicide substance on the polycrystaline silicon gate electrode, source/drain electrode in the first active area; (j) forming the first insulator, coating the substrate; and (k) etching the insulation layer by using the blocking layer and the lateral wall layer as blocking layers and for forming on the second active area a self-aligned contact window, for exposing either the source or the drain area for contact area.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW086119546A TW357438B (en) | 1997-12-22 | 1997-12-22 | Semiconductor manufacturing process with integrated self-aligned silicide and self-aligned contract window |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW086119546A TW357438B (en) | 1997-12-22 | 1997-12-22 | Semiconductor manufacturing process with integrated self-aligned silicide and self-aligned contract window |
Publications (1)
Publication Number | Publication Date |
---|---|
TW357438B true TW357438B (en) | 1999-05-01 |
Family
ID=57940444
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW086119546A TW357438B (en) | 1997-12-22 | 1997-12-22 | Semiconductor manufacturing process with integrated self-aligned silicide and self-aligned contract window |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW357438B (en) |
-
1997
- 1997-12-22 TW TW086119546A patent/TW357438B/en not_active IP Right Cessation
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