TW352424B - Optimization apparatus for removing hazards by arranging instruction order - Google Patents

Optimization apparatus for removing hazards by arranging instruction order

Info

Publication number
TW352424B
TW352424B TW085104068A TW85104068A TW352424B TW 352424 B TW352424 B TW 352424B TW 085104068 A TW085104068 A TW 085104068A TW 85104068 A TW85104068 A TW 85104068A TW 352424 B TW352424 B TW 352424B
Authority
TW
Taiwan
Prior art keywords
son
mother
directional non
value
optimization apparatus
Prior art date
Application number
TW085104068A
Other languages
English (en)
Inventor
Kensuke Odani
Junko Sayama
Akira Tanaka
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Application granted granted Critical
Publication of TW352424B publication Critical patent/TW352424B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/445—Exploiting fine grain parallelism, i.e. parallelism at instruction level

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Executing Special Programs (AREA)
  • Advance Control (AREA)
  • Storage Device Security (AREA)
  • Document Processing Apparatus (AREA)
TW085104068A 1995-04-27 1996-04-08 Optimization apparatus for removing hazards by arranging instruction order TW352424B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP07104300A JP3113792B2 (ja) 1995-04-27 1995-04-27 最適化装置

Publications (1)

Publication Number Publication Date
TW352424B true TW352424B (en) 1999-02-11

Family

ID=14377080

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085104068A TW352424B (en) 1995-04-27 1996-04-08 Optimization apparatus for removing hazards by arranging instruction order

Country Status (7)

Country Link
US (1) US5850552A (zh)
EP (1) EP0740251B1 (zh)
JP (1) JP3113792B2 (zh)
KR (1) KR100238330B1 (zh)
CN (1) CN1160627C (zh)
DE (1) DE69622219T2 (zh)
TW (1) TW352424B (zh)

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* Cited by examiner, † Cited by third party
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USRE37093E1 (en) 1991-06-03 2001-03-13 Ricoh Company, Ltd. Optical disk drive unit with a sealing type bearing member
US6044221A (en) * 1997-05-09 2000-03-28 Intel Corporation Optimizing code based on resource sensitive hoisting and sinking
US5978588A (en) * 1997-06-30 1999-11-02 Sun Microsystems, Inc. Method and apparatus for profile-based code placement using a minimum cut set of the control flow graph
JP3220055B2 (ja) * 1997-07-17 2001-10-22 松下電器産業株式会社 機械語命令列またはアセンブリ言語命令列を最適化する最適化装置、及び、高級言語で記載されたソースプログラムを機械語またはアセンブリ言語の命令列に変換するコンパイラ装置。
EP1645956A3 (en) * 1997-08-29 2008-02-13 Matsushita Electric Industrial Co., Ltd. Instruction conversion apparatus for reducing the number of types of instructions
US6189141B1 (en) * 1998-05-04 2001-02-13 Hewlett-Packard Company Control path evaluating trace designator with dynamically adjustable thresholds for activation of tracing for high (hot) activity and low (cold) activity of flow control
US6158049A (en) * 1998-08-11 2000-12-05 Compaq Computer Corporation User transparent mechanism for profile feedback optimization
US6145125A (en) * 1998-11-12 2000-11-07 International Business Machines Corporation Method and storage medium for building very large executable programs
US7058647B1 (en) 1999-08-31 2006-06-06 Charles E. Hill & Associates Electronic presentation generation system and method
US6681387B1 (en) 1999-12-01 2004-01-20 Board Of Trustees Of The University Of Illinois Method and apparatus for instruction execution hot spot detection and monitoring in a data processing unit
KR100304527B1 (ko) * 2000-01-10 2001-11-03 이동욱, 이정호 현금카드를 통한 실시간 현금 결제 처리 방법
US7433881B1 (en) 2000-08-31 2008-10-07 Charles E. Hill & Associates, Inc. System and method for handling multi-resolution graphics files
US6675376B2 (en) * 2000-12-29 2004-01-06 Intel Corporation System and method for fusing instructions
US7185327B2 (en) * 2001-01-09 2007-02-27 Hewlett-Packard Development Company, L.P. System and method for optimizing operations via dataflow analysis
JP2002304823A (ja) * 2001-04-10 2002-10-18 Fujitsu Ltd リオーダリングコントローラ、リオーダリング方法及び記憶装置
US7000095B2 (en) * 2002-09-06 2006-02-14 Mips Technologies, Inc. Method and apparatus for clearing hazards using jump instructions
US7448030B2 (en) * 2004-03-18 2008-11-04 Intel Corporation Optimized ordering of firmware modules in pre-boot environment
US7506331B2 (en) * 2004-08-30 2009-03-17 International Business Machines Corporation Method and apparatus for determining the profitability of expanding unpipelined instructions
WO2006075286A2 (en) * 2005-01-13 2006-07-20 Nxp B.V. A processor and its instruction issue method
US7908163B2 (en) * 2005-07-15 2011-03-15 The Board Of Trustees Of The University Of Alabama Method and system for parallel scheduling of complex dags under uncertainty
US7330962B2 (en) * 2005-11-14 2008-02-12 Nvidia Corporation Dynamic instruction sequence selection during scheduling
US8539467B2 (en) * 2006-07-27 2013-09-17 International Business Machines Corporation Method and data processing system for solving resource conflicts in assembler programs
TWI334571B (en) * 2007-02-16 2010-12-11 Via Tech Inc Program instruction rearrangement methods
US8612944B2 (en) * 2008-04-17 2013-12-17 Qualcomm Incorporated Code evaluation for in-order processing
US9690591B2 (en) * 2008-10-30 2017-06-27 Intel Corporation System and method for fusing instructions queued during a time window defined by a delay counter
JP5140105B2 (ja) * 2010-03-23 2013-02-06 Ｎｅｃシステムテクノロジー株式会社 命令スケジューリング装置、命令スケジューリング方法および命令スケジューリングプログラム
CN106959957B (zh) * 2016-01-11 2020-07-07 阿里巴巴集团控股有限公司 一种有向无环图dag连线提示方法及装置
JP6325625B2 (ja) * 2016-10-14 2018-05-16 ファナック株式会社 プログラム最適化システム
CN110221838B (zh) * 2019-05-28 2020-10-27 中国科学院高能物理研究所 一种基于遗传算法和有向无环图进行程序自动设计优化的方法

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US5161216A (en) * 1989-03-08 1992-11-03 Wisconsin Alumni Research Foundation Interprocedural slicing of computer programs using dependence graphs
JPH03135630A (ja) * 1989-10-20 1991-06-10 Nec Corp 命令スケジューリング方式
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US5448737A (en) * 1992-03-17 1995-09-05 International Business Machines Corporation System and method for optimizing computer code using a compact data flow representation

Also Published As

Publication number Publication date
CN1146577A (zh) 1997-04-02
JP3113792B2 (ja) 2000-12-04
JPH08305577A (ja) 1996-11-22
DE69622219T2 (de) 2002-10-31
EP0740251B1 (en) 2002-07-10
KR100238330B1 (ko) 2000-01-15
EP0740251A3 (en) 1997-06-11
KR960038647A (ko) 1996-11-21
EP0740251A2 (en) 1996-10-30
CN1160627C (zh) 2004-08-04
DE69622219D1 (de) 2002-08-14
US5850552A (en) 1998-12-15

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