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A manufacturing method for non-volatile memory, it includes an array of floating gate transistor. The manufacturing method includes following steps: Form mask on substrate, which has an open to expose substrate surface, that open has sidewall; Form 1st spacer inside open; Form gate insulator on substrate surface surrounded by 1st spacer; Remove 1st spacer, to form tunneling oxide at surrounding of gate insulator, that tunneling oxide is thinner than gate insulating layer; Form floating gate electrode, which contacts with tunneling oxide and gate insulating layer.
TW086112501A1997-09-011997-09-01The manufacturing method for non-volatile memory
TW339478B
(en)