TW327227B - Data reading method and memory control device - Google Patents

Data reading method and memory control device

Info

Publication number
TW327227B
TW327227B TW086100801A TW86100801A TW327227B TW 327227 B TW327227 B TW 327227B TW 086100801 A TW086100801 A TW 086100801A TW 86100801 A TW86100801 A TW 86100801A TW 327227 B TW327227 B TW 327227B
Authority
TW
Taiwan
Prior art keywords
semiconductor memories
address
bus lines
semiconductor
reading method
Prior art date
Application number
TW086100801A
Other languages
Chinese (zh)
Inventor
Shuichi Kikucki
Seiji Hiraga
Tsutomu Sugahara
Original Assignee
Tokyo Electron Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Co Ltd filed Critical Tokyo Electron Co Ltd
Application granted granted Critical
Publication of TW327227B publication Critical patent/TW327227B/en

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  • Dram (AREA)

Abstract

A reading method for reading data stored in a plurality of semiconductor memory devices on a main frame device, which is characterized in comprising the following steps: (1) providing at the same time a read command to a plurality of semiconductor memories of a semiconductor device on a main frame device via bus lines; (2)providing at the same time an address to the aforesaid plurality of semiconductor memories via the bus lines; (3) during the first and second steps, in response to the command and address, setting the data read from the memory region indicated by the address during a specified time period at the respective output ends of the plurality of semiconductor memories; and (4) after the specified time period, retrieving the read data at each of the output ends of the plurality of semiconductor memories in sequence via the bus lines.
TW086100801A 1996-02-01 1997-01-24 Data reading method and memory control device TW327227B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3705496A JP3321587B2 (en) 1996-02-01 1996-02-01 Data rewriting method and memory control device in flash memory system

Publications (1)

Publication Number Publication Date
TW327227B true TW327227B (en) 1998-02-21

Family

ID=12486867

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086100801A TW327227B (en) 1996-02-01 1997-01-24 Data reading method and memory control device

Country Status (2)

Country Link
JP (1) JP3321587B2 (en)
TW (1) TW327227B (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6122195A (en) * 1997-03-31 2000-09-19 Lexar Media, Inc. Method and apparatus for decreasing block write operation times performed on nonvolatile memory
JP3680142B2 (en) * 1997-12-05 2005-08-10 東京エレクトロンデバイス株式会社 Storage device and access method
JPH11305954A (en) * 1998-04-27 1999-11-05 Oki Electric Ind Co Ltd Semiconductor memory device and reloading control method therefor
JP2006215595A (en) * 2005-02-01 2006-08-17 Hitachi Ulsi Systems Co Ltd Storage
KR100706246B1 (en) 2005-05-24 2007-04-11 삼성전자주식회사 Memory card capable of improving read performance
JP5598391B2 (en) * 2011-03-22 2014-10-01 富士通セミコンダクター株式会社 Semiconductor memory and system
CN108597470B (en) * 2018-05-08 2021-01-01 Tcl华星光电技术有限公司 Display device driving system and method and display device

Also Published As

Publication number Publication date
JP3321587B2 (en) 2002-09-03
JPH09213064A (en) 1997-08-15

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees