五、發明説明（1 ) 埜明背景 發明領域 本發明係有關於圖形顯示介面卡，而詳言之則係有關具 有顯示一視頻圖形陣列（VGA)影像於—視窗之能力的） 卡。 jgja技藝説明 加速圖形顯示介面卡因功能越來越強，在本行中正逐漸 開始廣泛使用。因此，此等介面卡正慢慢地取代VGA卡而 成爲新標準。加速圖形面卡含有其專用之處理器，可提供 影像資訊給記㈣裝s。另―方面，VGA卡則使用系統或 主電腦之處理器以提供影像資訊給記憶體裝置。因有專用 處理器，所以加速圖形介面卡比VGA卡更快且更有效率。 經 濟 部 中 央 標 準 % 員 工 消 合 作 社 印 製 然而，由於現有VGA應用之故，在本行中仍有繼續提供 VGA卡之持續性需要。爲滿足此項需要，某些顯示卡製造 商已設計出具有VGA能力之加速圖形顯示介面卡。圖 示爲一具有此種VGA能力之加速圖形介面卡，圖形介面卡 100包括含有一 VGA埠與一輸入埠之加速圖形控制器丨1() 。此圖形控制器連接至—框緩衝器丨3 〇，框緩衝器丨3 〇則 連接至隨機存取記憶體數位至類比轉換器（RAm DAC) 150 。RAM DAC 150具有一顯示埠，可用以提供影像至顯示監 視器160。RAM DAC 150亦具有一 VGA埠供接收VGA影像 資料。圖形介面卡1〇〇另含一 VGA控制器120，VGA控制 器1 2 0連接至加速圖形控制器1 i 〇之v G A i阜、RAM DAC 150之V G A埠，以及連接至一動態隨機存.取記憶體（Dram)V. Description of the Invention (1) Yeming Background Field of the Invention The present invention relates to a graphics display interface card, and more specifically relates to a card with the ability to display a video graphics array (VGA) image in a window. jgja skill description The accelerated graphic display interface is becoming stronger and stronger, and it is gradually beginning to be widely used in the bank. Therefore, these interface cards are slowly replacing VGA cards as the new standard. The accelerated graphics card contains its dedicated processor, which can provide image information to the player. On the other hand, the VGA card uses the processor of the system or host computer to provide image information to the memory device. Due to the dedicated processor, the accelerated graphics interface card is faster and more efficient than the VGA card. Printed by the Central Economic Standards Department of the Ministry of Economic Affairs. However, due to existing VGA applications, there is still a continuing need to continue to provide VGA cards in the Bank. To meet this need, some graphics card manufacturers have designed accelerated graphics display cards with VGA capabilities. The figure shows an accelerated graphics interface card with such VGA capability. The graphics interface card 100 includes an accelerated graphics controller 1 () including a VGA port and an input port. The graphics controller is connected to the frame buffer 丨 3 〇, the frame buffer 丨 3 〇 is connected to the random access memory digital-to-analog converter (RAm DAC) 150. The RAM DAC 150 has a display port that can be used to provide images to the display monitor 160. RAM DAC 150 also has a VGA port for receiving VGA image data. The graphics interface card 100 also includes a VGA controller 120. The VGA controller 120 is connected to the VGA port of the accelerated graphics controller 1 i 〇 v GA ifu, RAM DAC 150, and to a dynamic random access memory. Take memory (Dram)
G 866 A7 B7 五、發明説明（2 140。 自控制器1 1 0之輸入埠所接收到的加速圖形資料係由加 速圖形控制器110予以處理並儲存於框緩衝器13〇中。當 資料已備妥供顯示時，便傳送至RAM DAC 150以供最後顯 π於監視器1 6 0上。由加速控制器i i 〇所接收到之VG A資 料經由VGA埠傳送至VGA控制器120，以儲存於DRAM 140中。當資料已備妥供顯示時，則藉由VGA控制器i2〇 自DRAM 140中取出，並經由RAM DAC 15〇之VGA以傳送 至 RAM DAC 150。 · 如圖1所示，此等加速圖形介面卡使用兩個記憶裝置，.即 框緩衝器1 3 0與DRAM 140，使其成爲v G A相容。此兩記 憶裝置之使用增加了介面卡之總體價格。 經濟部中央標準局員工消費合作社印裝 使用者經常、或者基於各種理由，可能想將一 v G A影像 與一加速影像同時顯示於一螢幕上。在此情況下，每一種 影像係顯示於一視窗中。然而，圖i之圖形介面卡於v G A 所產生之影像予以顯示時，無法允許使用加速控制器。.更 詳而言之，VGA控制器之使用限定了 RAMDAC 15〇之操作 。V G A控制下之RAM DAC操作與加速圖形控制下之Ram D AC操作不相容。因而不可能同時將VGA影像與加速影像 予以顯示於一螢幕上。 本行技藝因此需要一種具有VGA能力之顯示介面卡，其 僅僅使用一 f己憶裝置來倚存圖形影像，包括V g A影像.，同 時也允許VGA與加速圖形影像之同時顯示。 發明概要 -5- 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ^19866 ΑΊ B7 經濟部中央標準局員工消費合作社印製 五、發明説明（3 ) 本發明提出上述本行技藝中之所需者。本發明提供一種 可將VGA影像視窗化顯示於一顯示螢幕上之裝置及方法。 此裝置爲一圖形介面卡，其包括一 VGA控制器、一光域機 與一具有一可顯示及一非可顯示記憶體之框緩衝器^ V G A —-控制器儲存並擷取來自框緩衝器之非可顯示記憶體的VGA 資料，並將此資料提供給光域機作進一步處理，例如將該 VGA影像予以視窗化於顯示螢幕上《處理之後，光域機之 加速圖形處理器將該VGA資料與其他圖形資料儲存在框緩 衝器之可顯示記憶體中以供其後顯示之用。在監視勞幕之 每一全螢幕顯示之後，將VGA影像資料予以重清（refresh)〇圖式簡述 圖1所示爲具有VGA能力之加速圖形介面卡； 圖2所示爲本發明較佳實施例所使用之數位電腦之方塊圖， 圖0所示爲圖形介面卡之部分方塊圖： 圖4所示爲用以於一顯示監視器上顯示多個視窗之裝置的 詳細方塊圖。 發明描述 、圖2爲本發明之—較佳實施例中所使用之數位電腦2⑼的 万塊圖。此電腦在一附接有輸入裝置23〇及輸出24〇之電 腦箱體205中含有一連接至主記憶體22〇之主處理器。 輸入裝置2j0可包含鍵盤、滑鼠、圖形輸入板或其他型式 之輸入裝置。輸出裝置240則可包含本文監視器、緣圖機 -6- 本紙張尺^财國國家標準（-~~ -：_ 請 閲 背 面 之 i 事 項 再- !裝 訂 線 3iS86e A7 -G 866 A7 B7 V. Description of the invention (2 140. The accelerated graphics data received from the input port of the controller 1 1 0 is processed by the accelerated graphics controller 110 and stored in the frame buffer 13. When the data has When it is ready for display, it is sent to RAM DAC 150 for final display on the monitor 160. The VGA data received by the acceleration controller ii 〇 is sent to the VGA controller 120 via the VGA port for storage In the DRAM 140. When the data is ready for display, it is taken out from the DRAM 140 by the VGA controller i2〇 and sent to the RAM DAC 150 through the VGA of the RAM DAC 150. · As shown in Figure 1, These accelerated graphics interface cards use two memory devices, namely frame buffer 130 and DRAM 140, making them v GA compatible. The use of these two memory devices increases the overall price of the interface card. Central Standard of the Ministry of Economy The printing and printing users of the Bureau ’s Consumer Cooperatives often or for various reasons may want to display a v GA image and an accelerated image on one screen at the same time. In this case, each image is displayed in a window. However, Graphical interface of Figure i When the images generated by v GA are displayed, the acceleration controller cannot be used. More specifically, the use of the VGA controller limits the operation of the RAMDAC 15〇. The operation of the RAM DAC under the control of the VGA and the accelerated graphics control The Ram D AC operation is incompatible. Therefore, it is impossible to display the VGA image and the accelerated image on one screen at the same time. Therefore, our technology requires a VGA capable display interface card, which only uses a memory device to rely on Save graphic images, including V g A images. It also allows VGA and accelerated graphic images to be displayed at the same time. SUMMARY OF THE INVENTION -5- This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) ^ 19866 ΑΊ B7 Economy Printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry 5. Description of the invention (3) The present invention proposes what is needed in the above-mentioned skills of the bank. The present invention provides a device and method for window-displaying VGA images on a display screen. This device is a graphics interface card, which includes a VGA controller, an optical domain machine, and a frame buffer with a displayable and a non-displayable memory ^ VG A-The controller stores and retrieves the VGA data from the frame buffer's non-displayable memory, and provides this data to the optical domain machine for further processing, such as windowing the VGA image on the display screen After that, the accelerated graphics processor of the optical domain machine stores the VGA data and other graphics data in the displayable memory of the frame buffer for subsequent display. After monitoring each full-screen display of the monitor, the VGA image data is refreshed. Brief description of the drawings. FIG. 1 shows an accelerated graphics interface card with VGA capability; FIG. 2 shows a block diagram of a digital computer used in a preferred embodiment of the present invention, FIG. 0 Shown is a partial block diagram of a graphic interface card: FIG. 4 is a detailed block diagram of a device for displaying multiple windows on a display monitor. DESCRIPTION OF THE INVENTION FIG. 2 is a ten thousand block diagram of the digital computer 2⑼ used in the preferred embodiment of the present invention. This computer contains a main processor connected to the main memory 22o in a computer box 205 to which an input device 23o and an output 24o are attached. The input device 2j0 may include a keyboard, a mouse, a graphics tablet, or other types of input devices. The output device 240 may include the monitor and the edge map machine in this article. -6- This paper ruler ^ Finance National Standards (-~~-: _ Please read the back item i again-! Binding line 3iS86e A7-
經濟部中央標準局員工消費合作社印製 或其他型式之輸出裝置。主處理器210亦可經由一圖形介 面卡·5〇0而連接至圖形輸出裝置31〇，例如爲一圖形顯示 器。圖形介面卡3 00可位於介面槽26〇Α中。圖形介面卡 3 00於匯流排2 50上自主處理器2 10接收與圖形有關之指令、 。數據機或其他通信介面卡35〇以及硬碟355亦可位於槽 260C及260D中以透過匯流排25〇與主處理器21〇通信。^ 據機3 5 0透過通信線360可與其他資料處理系統37〇通信。 主記憶體2 2 0、硬碟3 5 5及軟碟皆稱爲記憶體。 本發明係於圖形介面卡3 00内實施。圖3爲上述圖2所示 之圖形介面卡3 00之部分的方塊圖。此等部分包括一位址 解碼器480 ’其連接至光域機42〇以及vgA控制器425。 V G A匕制器4 2 5與光域機4 2 0則又相互連接。位址解碼器 爲本行所熟知，因此其操作在此不另詳述。光域機決定哪 些像素需予以更新以提供一特別之影像資料，並決定應如 何更新此等像素以產生精確地視像顯示。VGA控制器425 以來自處理器210之影像資料來更新VGA記憶體。圖形介 面卡300之此等部分之一亦包括一框緩衝器43〇，其包+ 一可顯示記憶體4 3 2以及一非可顯示記憶體4 3 4。框緩衝 器己憶體4 3 0連接至光域機4 2 0。V G A控制器4 2 5使用非 可顯示記憶體434供儲存VGA資料。可顯示記憶體43 2則 另連接至RAM DAC 440。 —般而f，如果此圖形系統係設計來顯示1〇24 X 768或 768千個位元组（Kbyte)之資料，則框緩衝器具有1〇24千位 元组之資料儲存能力。此儲存容量中的7 6 8千位元组係用 本紙張尺度適用中國國家標準（CNS ) Μ規格（21 ο X 297公釐） I 「裝丨-----、玎------^ (讀先閲1*-背面之·注意事項再填寫本頁} 五、發明説明（5 A7 B7 經濟部中央標準局員工消費合作社印製 以含納最終所欲顯示之資料。因此稱爲可顯示記憶體。此 儲存容量中的其他2 5 6千位元組係用以保留預定將顯示之 資料’因此稱爲非可顯示記憶體。因爲2 5 6千位元组之儲 存容量經常無特定用途之使用，因此往往浪費掉了。本發 明之優點在於使用此儲存容量來儲存V G A影像資料，且不 需使用另一分離之記憶裝置來儲存該資料。請注意雖然本 發明係以設計來顯示7 6 8千位元組資料之系統來描述，.但 本發明亦可使用於用來顯示其他不同大小之影像資料的系 統中》舉例而f ’設計來顯示Ϊ280千元組之影像資料的系 統使用一具有2048千位元組之儲存容量的框緩衝器。此框 緩衝器中未使用的768千位元組則可作VGA記憶體之使用 〇 習知之V.GA記憶裝置或DRAM通常分爲四個映射。每一 種映射皆係用以保留有關該影像之不同資訊。例如在本文 模示中，第一映射可保留字元碼資訊。第二映射可保留屬 性資訊，⑥第三映射可保留字型資訊。第四映射一般: 使用於圖形模式。同理，非可顯示記憶體係分爲四個 尤憶體峡射讀留與該VGA影像有關之不同資訊炊 3之非可顯示部分可實際分爲四個映射，但在本範；中 加系以虛擬万式分成映射。亦即，VGA控制器使用—a 架構供有效地使用該記憶體以作爲四個不同之映射。，址 有效傳輸，VGA映射資料係結合成—單—存取記憶體馬 請 先 閱 讀-背 Si 之 注· 意 事 項一 再 填 寫裝 本衣 頁 訂 線 達 434 在操作上，域理器21G將資料傳送至圖形介面卡3〇〇時 -8- 本纸張尺度朝 t ( CNS ) Αΐϋ7210Χ2975¥· 經濟部中央標準局員工消費合作社印製 A7 - ____B7 五、發明説明（6 ) ’位址解碼器4 8 0便對該資料之位址予以解碼’以決定是 否將該資料傳至光域機420或傳至VGA控制器425。傳至 VGA控制器425之資料由該VGA控制器予以處理，並傳送 至非可顯示記憶體434供儲存。同理，傳輸至光域機42〇 之資料處理後送至可顯示記憶體4 3 2供儲存。當V G A資已 備妥供顯示時’ VGA控制器425自非可顯示記憶體434中 擷取該資料，處理該所需之資料以產生影像，並將其傳送 至光域機420。光域機420將VGA資料傳至記憶體43)以 由該VGA影像以及由該光域機-4 2 〇所產生之任何影像中產 生一合成影像。光域機藉由圖2之主處理器21〇對其提供該 合成影像中VGA影像視窗之來源的所需位址。VGA影像 資料係映射成啓始於源位址之可顯示記憶體432，且vga 影像大小係由VGA之操作模式所界定β如有必要，VGA 影像亦可予以比例化以符合顯示器47〇之最終螢幕解析度 需求。已處理之資料接著傳送至可顯示記憶體43 2供儲= 。當可顯示記憶體4 3 2中之資料已備妥供顯示時，則透過 RAM DAC 440將此資料傳至顯示器47〇。 '、 ^ 可顯示記憶體4 3 2中的影像資料以光域掃描方式顯示於 顯示監視器470上。亦即’影像係藉由一掃描器在整：顯 不監視器470之顯示空間上對—調變之電子束予以逐線掃 描而顯示出來。因此，相對應於監視器之最左上方像素. 影像資料最早提供，而相對應於最右下方之資料則最^ 供。一旦抵達最右下方之像素處，電子束在其正 監視器上之最左上方位置時’將垂直遮蔽或呈關閉以：： 本紙張尺度適财ϋϊ|家標準（CNS ) ( 21Qx297公疫） I---------^------tr------ .. 一 < ’ (請先閲讀背面之注意事項再填寫本頁) 3xS866 經濟部中央榇準局貝工消費合作社印裳 五、發明説明（7 ) 像素顯示。在垂直遮蔽開始時，VGA控制器425開始自非 可顯示記憶體434中讀出資料，並將此資料提供給光域機 42 0供處理。光域機42〇處理此項資料，並將其儲存於可 顯不記憶體432中。因此，VGA影像在顯示器470之光域. V描私序的要該衫像負料之時點以前，便已於記憶體4 3 2 中產生。此舉使VGA影像之產生與顯示器47〇之產生相同 步’並且避免當影像經掃描以供顯示時，記憶體中之影像 爲半新半舊之情況（部分爲新影像，而部分爲先前之影像） «青/主意可顯示記憶體4 3 2中之加速_資在每次該主處理器 2 1 〇傳送加速圖形資料至圖形介面卡時即予以重清。 圖4所示爲用以顯示多個視窗於一顯示監視器上之裝置的 詳細方塊圖。此裝置包括連接至框緩衝器5 2 〇、視窗辨識 器（wid) 530及 RAM DAC 540之圖形處理器 5 1 0。RAM DAC 540亦連接至〜丨4 530及框緩衝器520。包含於圖3之光域機 4 2 0中的圖形處理器5丨〇經由資料匯流排5 7 〇，將所欲顯示 之資料（VGA及加速圖形）予以傳輸至框緩衝器520。圖形 處理器5 1 0亦將傳送資料之定址資訊，經由位址匯流排 5 80，傳送至Wid 530。LUT 545中的彩色調色盤可經由控 制匯流排5 6 0利用圖形處理器5 1 0予以更新。 wid 530與可顯示記憶體520係爲相同映射。亦即，wid 530之每一位置皆相對應於記憶體5 2 0中之某一像素位置= wid 53 0產生一碼，可由RAM DAC 540所使用以決定相對應 像素之屬性，例如該像素之色彩度等。RAM DAC 540使用 此等屬性來選擇某一特定視窗之資料的正確解譯，例如每 請 先 閲 讀- 背 面 之 3 裝 訂 -10- 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） 、發明説明（8 ) ί素位元數，調色盤位址等。m而，VGA影像資料與加速 :像資料便可同時顯示在—顯示監視器上，每—種資料皆 顯示於各別之視窗中m。， :個像素8位RVGA資料可與每個像素16位元之加速影 像一起顯示。 :然本發明已透過上述之特定實施例予以完全描述，但 :!行人士而言，很明顯地仍可利用其他之替代實施例來 只施本發明。因此，上述夕+，卜7丨2 夂實施例並非在於限定本發明， 本發明係由如下之中請專利範圍予以界定。 ----------^II . . f (请先閱t*·背面之注意事項再填寫本頁) 訂 -1旅 經濟部中央樣準局貝工消費合作社印製 I- -1 HI · -11 - 本紙張尺度適用中國國家標準（CNS > A4規格（210X297公釐）Printed or other types of output devices by the Staff Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. The main processor 210 may also be connected to the graphics output device 31 through a graphics interface card 500, such as a graphics display. The graphics interface card 300 may be located in the interface slot 260A. The graphics interface card 300 receives the graphics-related instructions on the bus 2 50 by the autonomous processor 2 10. The modem or other communication interface card 35〇 and the hard disk 355 can also be located in the slots 260C and 260D to communicate with the main processor 21〇 through the bus bar 25〇. ^ The data machine 3 50 can communicate with other data processing systems 370 through the communication line 360. Main memory 2 2 0, hard disk 3 5 5 and floppy disk are all called memory. The invention is implemented in a graphics interface card 300. FIG. 3 is a block diagram of a portion of the graphics interface card 300 shown in FIG. 2 described above. These parts include a one-bit decoder 480 'connected to the optical domain machine 42o and the vgA controller 425. V GA Dagger 4 2 5 and optical domain machine 4 2 0 are connected to each other again. Address decoders are well known in the industry, so their operation will not be described in detail here. The optical domain machine determines which pixels need to be updated to provide a particular image data, and determines how these pixels should be updated to produce an accurate visual display. The VGA controller 425 updates the VGA memory with the image data from the processor 210. One of these parts of the graphic interface card 300 also includes a frame buffer 43o, which includes a displayable memory 4 3 2 and a non-displayable memory 4 3 4. The frame buffer memory 4 3 0 is connected to the optical domain machine 4 2 0. V GA controller 4 2 5 uses non-displayable memory 434 for storing VGA data. Displayable memory 43 2 is additionally connected to RAM DAC 440. Generally speaking, if the graphics system is designed to display 1024 X 768 or 768 kilobytes (Kbyte) of data, the frame buffer has a data storage capacity of 1024 kilobytes. The 7 6 8 kilobytes in this storage capacity are based on this paper. The Chinese National Standard (CNS) Μ specification (21 ο X 297 mm) I "installed --------, 玎 ----- -^ (Read first 1 * -the back of the note, and then fill out this page) V. Description of invention (5 A7 B7 Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs to contain the information that is ultimately displayed. Therefore it is called Displayable memory. The other 2 5 6 kilobytes in this storage capacity are used to retain the data that is scheduled to be displayed. Therefore, it is called non-displayable memory. Because the storage capacity of 2 5 6 kilobytes is often not It is often wasted for use for specific purposes. The advantage of the present invention is that this storage capacity is used to store VGA image data, and no separate memory device is needed to store the data. Please note that although the present invention is designed The system that displays 7 6 8 kilobytes of data is described. However, the present invention can also be used in a system for displaying image data of other different sizes. The example is f 'designed to display the image data of 280 kilobytes. The system uses one with 2048 kilobits Frame buffer with storage capacity. The unused 768 kilobytes in this frame buffer can be used as VGA memory. The conventional V.GA memory devices or DRAM are usually divided into four maps. Each map is It is used to retain different information about the image. For example, in the model of this article, the first mapping can retain character code information. The second mapping can retain attribute information, and the third mapping can retain font information. The fourth mapping is generally : Used in the graphics mode. Similarly, the non-displayable memory system is divided into four yiu yixiaxia radiograms to retain different information related to the VGA image. The non-displayable part of the cooker 3 can actually be divided into four maps, but in This model; China and Canada are divided into maps by virtual multi-mode. That is, the VGA controller uses the -a architecture to effectively use the memory as four different maps. For effective transmission of addresses, the VGA map data is combined into- Single—Please read the memory access horse first-Notes on the back of Si. Note the notes and fill in the clothing page. The line is up to 434. In operation, the domain manager 21G sends the data to the graphics interface card 〇〇〇-8-8- Paper ruler朝 t (CNS) ΑΙϋ7210Χ2975 ¥ · Printed by the Ministry of Economic Affairs Central Standards Bureau Employee Consumer Cooperative A7-____B7 5. Description of the invention (6) 'Address decoder 4 8 0 will decode the address of the data' to decide whether to The data is transmitted to the optical domain machine 420 or to the VGA controller 425. The data transmitted to the VGA controller 425 is processed by the VGA controller and sent to the non-displayable memory 434 for storage. Similarly, it is transmitted to the optical The data from the domain machine 42〇 is processed and sent to the displayable memory 4 3 2 for storage. When the VGA is ready for display, the VGA controller 425 retrieves the data from the non-displayable memory 434 and processes the data The required data is used to generate the image and send it to the optical domain machine 420. The optical domain machine 420 transfers the VGA data to the memory 43) to generate a composite image from the VGA image and any images generated by the optical domain machine-420. The optical domain machine provides the required address of the source of the VGA image window in the composite image by the main processor 21 of FIG. 2. The VGA image data is mapped to displayable memory 432 starting at the source address, and the vga image size is defined by the VGA operating mode. If necessary, the VGA image can also be scaled to conform to the final display 47. Screen resolution requirements. The processed data is then sent to displayable memory 43 2 for storage =. When the data in the displayable memory 4 3 2 is ready for display, the data is transferred to the display 47 through the RAM DAC 440. ', ^ The image data in the display memory 4 3 2 can be displayed on the display monitor 470 in the optical domain scanning mode. That is, the image is displayed by scanning the modulated electron beam line by line with a scanner on the display space of the display 470: display. Therefore, the top left pixel corresponding to the monitor. The image data is provided first, and the data corresponding to the bottom right is the most available. Once it reaches the bottom-right pixel, the electron beam will be vertically blocked or turned off when it is at the top-left position on the front monitor: This paper size is suitable for financial standards (CNS) (21Qx297 public health) I --------- ^ ------ tr ------ .. 1 < '(please read the notes on the back before filling in this page) 3xS866 Central Bureau of Economic Affairs Printed by Beigong Consumer Cooperative V. Description of invention (7) Pixel display. At the beginning of the vertical masking, the VGA controller 425 starts to read data from the non-displayable memory 434 and provides this data to the optical domain machine 420 for processing. The optical domain machine 42o processes this data and stores it in the displayable memory 432. Therefore, the VGA image is generated in the memory 4 3 2 before the moment when the shirt image is negatively displayed in the light domain of the display 470. This synchronizes the generation of the VGA image with the generation of the display 47 ′ and avoids the situation where the image in the memory is used and used when the image is scanned for display (partially new and partly previous) Image) «Blue / Idea can display the acceleration in memory 4 3 2 _ The data will be cleared every time the main processor 2 1 〇 sends accelerated graphics data to the graphics interface card. 4 is a detailed block diagram of a device for displaying multiple windows on a display monitor. This device includes a graphics processor 5 1 0 connected to a frame buffer 5 2 0, a window identifier 530, and a RAM DAC 540. The RAM DAC 540 is also connected to the frame 530 and the frame buffer 520. The graphics processor 5 included in the optical domain machine 4 2 0 of FIG. 3 transmits the data to be displayed (VGA and accelerated graphics) to the frame buffer 520 via the data bus 5 70. The graphics processor 5 1 0 will also send the addressing information of the transmitted data to the Wid 530 via the address bus 5 80. The color palette in the LUT 545 can be updated by the graphics processor 5 1 0 via the control bus 5 6 0. The wid 530 and the displayable memory 520 are the same mapping. That is, each position of wid 530 corresponds to a pixel position in memory 5 2 0 = wid 53 0 generates a code, which can be used by RAM DAC 540 to determine the properties of the corresponding pixel, such as the pixel Color, etc. RAM DAC 540 uses these attributes to select the correct interpretation of the data in a specific window. For example, please read it first-3 on the back. Binding -10- This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm ). Description of the invention (8) The number of prime bits, the address of the palette, etc. However, VGA image data and acceleration: the image data can be displayed on the display monitor at the same time, and each type of data is displayed in a separate window m. ,: 8-bit RVGA data per pixel can be displayed together with an accelerated image of 16 bits per pixel. : Although the present invention has been fully described through the specific embodiments described above, but: for those skilled in the art, it is obvious that other alternative embodiments can still be used to apply the present invention only. Therefore, the above-mentioned Xi +, Bu 7 丨 2 example embodiments are not intended to limit the present invention, and the present invention is defined by the scope of patent applications as follows. ---------- ^ II.. F (please read the notes on the back of t * · and then fill out this page) Order -1 Printed by the Ministry of Economic Affairs, Central Standards Bureau, Beigong Consumer Cooperatives I-- 1 HI · -11-This paper scale is applicable to China National Standard (CNS > A4 specification (210X297mm)