TW318946B - Method of forming dielectric as protection film - Google Patents

Method of forming dielectric as protection film Download PDF

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Publication number
TW318946B
TW318946B TW86101173A TW86101173A TW318946B TW 318946 B TW318946 B TW 318946B TW 86101173 A TW86101173 A TW 86101173A TW 86101173 A TW86101173 A TW 86101173A TW 318946 B TW318946 B TW 318946B
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Taiwan
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dielectric layer
patent application
item
quot
silicon
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TW86101173A
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Chinese (zh)
Inventor
Liang-Jiuh Shiah
Dong-Long Jang
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Mos Electronics Taiwan Inc
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Abstract

A method of forming dielectric as protection film comprises of the following steps: (1) forming one semiconductor structure on one substrate; (2) forming one silicon-free dielectric on the semiconductor structure, in which the silicon-free dielectric is viewed as one protection film.

Description

318946 A7 B7 — ---------—______________ 五、發明説明() 5 -1發明領域: 本發明係關於一半導體之保護製程,特别是一種使用 介電層爲保護層的方法。 5-2發明背景: 在半導體製程中,一旦積體電路UC)完成後,—保護 製程是必要的》此一保護製程是沉積保護層於晶片表面之 最上層。此保護層係將元件結構封住與外界環境隔絶亦被 視爲一防止刮到之保護層(Scratch protection filmsl。 例如,此保護層可防止水氣及其它污染源侵入積體電路封 装【丨C package),且預防積體電路封裝{Packaging丨及組 裝《Assembly)時發生機械及化學傷害。一般,越厚的保 護層越能達到保護層保護的功能。但是,較厚的保護層較 容易發生裂間的情形,所以通常保護層的厚度有一定的 限。 傳統技術中,氮化矽通常作爲金屬化製程中的保護材 料因爲氮化矽是一種很好阻擋游動離子及水氣的材料。無 經濟部中央標準局貝工消费合作社印製 論如何,氮化矽具有高應力及不利於良好傳導線性質之高 反射率。 本紙張尺度適用中國國家標準(CNS ) Μ規格(210X297公釐) 經濟部中央標率局貝工消費合作社印製 3i^946 at _____ B7 五、發明说明() 5-3發明目的及概述: 本發明係揭露一種形成介電層爲保護層的方法。本發 明方法之目的係提供一較佳材質,"佛士龍"介電層,爲保 護層以解決傳统方法使用氮化矽層的缺點。本發明方法包 合一半導體結構形成於一底材之頂端。然後,一非含矽介 電層沉積於此半導體結構上。此非含矽介電層視爲一保護 層並且此非含矽介電層包含一"佛士龍〃介電層。 本發明方珐另一方法包含一半導體結構形成於—底 材之頂端。然後,形成一第一介電層於此半導體結構上。 然後,一非含矽介電層沉積於此第一介電層上。此非含矽 介電層視爲一保護層並且此非含矽介電層包含一 β 龍”介電層。 相較於氮化矽層,"佛士龍〃介電層非常的 幾乎與半導體工業所…學禁品不起反應呈 種比氮化矽層更好之阻擋游動離子及水氣的材料。不 化矽層,"佛士龍《介電層並沒有如氮化矽層很高的應力 且介電常數可隨著調整沉積時的狀況改變,所以"佛士龍” 介電層可以有較好之良好傳導線性質。 5-4囷式簡單説明: 本紙張;用 t S S ) A4規格(21GX297公4 ) ----------抽衣------訂------線 (請先閲讀背面之注意事項再填寫本頁〕 經濟部中央標準局男工消费合作社印製 A7 _______B7_ 五、發明説明() 第一圖所示爲本發明方法形成保護層之晶片剖面結構 圖。 第二圈所示爲本發明方法形成保護廣之晶片剖面結構 5 - 5發明詳細説明: β佛士龍"係爲一含磷、氮、及氧<ΡχΝΥ〇ζ丨之介電族 {Dielectric family)。此“佛士龍"介電層可藉由一傳統之 化學氣相沉積珐或一電漿增強化學氣相沉積珐而製得。 *佛士龍〃介電層係爲一非含矽之介電層,其包含了含_、 氣、及氧之介電層。此化學氣相沉積而成之佛士龍w介電 層可藉由下列反應而完成: PH3(三氫化磷)+ 〇2(氧氣} + nh3(氨氣> + N2(氮氣> OP(NH3) PxNy0z + N2 + H2 + 不確定 J[物 Λ佛士龍"係以網狀結構(Network form)形式存在。Λ佛士 龍"介電層非常穩定,並且敫乎與半導體工業所用的化學 藥品不起反應呈惰性,及爲一種比氮化矽層更好之阻擋游 動離子及水氣的材料。再者,"佛士龍"介電層沒有像氮化 梦介電層之高應力以及介電常數可隨著調整沉積時的狀 沉改變。因此,"佛士龍"介電層可以有較好之良好傳導線 性質。與傳統方珐相較,"佛士龍》介電層可視爲一較佳的 保護層。本發明之形成一"佛士龍(Ph〇s|〇n}»介電層當一 本紙張處用 (請先閲讀背面之注意事項再填寫本頁} -裝 ^訂 .線. 經濟部中央標準局員工消費合作社印裝 318946 A7 ______B7_五、發明説明() 保護層之方法將於下列文中描述。 第一圈所示爲本發明方法形成保護層之晶片剖面結 構圖。使用一傳统技術將一半導體結構形成於一底材之上 10之上。此一半導體結構係爲一傳導結構12,例如一金 屬線。形成此傳導結構12之主要步驟包含沉積一金屬層 於此底材10之上以及定義此金屬層於此底材10之上以 便形成此傳導結構12。典型地,金屬層之成分可以是鴒 或鋁。然後,一"佛士龍"介電層14形成於此半導髖結構 上。一傳統化學氣相沉積製程用於沉積此"佛士龍〃介電層 14。一電漿増強化學氣相沉積製程亦用於沉積此《佛士 龍"介電層14 ^不管是傳统化學氣相沉積製程或電漿增 強化學氣相沉積製程,皆使用三磷化氫、氮氣、氨氣、及 氧氣。大约是0_5 %三氫化磷被稀釋於氮中再導入反應器 内,其中反應器内含有氮氣、氩氣、及氧氣等不同氣體之 量。製程所控制沉積溫度的範圍约爲400°C至900°C。 此M佛士龍介電層1 4之折射率約爲1 . 7 5至2.1 〇視沉積 的狀況而定。此"佛士龍"介電層14之厚度範圍约爲50 至2 000埃。其結構如第一圖所示。 第一圖所示爲本發明形成保護屬之另一方法之晶片 剖面結構圖。使用一傳統技術將一半導體結構形成於一底 材之上20之上。此一半導體結構係爲一傳導結構22, 例如一金屬線。形成此傳導結構22之主要步驟包含沉積 本纸張纽通用中國國家標準(CNS ) Α4· ( 21Qx297^J~y 經濟部中央樣聲扃貞工消費合作社印製 A7 ______ B7 五、發明説明() 一金屬層於此底材20之上以及定義此金屬層於此底材 20之上以便形成此傳導結構22。典型地,金屬層之成分 可以是鎢或鋁。一第一介電層24沉積於此傳導結構22。 此步驟爲一選擇性的步驟並包含於此另一方法中。此第一 介電層24通常爲一二氧化矽層。通常住何一合適之製程 皆使用此步驟’例如,一化學氣相沉積製程。此第一介電 層視爲一保護層。此第_介電層之厚度约爲5〇埃至5〇〇 埃。此步骤係使用於當有隙洞丨voids)發生於保護層時。 然後,一"佛士龍"介電層26形成於此半導體結構上。一 傳統化學氣相沉積製程用於沉積此"佛士龍”介電層2 6。 一電漿增強化學氣相沉積製程亦用於沉積此》佛士龍„介 電層26。不管是傳統化學氣相沉積製程或電漿增強化學 氣相沉積製程,皆使用三磷化氫、氮氣、氛氣、及氧氣。 大约是0.5 三氫化嶙被稀釋於氮中再導入反應器内,其 中反應器内含有氮氣、氨氣、及氧氣等不同氣體之量。製 程所控制沉積溫度的範圍約爲4〇〇〇C至900〇C。此"佛士 龍"介電層26之折射率约爲1_75至2_10視沉積的狀況而 定。此"佛士龍"介電層26之厚度範圍约爲5〇至2〇〇〇 埃。其結構如第二圖所示。 本發明雖以一較佳實例闡明如上,然其並非用以限定 本發明锖神與發明實體,僅止於此一實施例爾,而熟系此 領域技藝者,在不脱離本發明之精神與範圍内所作:修 改’均應包含在下述之申請專利範圍内。 ' 本紙張纽適财目®轉~ CNS >八4胁 ^210X297公釐) 裝 Τ-訂 線 {請先閱讀背面之注意事項再填寫本頁)318946 A7 B7 — ---------—______________ V. Description of the invention () 5 -1 Field of the invention: The present invention relates to the protection process of a semiconductor, especially a method using a dielectric layer as a protection layer. 5-2 Background of the invention: In the semiconductor manufacturing process, once the integrated circuit UC) is completed, a protective process is necessary. This protective process is to deposit a protective layer on the uppermost layer of the wafer surface. This protective layer seals the device structure from the external environment and is also regarded as a protective layer (Scratch protection filmsl). For example, this protective layer can prevent moisture and other pollution sources from entering the integrated circuit package 【丨 C package ), And to prevent mechanical and chemical damages during integrated circuit packaging {Packaging 丨 and Assembly). In general, the thicker the protective layer is, the more it can achieve the protection function of the protective layer. However, the thicker protective layer is more prone to cracking, so the thickness of the protective layer is usually limited. In traditional technology, silicon nitride is usually used as a protective material in the metallization process because silicon nitride is a good material to block swimming ions and moisture. Printed by the Beigong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. On the other hand, silicon nitride has high stress and high reflectance that is not conducive to good conductive line properties. This paper scale is applicable to China National Standards (CNS) Μ specifications (210X297 mm) Printed by the Beigong Consumer Cooperative of the Central Standardization Bureau of the Ministry of Economic Affairs 3i ^ 946 at _____ B7 5. Description of the invention () 5-3 Purpose and summary of the invention: This The invention discloses a method for forming a dielectric layer as a protective layer. The purpose of the method of the present invention is to provide a better material, "Fosron" dielectric layer, as a protective layer to solve the shortcomings of the traditional method of using a silicon nitride layer. The method of the present invention includes a semiconductor structure formed on top of a substrate. Then, a non-silicon containing dielectric layer is deposited on the semiconductor structure. The non-silicon-containing dielectric layer is regarded as a protective layer and the non-silicon-containing dielectric layer includes a " Forest Dragon " dielectric layer. Another method of the present invention includes a semiconductor structure formed on top of the substrate. Then, a first dielectric layer is formed on the semiconductor structure. Then, a non-silicon containing dielectric layer is deposited on this first dielectric layer. This non-silicon-containing dielectric layer is regarded as a protective layer and this non-silicon-containing dielectric layer contains a β-long "dielectric layer. Compared with the silicon nitride layer, the " Fossaurus 〃 dielectric layer is almost The Institute of Semiconductor Industry ... The banned products do not react and present a material that better blocks swimming ions and water vapor than the silicon nitride layer. Without the silicon layer, " Foslong "dielectric layer is not as good as silicon nitride The high stress of the layer and the dielectric constant can be changed with the adjustment of the conditions during the deposition, so the " Force Dragon " dielectric layer can have better good conductive line properties. 5-4 simple description: this paper; use t SS) A4 specification (21GX297 male 4) ---------- pulling clothes ------ order ------ line (please Read the precautions on the back and then fill out this page] A7 _______B7_ printed by the Male Workers ’Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 5. Description of the invention () The first figure shows the cross-sectional structure of the wafer with the protective layer formed by the method of the invention. Second The circle shows the cross-sectional structure of a wide-protected wafer formed by the method of the present invention. 5-5 Detailed description of the invention: β Fu Shi Long " is a dielectric family containing phosphorus, nitrogen, and oxygen < PχΝΥ〇ζ 丨 Dielectric family ). The "Fostron" dielectric layer can be made by a traditional chemical vapor deposition enamel or a plasma-enhanced chemical vapor deposition enamel. * Fostron's dielectric layer is a non-silicon containing layer A dielectric layer, which contains a dielectric layer containing _, gas, and oxygen. The chemical vapor-deposited Frostron W dielectric layer can be completed by the following reaction: PH3 (phosphorus trihydride) + 〇 2 (oxygen) + nh3 (ammonia> + N2 (nitrogen> OP (NH3) PxNy0z + N2 + H2 + not sure J [物 Λ 佛 士 龙 " is in the form of a network form (Network form). ΛFostron's dielectric layer is very stable, and it is inert to the chemical industry used in the semiconductor industry and is inert, and it is a material that better blocks swimming ions and moisture than the silicon nitride layer. However, the " Fostron " dielectric layer does not have the high stress and dielectric constant of the nitriding dream dielectric layer, which can be changed as the deposition is adjusted. Therefore, the " Fostron " dielectric layer It can have better good conductive line properties. Compared with the traditional square enamel, the dielectric layer of " Fortress Dragon " can be regarded as a better protective layer. Form a " Fossaurus (Ph〇s | 〇n) »dielectric layer as a paper (please read the precautions on the back before filling out this page)-Binding ^ binding. Ministry of Economic Affairs Central Standards Bureau Employee Consumer Cooperative Printing 318946 A7 ______B7_ V. Description of the invention () The protective layer method will be described in the following text. The first circle shows the cross-sectional structure diagram of the wafer with the protective layer formed by the method of the present invention. The structure is formed on a substrate 10. The semiconductor structure is a conductive structure 12, such as a metal wire. The main step of forming the conductive structure 12 includes depositing a metal layer on the substrate 10 and the definition The metal layer is on the substrate 10 to form the conductive structure 12. Typically, the composition of the metal layer may be tungsten or aluminum. Then, a " Fostron " dielectric layer 14 is formed on the semiconducting hip Structurally. A traditional chemical vapor deposition process is used to deposit the "Fostron" dielectric layer 14. A plasma strong chemical vapor deposition process is also used to deposit the "Fostron" dielectric layer 14 ^ Whether it is traditional chemical vapor deposition Or plasma enhanced chemical vapor deposition process, all use triphosphine, nitrogen, ammonia, and oxygen. About 0_5% phosphorus trihydride is diluted in nitrogen and then introduced into the reactor, where the reactor contains nitrogen, The amount of different gases such as argon and oxygen. The deposition temperature controlled by the process is in the range of about 400 ° C to 900 ° C. The refractive index of this M Forstron dielectric layer 14 is about 1.7 to 2.1. The condition of the deposition depends on the thickness of the " Forsaurus " dielectric layer 14 in the range of about 50 to 2,000 Angstroms. Its structure is shown in the first figure. The first figure shows a cross-sectional structure diagram of a wafer according to another method of forming a protection metal according to the present invention. A conventional technique is used to form a semiconductor structure over a substrate 20. The semiconductor structure is a conductive structure 22, such as a metal wire. The main steps to form this conductive structure 22 include depositing this paper. New China National Standards (CNS) Α4 · (21Qx297 ^ J ~ y Printed by the Central Ministry of Economic Affairs of the Ministry of Economic Affairs and Consumer Cooperation Co., Ltd. A7 ______ B7 V. Description of invention () A metal layer is formed on the substrate 20 and the metal layer is defined on the substrate 20 to form the conductive structure 22. Typically, the composition of the metal layer may be tungsten or aluminum. A first dielectric layer 24 is deposited In this conductive structure 22. This step is a selective step and is included in this other method. The first dielectric layer 24 is usually a silicon dioxide layer. Usually any suitable process is used in this process. For example, a chemical vapor deposition process. The first dielectric layer is regarded as a protective layer. The thickness of the first dielectric layer is about 50 angstroms to 500 angstroms. This step is used when there is a gap 丨voids) occurs when the protective layer. Then, a " Fostron " dielectric layer 26 is formed on this semiconductor structure. A traditional chemical vapor deposition process is used to deposit the "Fostron" dielectric layer 26. A plasma-enhanced chemical vapor deposition process is also used to deposit the "Fostron" dielectric layer 26. Whether it is a traditional chemical vapor deposition process or a plasma enhanced chemical vapor deposition process, all use phosphine, nitrogen, atmosphere, and oxygen. About 0.5 Trihydrazine is diluted in nitrogen and then introduced into the reactor, where the reactor contains different amounts of nitrogen, ammonia, and oxygen. The deposition temperature controlled by the process is in the range of about 400 ° C to 900 ° C. The refractive index of the " Forsaurus " dielectric layer 26 is about 1_75 to 2_10 depending on the deposition conditions. The thickness of the " Forsaurus " dielectric layer 26 is approximately 50 to 2000 Angstroms. Its structure is shown in the second figure. Although the present invention is illustrated above with a preferred example, it is not intended to limit the invention and the entity of the present invention, and it is limited to this embodiment. Those skilled in the art will not deviate from the spirit of the invention And within the scope: Modifications' shall be included in the scope of the following patent applications. 'This paper is suitable for New Zealand Financial Project ® CNS > 8 4 ^ 210X297 mm) Τ- book line (please read the precautions on the back before filling this page)

Claims (1)

申請專利範圍Scope of patent application •k, 1. 一種形成介電層爲保護層的方法,包含下列夕 形成一半導體結構於一底材之上;以及 形成一非含矽介電層於該半導體結構上,其中該非含 電層視爲一保護層。 2. 如申請專利範圍第1項所述之方法,其中上述尤 硬介電層包含一含磷、氮、氧之介電層。3·如申諳專利範圍第1項所述之方法,其中上述& 石夕介電層包含一"佛士龍"介電層》 矽介 非含 經濟部中央標準局貝工消費合作社印製 4·如申請專利範園第1項所述之方法,其中上述之非含 發介電層之厚度约爲50埃至2000埃。 5. 如申請專利範圍第1項所述之方八Υ上述之非石夕介電層包含使用一化學氣相沉積珐沉積而成 F36. 如申請專利範圍第5項所述之方法,立 後 **、'^ 上 3^ 之 1^卜 j^r_氣相沉積法包含使用三磷化氫、氤氣、鱼备 ^学虱氧、及氧氣。 7. —種形成介電層爲保護層的方珐,包含 形成一半導體結構於一底材之上; 下列步驟: ----------參-------訂------.il (请先聞讀背念之注意事項存填寫本買) 本紙張尺度適用中國國家標準(CNS } A4現格(210X297公釐) 經濟部中央標準局員工消費合作社印製 ^18946 b! C8 D8六、申請專利範圍 形成一第一介電層於該半導體結構上;以及 形成一非含矽介電層於該第一介電層,其中該非含矽介電 層視爲一保護層。 8.如申請專利範圍第7項所述之方法,其中上述之非含 石夕介電層包含一含峰、氮、氧之介電層。 9 ·如申請專利範圍第7項所述之方法,其中上述之非含 矽介電層包含一"佛士龍"介電層。 10. 如申請專利範圍第7項所述之方法,其中上述之非含 矽介電層之厚度約爲50埃至2000埃》 11. 如申請專利範圍第7項所述之方法,其中上述之非含 矽介電層包含使用一化學氣相沉積法沉積而成。 12. 如申請專利範圍第11項所述之方法,其中上述之化 學氣相沉積法包含使用三磷化氫、氮氣、氨氣、及氧氣。 1 3 .如申請專利範圍第7項所述之方法,其中上述之第一 介電層包含一二氧化矽層。 14. 一種形成介電層爲保護層的方法,包含下列步驟: 形成一半導體結構於一底材之上;以及 ----------^------_、玎------^ (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) β 4 9 8 J 3 ABCD 六、申請專利範圍 形成一“佛士龍"介電層於該半導體結構上,其中該"佛士 龍”介電層視爲一保護層。 1 5 .如申請專利範圍第1 4項所述之方法,其中上述之"佛 士龍"介電層之厚度約爲50埃至1000埃。 1 6 _如申請專利範圍第1 4項所述之方法’其中上述之"佛 士龍"介電層包含使用一化學氣栢沉積法沉積而成。 ---------^------iT------線、 (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本纸張尺度適用中國國家標準(CNS ) A4規格(210 X 297公釐)• k, 1. A method of forming a dielectric layer as a protective layer, comprising forming a semiconductor structure on a substrate; and forming a non-silicon containing dielectric layer on the semiconductor structure, wherein the non-electric containing layer Treated as a protective layer. 2. The method as described in item 1 of the patent application, wherein the above-mentioned particularly hard dielectric layer includes a dielectric layer containing phosphorus, nitrogen and oxygen. 3. The method as described in item 1 of the patent scope of application, in which the above & Shixi dielectric layer contains a " Fors Dragon " dielectric layer " Printing 4. The method as described in item 1 of the patent application park, wherein the thickness of the non-containing dielectric layer is about 50 angstroms to 2000 angstroms. 5. The Fangba Υ above-mentioned non-Shixi dielectric layer as described in item 1 of the patent application scope consists of F36 deposited using a chemical vapor deposition enamel. The method as described in item 5 of the patent application scope **, '^ the first 3 ^ of 1 ^ Bu j ^ r_ vapor deposition method includes the use of phosphine, tritium, fish preparation, oxygen and oxygen. 7. A type of enamel forming a dielectric layer as a protective layer, including forming a semiconductor structure on a substrate; the following steps: ---------- Refer to ------- order- -----.il (please read the precautions and remember to fill out the purchase) This paper standard is applicable to the Chinese National Standard (CNS) A4 cash (210X297 mm) Printed by the Employees Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs ^ 18946 b! C8 D8 VI. Patent application: Form a first dielectric layer on the semiconductor structure; and form a non-silicon-containing dielectric layer on the first dielectric layer, wherein the non-silicon-containing dielectric layer is regarded as 1. A protective layer. 8. The method as described in item 7 of the patent application scope, wherein the above non-stone-containing dielectric layer contains a dielectric layer containing peaks, nitrogen, and oxygen. 9 · As in the patent application item 7 The method described, wherein the non-silicon-containing dielectric layer includes a " Fosron " dielectric layer. 10. The method as described in item 7 of the patent application, wherein the non-silicon-containing dielectric layer The thickness is about 50 Angstroms to 2000 Angstroms. "11. The method as described in item 7 of the patent application, wherein the above non-silicon containing dielectric layer includes It is deposited by a chemical vapor deposition method. 12. The method as described in item 11 of the patent application scope, wherein the chemical vapor deposition method described above includes the use of triphosphine, nitrogen, ammonia, and oxygen. 1 3. The method as described in item 7 of the patent application scope, wherein the first dielectric layer includes a silicon dioxide layer. 14. A method for forming a dielectric layer as a protective layer includes the following steps: forming a semiconductor structure on a On the substrate; and ---------- ^ ------_, 玎 ------ ^ (Please read the precautions on the back before filling this page) This paper size is applicable China National Standards (CNS) A4 specification (210X297mm) β 4 9 8 J 3 ABCD 6. The scope of patent application forms a "Fostron" dielectric layer on the semiconductor structure, of which the "Fostron" The dielectric layer is regarded as a protective layer. 1 5. The method as described in item 14 of the patent application scope, wherein the thickness of the above-mentioned "Fostron" dielectric layer is about 50 angstroms to 1000 angstroms. 1 6 _The method described in item 14 of the scope of patent application 'wherein the above-mentioned "Fostron" dielectric layer contains It was deposited by studying the Qibai deposition method. --------- ^ ------ iT ------ Line, (please read the precautions on the back before filling in this page) Central Ministry of Economic Affairs The paper printed by the Bureau of Standards and Staff's Consumer Cooperative applies to the Chinese National Standard (CNS) A4 (210 X 297 mm)
TW86101173A 1997-01-31 1997-01-31 Method of forming dielectric as protection film TW318946B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6867466B2 (en) 2002-03-13 2005-03-15 Macronix International Co., Ltd. Memory device and method for forming a passivation layer thereon

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6867466B2 (en) 2002-03-13 2005-03-15 Macronix International Co., Ltd. Memory device and method for forming a passivation layer thereon
US7157360B2 (en) 2002-03-13 2007-01-02 Macronix International Co., Ltd. Memory device and method for forming a passivation layer thereon

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