經濟部中央標準局員工消費合作社印製 312071 A7 B7五、發明説明（1 ) 〈發明所靥之技術部門〉 本發明乃關於：FM解調電路者，尤其是關於延遲型 I FM解調電路者；例如，使用於EIAJ方式TV話音多 重廣播收訊裝置或家庭用VTR再生裝置等者。 〈以往之技術〉 將對載收信號之頻率其頻帶佔有率較高之FΜ信號， 例如Ε I AJ (日本工業規格會）方式TV (電視）話音 多重廣播之副話音信號或家庭用VTR (錄影機）之亮度 記錄信號等加以解調時，一般乃使用圖1 0所示之延遲型 F Μ解調電路。 在圖10之延遲型FM解調電路中，1〇1乃爲限制 放大器（振幅限制放大電路），102乃第1延遲電路， 103爲乘算電路，104則爲LPF (低通濾波器）。 圖1 1乃爲表示：在圖1 0之延遲型FM解調電路中 ，輸入信號週期之1/4之時間爲與延遲電路之延遲時間 相等時之動作所用之各部分之波形例者。 圖1 2乃爲表示：在圖1 0之延遲型FM解調電路中 ’輸入頻率較圇1 1所示頻率爲低時之動作所用之各部分 之波形例者》 圖1 3則爲表示：在圖1 〇之延遲型FM解調電路中 ’輸入頻率較圖11所示頻率爲高時之動作所用之各部分 之波形例者》 下面，對於圖1 0所示延遲型FM解調電路之FM解 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) Α4規格（210Χ297公釐） -4 - 312071 Α7 Β7 經濟部中央標準局員工消費合作社印製 五、發明説明（2 ) 調之動作原理，以例如圓14 (a)所示，EIAJ方式 TV話音多重廣播之收訊信號中所含副話音信號（FM信 號）被输入之情形爲例，參照圓11〜圖13所示波形圖 來加以說明。 經FM解調之輸入信號（FM信號）（S101)， 乃由限制放大器1 0 1被波形整形後被分岐爲二，一方之 信號（S102)乃直接被输入乘算電路103，另一方 之信號則由第1延遲電路1 0 2被延遲一定時間。此延遲 信號（S103)乃被輸入前述乘算電路103，乘算電 路1 0 3則將2個輸入信號加以乘算，並輸出乘算输出信 號（S104)。此乘算输出信號（S104)之作用（ duty)，在輸入信號之週期爲延遲時間之兩倍以上之範圍 ，乃與輸入頻率成比例變化。 在以往之延遲型F Μ解調電路中，由於原理上乃將輸 入信號與將其延遲一定時間之信號加以乘算，故在乘算输 出信號（S104)，如14(b)所示，將發生以輸入 信號之兩倍爲基本波之高諧波成分。 因此，將乘算输出信號（S 1 04)以LPF 1 0 4 來加以平滑（smoothing )，則可獲得與乘算输出信號（ S104)之作用成比例之信號電壓（S105)。亦即 ，由L P F 1 〇 4來除去兩倍之高諧波，由此即可獲得與 輸入信號頻率成比例之FΜ解調信號（副話音信號）。 此外，前述延遲電路之延遲時間乃爲任意者’惟輸入 信號週期在延遲時間之兩倍以下之範圍內，則如圖1 5所 (請先閱讀背面之注意事項再填寫本頁) 本紙張又度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） -5 一 經濟部中央標準局員工消費合作社印裝 A7 B7五、發明説明（3 ) 示，FM解調輸出電壓將與輸入頻率不成比例。因此，爲 在無失真之狀態下來進行FM解調，延遲電路之延遲時間 必需設計成：較輸入信號向正方向作最大頻率偏轉時之信 號週期之1/2爲短。延遲時間爲載波週期之1/4時’ 在無失真之狀態下能作FM解調之範圍將更爲超大’故通 常乃將延遲時間設計成爲：能成載波週期之1/4之狀態 〇 惟如上述E I A J方式TV話音多重廣播收訊裝置之 之副話音信號或家庭VTR再生裝置之亮度記錄信號’對 載波之頻率言，頻帶佔有率較廣時，解調信號之高域成分 之頻率與髙諧波之低域成分之頻率將超於接近，故不使解 調信號之髙域成分衰減而擬去除高諧波’將需阻遏特性陡 峭之L P F。 惟阻遏特性陡峭之LPF，一般言其相位特性將有較 大之變化，放對於處理影像信號之VTR之信號處理電路 ，或將主話音信號與副話音信號加以運算處理之立體聲加 以解調之話音多重解調電路，將不能使用阻遏特性陡峭之 L P F ° 於是，實際上所使用之LPF104，乃由阻遏特性 與相位特性之選替（trade-off )來設定特性’但因無法 充分確保L P F 1 〇 4之阻遏特性，故高諧波將漏泄至 L P F輸出側。 圖1 6乃表示將以往之延遲型FM解調電路，使用於 E I A J方式TV話音多重之副話音解調時之高諧波之漏 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） e (請先閱讀背面之注意事項再填寫本頁) 裝· 訂 1 •r/ ο 2 1 3Printed by Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 312071 A7 B7 V. Description of the invention (1) <Technical Department of the Institute of Invention> The present invention is about: FM demodulation circuit, especially about delay type I FM demodulation circuit ; For example, those used in EIAJ-based TV voice multiple broadcast receiving devices or household VTR reproduction devices. <Conventional Technology> FMU signals with a higher frequency band occupancy rate for the frequency of the received signal, such as EI AJ (Japan Industrial Standards Association) type TV (television) voice multiplex broadcast secondary voice signal or household VTR When demodulating the brightness recording signal of (recorder), etc., the delay type FM demodulation circuit shown in Figure 10 is generally used. In the delay type FM demodulation circuit of FIG. 10, 101 is a limiting amplifier (amplitude limiting amplifying circuit), 102 is a first delay circuit, 103 is a multiplier circuit, and 104 is an LPF (low pass filter). Fig. 11 is an example of waveforms of various parts used in the operation when the delay type FM demodulation circuit of Fig. 10 has 1/4 of the input signal period equal to the delay time of the delay circuit. Fig. 12 is an illustration: In the delayed FM demodulation circuit of Fig. 10, the waveform example of each part used for the operation when the input frequency is lower than the frequency shown in Fig. 11 is shown in Fig. 13: In the delay-type FM demodulation circuit in FIG. 10, the waveform examples of the parts used in the operation when the input frequency is higher than the frequency shown in FIG. 11 are as follows. Next, for the delay-type FM demodulation circuit shown in FIG. 10 FM solution (please read the precautions on the back and then fill out this page) The paper size is applicable to the Chinese National Standard (CNS) Α4 specification (210Χ297 mm) -4-312071 Α7 Β7 Printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs Description of the invention (2) The operation principle of the modulation, for example, as shown in the circle 14 (a), the case where the sub-voice signal (FM signal) included in the reception signal of the EIAJ method TV voice multiple broadcast is taken as an example, refer to The waveform diagrams shown in circles 11 to 13 will be described. The FM demodulated input signal (FM signal) (S101) is shaped by the limiting amplifier 101 after being waveform-shaped and divided into two, one signal (S102) is directly input to the multiplier circuit 103, and the other signal Then, the first delay circuit 102 is delayed by a certain time. This delayed signal (S103) is input to the aforementioned multiplier circuit 103, and the multiplier circuit 1 0 3 multiplies the two input signals and outputs a multiplier output signal (S104). The duty of this multiplied output signal (S104) changes in proportion to the input frequency when the period of the input signal is more than twice the delay time. In the conventional delay-type FM demodulation circuit, in principle, the input signal and the signal delayed by a certain time are multiplied, so in the multiplied output signal (S104), as shown in 14 (b), the The high harmonic component that takes twice the input signal as the fundamental wave occurs. Therefore, smoothing the multiplied output signal (S 104) with LPF 1 0 4 can obtain a signal voltage (S105) proportional to the effect of the multiplied output signal (S104). That is, LP F 104 removes twice the higher harmonics, thereby obtaining an FM demodulated signal (secondary voice signal) proportional to the frequency of the input signal. In addition, the delay time of the aforementioned delay circuit is arbitrary, but the input signal period is within the range of less than twice the delay time, as shown in Figure 15 (please read the precautions on the back before filling this page). Applicable to China National Standards (CNS) Α4 specification (210Χ297mm) -5 A7 B7 printed by an employee consumer cooperative of the Central Bureau of Standards of the Ministry of Economy V. Invention description (3) shows that the output voltage of FM demodulation will not be proportional to the input frequency . Therefore, in order to perform FM demodulation without distortion, the delay time of the delay circuit must be designed to be shorter than 1/2 of the signal period when the input signal is deflected at the maximum frequency in the positive direction. When the delay time is 1/4 of the carrier cycle, the range that can be used for FM demodulation under a distortion-free state will be larger. Therefore, the delay time is usually designed to be 1/4 of the carrier cycle. The above-mentioned EIAJ mode TV voice multiple broadcast receiving device's sub-voice signal or home VTR reproduction device's brightness recording signal 'to the carrier frequency, when the frequency band occupancy rate is wider, the frequency of the high-domain component of the demodulated signal The frequency of the low-domain components of the high harmonics will be too close, so it is necessary to suppress the LPF with steep characteristics without attenuating the high-domain components of the demodulated signal and intending to remove the high harmonics. However, the LPF with a steep deterrent characteristic generally has a large change in its phase characteristic, and the signal processing circuit for the VTR that processes the video signal, or the stereo for arithmetic processing of the main voice signal and the secondary voice signal to demodulate The voice multiple demodulation circuit will not be able to use the LPF with steep suppression characteristics. Therefore, the LPF104 actually used is set by the suppression characteristics and the phase characteristics (trade-off) to set the characteristics', but because it cannot be fully guaranteed The suppression characteristic of LPF 1 〇4, so high harmonics will leak to the output side of LPF. Figure 16 shows the leakage of high harmonics when the conventional delay FM demodulation circuit is used in the EIAJ mode TV voice multiple sub-voice demodulation. The paper standard is applicable to the Chinese National Standard (CNS) A4 specification (210X297 Mm) e (please read the precautions on the back before filling in this page) Pack · Order 1 • r / ο 2 1 3
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7 7 A B 經濟部中央標準局員工消費合作社印装 五、發明説明（4 ) 泄情形之波形者。在此情況下之條件，延遲電路之延遲時 間乃爲載波週期之1/4，輸入信號乃1 KHz ，爲無調 變，在乘算電路輸出側級聯連接有截止頻率15. 734 KHz之一次LPF及截止頻率2· 12KHz之一次 L P F。從圚1 6之波形可觀測到高諧波之漏泄情形。 圖1 7及圖1 8乃表示：將以往之延遲型FM解調電 路使用於E I A J方式TV話音多重之副話音解調時之解 調输出之波形及頻率之頻譜者。在此情況下之條件，則爲 延遲電路之延遲時間爲載波週期之1/4，輸入信號爲1 KH z，調變度爲1 0 0%，在乘算電路输出側級聯連接 有截止頻率1 5. 734KHZ之一次LPF及截止頻率 2. 12KHz之一次LPF。從圖17及圖18可容易 觀測高諧波之漏泄。 〈本發明擬解決之問題〉 如上述，以往之延遲型FM解調電路，因乃未將乘算 輸出信號所含解調信號之高域成分加以衰減來去除高諧波 ，故需要阻遏特性陡峭之L P F ;惟實際上所使用之 L P F乃以阻遏特性與相位特性之選替來設定特性，並因 L P F之特性無法充分確保，故有高諧波將漏泄至L P F 輸出側之問題存在。 本發明乃爲解決上述問題所提出者，其目的乃在提供 :乘算輸出信號所含解調信號之高諧波之頻率可變換爲高 頻率；使用具有比較緩和之阻遏特性之L P F之情形’亦 本紙張尺度適用中國國家梂準（CNS)A4規格（ 210X297公釐）—^ _ _^—------f 装------訂------I (請先閱讀背面之注意事項再填寫本萸) 經濟部中央標準局貝工消費合作社印製 A7 ___B7_五、發明説明（5 ) 能充分進行高諧波去除之延遲型FΜ解調電路者。 〈解決上述問題之方法〉 本發明之延遲型FM解調電路，其特徵乃在具備有： 獲得較輸入信號延遲相當於較被FM解調之輸入信號 向正方向作最大頻率偏轉時之信號週期之1/2爲短之任 意時間之第1信號之第1機構； 及在較前述輸入信號向正方向作最大頻率偏轉時之信 號週期之1 /2爲短之時間內，獲得較輸入信號延遲相當 於較前述第1信號之延遲時間爲長之任意時間之第2信號 之第2機構； 及在較前述輸入信號向正方向作最大頻率偏轉時之信 號週期之1/2爲短之時間內，獲得較輸入信號延遲相當 於較前述第2信號之延遲時間爲長之任意時間之第3信號 之第3機構； 及將前述輸入信號與前述第1信號加以乘算之第1乘 算電路； 及將前述第2信號與前述第3信號加以乘算之第2乘 算電路； 及將前述第1乘算電路之輸出信號與第2乘算電路之 輸出信號加以加算之加算電路；等爲構成者。 〈發明之實施形態〉 下面參照附圖來詳細說明本發明之實施形態。 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） (請先聞讀背面之注意事項再填寫本頁) 31207χ A7 B7 五、發明説明（6 ) (請先閱讀背面之注意事項再填寫本頁) 圖1乃表示本發明之第1實施形態之延遲型F Μ解調 電路者。在圖1之延遲型FM解調電路中，11乃將被F 調之输入信號（S 1 1 )加以振幅限制放大之限制放 力器（振幅限制放大電路）。 1 2乃使上述限制放大器之輸出信號（S 1 2 )延遲 一定時間，以獲得第1延遲信號（S 1 3 )之第1延遲電 路。1 3爲使上述第1延遲電路之輸出信號（S1 3)延 遲一定時間，以獲得第2延遲信號（S 1 4)之第2延遲 電路。1 4則爲使上述第2延遲電路之輸出信號（S 1 4 )延遲一定時間，以獲得第3延遲信號（S 1 5 )之第3 延遲電路。 1 5乃爲將前述限制放大器之輸出信號（S 1 2 )與 前述第1延遲信號（S 1 3 )加以乘算之第1乘算電路； 1 6爲將前述第2延遲信號（S 1 4 )與前述第3延遲信 號（S 1 5 )加以乘算之第2乘算電路，1 7則爲將前述 第1乘算電路1 5之輸出信號（S 1 6 )與第2乘算電路 1 6之輸出信號（S 1 7 )加以加算之加算電路。 經濟部中央標準局員工消費合作社印製 1 8乃爲输入上述加算電路1 7之輸出信號（S 1 8 )，以去除不要之髙諧波所用之LPF(低通濾波器）。 亦即，在圖1之延遲型FM解調電路中，乃將生成： 在較被FM解調之輸入信號向正方向作最大頻率偏轉時之 信號週期之1/2爲短之時間內，較輸入信號僅延遲順次 超大之時間（如後述，例如1/8、1/4、3/8爲佳 )之第1〜第3之信號，並將輸入信號與第1信號在第1 -9 一 本紙張尺度適用中國國家標準（CNS ) Α4規格（210X 297公釐） 經濟部中央標準局貝工消費合作社印製 3120/1 A7 B7 五、發明説明（7 ) 乘算電路1 5加以乘算，再將第2信號與第3信號在第2. 乘算電路1 6加以乘算，又將第1乘算電路之輸出信號與 第2乘算電路之輸出信號，在加算電路1 7加以加算。 圖2乃爲說明圖1之延遲型FM解調電路之動作，來 顯示各部分之波形例者》 圖3則爲說明在圖1之延遲型FM解調電路中，輸入 信號之頻率較圓2之輸入信號之頻率爲低時之動作，來顯 示各部分之波形例者。 圖4亦爲說明在圓1之延遲型FM解調電路中，输入 信號之頻率較圖2之輸入信號之頻率爲高時之動作，來顯 示各部分之波形例者。 下面，對於圖1之延遲型FM解調電路之FM解調之 動作原理，以例如：圖5 (a)所示EIAJ方式TV話 音多重廣播之收訊信號所含副話音信號（FM信號），被 輸入之情形爲例，參照圖2〜圖4所示波形圖來加以說明 〇 被FM解調之FM信號輸入（S11)，由限制放大 器1 1被波形整形後被分岐爲二，一方之信號（s 1 2 ) 乃直接輸入第1乘算電路1 5，另一方之信號則輸入第1 延遲電路1 2。上述第1延遲電路1 2乃輸出將輸入信號 加以延遲一定時間之第1延遲信號（S 13)。上述第1 延遲電路1 2之输出信號亦被分岐爲二，一方之信號（ s 1 3 )乃直接被輸入前述第1乘算電路1 5，另一方之 信號則被輸入第2延遲電路1 3。上述第2延遲電路1 3 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ^-------rs — (請先閱讀背面之注意事項再填寫本頁) 訂7 7 A B Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs V. Description of the invention (4) The waveform of the leakage situation. In this case, the delay time of the delay circuit is 1/4 of the carrier cycle, the input signal is 1 KHz, there is no modulation, and the cut-off frequency of 15.734 KHz is cascaded on the output side of the multiplier circuit. LPF and LPF with a cut-off frequency of 2.12KHz. The leakage of high harmonics can be observed from the waveform of Qi 16. Fig. 17 and Fig. 18 show that the conventional delay-type FM demodulation circuit is used to demodulate the output waveform and frequency spectrum when the E I A J mode TV voice multiplex sub-voice demodulation is used. In this case, the condition is that the delay time of the delay circuit is 1/4 of the carrier cycle, the input signal is 1 KH z, the modulation degree is 100%, and the cut-off frequency is cascade connected on the output side of the multiplier circuit 1 5. One LPF of 734KHZ and one LPF of 2.12KHz. From Fig. 17 and Fig. 18, leakage of high harmonics can be easily observed. <Problems to be Solved by the Invention> As described above, the conventional delay-type FM demodulation circuit does not attenuate the high-domain components of the demodulated signal contained in the multiplied output signal to remove high harmonics, so the suppression characteristics are steep LPF; However, the actual LPF used is to set the characteristics by the alternative of the suppression characteristics and phase characteristics, and because the characteristics of the LPF cannot be fully ensured, there is a problem that high harmonics will leak to the output side of the LPF. The present invention is proposed to solve the above-mentioned problems, and its purpose is to provide: the frequency of high harmonics of the demodulated signal contained in the multiplied output signal can be converted to a high frequency; the case of using LPF with relatively mild suppression characteristics' The size of this paper is also applicable to China National Standards (CNS) A4 (210X297mm) — ^ _ _ ^ —------ f Packing ------ order ------ I (please first Read the precautions on the back and fill in this document.) A7 ___B7_ printed by the Beigong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. V. Invention Description (5) Delayed FM demodulation circuit that can fully remove high harmonics. <Method for solving the above problem> The delay type FM demodulation circuit of the present invention is characterized by having: obtaining a signal period that is delayed from the input signal equivalent to a maximum frequency deflection in the positive direction from the input signal demodulated by FM 1/2 is the first mechanism of the first signal at any short time; and within a short period of 1/2 of the signal period when the input signal is deflected in the maximum frequency in the positive direction, the delay from the input signal is obtained The second mechanism equivalent to the second signal of any time longer than the delay time of the aforementioned first signal; and 1/2 of the signal period when the input signal is deflected in the maximum frequency in the positive direction is a shorter time A third mechanism that obtains a third signal that is delayed from the input signal by any time longer than the delay time of the second signal; and a first multiplier circuit that multiplies the input signal and the first signal; And a second multiplier circuit that multiplies the second signal and the third signal; and an adder circuit that adds the output signal of the first multiplier circuit and the output signal of the second multiplier circuit; To constitute a person. <Embodiment of the invention> Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. This paper scale is applicable to the Chinese National Standard (CNS) Α4 specification (210Χ297mm) (please read the precautions on the back side and then fill out this page) 31207χ A7 B7 5. Description of the invention (6) (please read the precautions on the back side first (Fill in this page) FIG. 1 shows a delay-type FM demodulation circuit according to the first embodiment of the present invention. In the delay-type FM demodulation circuit of FIG. 1, 11 is a limiting amplifier (amplitude limiting amplifying circuit) that applies amplitude-limited amplification to the F-modulated input signal (S 1 1). 12 is to delay the output signal (S 1 2) of the above-mentioned limiting amplifier for a certain time to obtain the first delay circuit of the first delay signal (S 1 3). 13 is a second delay circuit that delays the output signal (S1 3) of the first delay circuit by a certain time to obtain a second delay signal (S 1 4). 14 is to delay the output signal (S 1 4) of the second delay circuit by a certain time to obtain the third delay circuit of the third delay signal (S 1 5). 15 is a first multiplier circuit that multiplies the output signal (S 1 2) of the limiting amplifier and the first delay signal (S 1 3); 16 is the second delay signal (S 1 4) ) Is the second multiplier circuit that multiplies the aforementioned third delay signal (S 1 5), and 17 is the output signal (S 1 6) of the aforementioned first multiplier circuit 15 and the second multiplier circuit 1 The output circuit of 6 (S 1 7) is added to the addition circuit. Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 18 is an LPF (low-pass filter) used to input the output signal (S 18) of the above addition circuit 17 to remove unnecessary high harmonics. That is, in the delay-type FM demodulation circuit of FIG. 1, it will generate: In a shorter time than 1/2 of the signal period when the input signal demodulated by FM is deflected in the maximum frequency in the positive direction, The input signal is delayed only for the first to third signals of the successively large time (as described later, for example, 1/8, 1/4, 3/8 is better), and the input signal and the first signal are in the first 1-9 This paper scale applies the Chinese National Standard (CNS) Α4 specification (210X 297 mm) printed by the Beigong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. 3120/1 A7 B7 5. Invention description (7) Multiplying circuit 1 5 to multiply, Then, the second signal and the third signal are multiplied by the second multiplier circuit 16 and the output signal of the first multiplier circuit and the output signal of the second multiplier circuit are added by the adder circuit 17. 2 is to illustrate the operation of the delay-type FM demodulation circuit of FIG. 1 to show waveform examples of each part. FIG. 3 is to illustrate that in the delay-type FM demodulation circuit of FIG. 1, the frequency of the input signal is relatively round 2 It is the action when the frequency of the input signal is low to display the waveform example of each part. Fig. 4 is also a diagram illustrating an operation when the frequency of the input signal is higher than the frequency of the input signal of Fig. 2 in the delay-type FM demodulation circuit of circle 1, and shows an example of the waveform of each part. Next, for the operation principle of the FM demodulation of the delayed FM demodulation circuit of FIG. 1, for example: the sub-voice signal (FM signal) included in the received signal of the EIAJ mode TV voice multiple broadcast shown in FIG. 5 (a) ), As an example of the input situation, it will be explained with reference to the waveform diagrams shown in FIGS. 2 to 4. The FM signal input by FM demodulation (S11) is shaped by the limiting amplifier 11 after being waveform-shaped and divided into two. The signal (s 1 2) is directly input to the first multiplier circuit 15, and the other signal is input to the first delay circuit 12. The above-mentioned first delay circuit 12 outputs a first delay signal that delays the input signal by a certain time (S13). The output signal of the first delay circuit 1 2 is also divided into two, one signal (s 1 3) is directly input to the first multiplication circuit 15, and the other signal is input to the second delay circuit 1 3 . The above second delay circuit 1 3 This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297mm) ^ ------- rs — (Please read the precautions on the back before filling this page)
A -10 - 經濟部中央標準局員工消費合作社印製 A7 B7 五、發明説明（8 ) 亦輸出將输入信號延遲一定時間之第2延遲信號（S 1 4 )。上述第2延遲電路13之輸出信號亦被分岐爲二，一 方之信號（S 1 4 )乃直接被輸入前述第2乘算電路1 6 ，另一方之信號則被輸入第3延遲電路1 4。上述第3延 遲電路14亦輸出將輸入信號加以延遲一定時間之第3延 遲信號（S 15)，再將其輸入於前述第2乘算電路16 e 前述第1乘算電路15乃將兩個之输入信號加以乘算 ，以獲得第1乘算輸出信號（S16)。並且，前述第2 乘算電路1 6亦將兩個之輸入信號加以乘算，以獲得第2 乘算輸出信號。 由此，第1乘算輸出信號（S 1 6 )之作用（duty) 乃與輸入信號之頻率成比例，第2乘算输出信號（S 1 7 )之作用亦與輸入信號之頻率成比例。在此情形下’第2 乘算輸出信號（S 1 7 )乃較第1乘算輸出信號（S 1 6 « )延遲相當於第2延遲電路1 3之延遲時間。 然後，加算電路1 7乃將前述第1乘算輸出信號（ S 1 6)及第2乘算輸出信號（S 1 7)加以加算’以獲 得加算輸出信號（S18)。上述兩信號（S16)( S 1 7 )乃如上述，因具有與輸入信號之頻率成比例之作 用，故加算輸出信號（S 1 8 )亦具有與輸入信號之頻率 成比例之作用。 並且，第1乘算輸出信號（S 1 6 )及第2乘算輸出 信號（S17)，乃含有輸入信號之兩倍之髙諧波；進一 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） f , (請先閲讀背面之注意事項再填寫本頁) 裝· 訂 經濟部中央樣準局員工消費合作杜印製 A7 _ _B7_ 五、發明説明（9 ) 步，第2乘算输出信號（S 1 7 )亦如前述’較第1乘算 輸出信號（S 1 6 )延遲相當於第2延遲電路1 3之延遲 時間。爲此，被含在第1乘算輸出信號（S 1 6)及第2 乘算輸出信號（S 1 7 )之輸入信號兩倍之高諧波之一部 分，將被變換爲输入信號之四倍之高諧波。 於是，將加算輸出信號（S 1 8)以LPF 1 8來加 以平滑，則可獲得與輸入信號之頻率成比例之FM解調信 號（副話音信號）。 如上述，含在加算輸出信號（S 1 8 )之輸入信號兩 倍之高諧波，因已減少被變換成四倍之高諧波之分量，故 作爲L P F 1 8，使用與以往之延遲型FM解調電路被插 入於乘算電路輸出側之L P F具有同樣阻遏特性之L P F 時，將可較以往之延遲型F Μ解調電路，能減小高諧波之 漏泄。 - 尤其若將第1延遲電路1 2、第2延遲電路1 3以及 第3延遲電路14之延遲時間各設定爲載波週期之1/8 ，則輸入信號頻率與載波頻率爲相等時，被含在加算輸出 信號（S 1 8 )之高諧波，將僅成爲輸入信號頻率之四倍 之高諧波成分而已；兩倍之高諧波成分將完全被去除，檢 波效率亦將成爲最大。 圖6乃爲表示：圖1所示延遲型FM解調電路使用於 Ε I A J方式TV話音多重之副話音解調時之高諧波之漏 泄情形之波形者。在此情形下之條件乃爲：所有延遲電路 之延遲時間爲載波週期之1/ 8，輸入信號則爲無調變， 本ϋ尺度適用中關家標準（CNS ) A4· ( 210X297公釐)' -12 - {批衣1Τ^ ^ (請先閲讀背面之注意事項再填寫本頁) 312071 A7 _____B7 五、發明説明（10 ) 在乘算電路輸出側級聯連接有截止頻率1 5 · 7 3 4 KHz之一次LPF，及截止頻率2. 12KHz之一次 L P F ° 從圖6之波形可知：高諧波之漏泄，與使用以往之延 遲型FM解調電路時之圖16所示之高諧波之漏泄比較， 已減少約22dB。 圖7乃表示將圖1所示延遲型F Μ解調電路使用於 Ε I A J方式TV話音多重之副話音解調時之解調輸出之 波形者。在此情形下之條件乃爲：所有延遲電路之延遲時 間爲截波週期之1/8，輸入信號爲1 KHz，調變度乃 1 0 0%，在乘算電路输出側級聯連接有：截止頻率 15. 74KHz之一次LPF，及截止頻率2.12 KHz 之一次 LPF。 從圖7可知：較使用以往之延遲型FM解調電路時之 圖1 7所示特性，高諧波向解調输出之漏泄已減少。 經濟部中央標準局員工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁) 圖8則表示圖7所示解調輸出之頻率頻譜者。從圖8 可知：與使用以往之延遲型FM解調電路時之圓18所示 解調輸出之頻率頻譜比較，ΙΟΟΚΗζ爲止之高諧波， 全體言約減少1 5 d B。尤其是相當於載波頻率之兩倍頻 率之部分之高諧波，現顯出3 0 d B以上之減少。輸入信 號已被F Μ解調，瞬間性地將成爲與載波之頻率不相等之 狀態，故此部分之輸入信號頻率兩倍之成分將無法完全去 除》惟在輸入信號接近載波頻率之部分，因大部分均可變 換爲輸入信號頻率之四倍之成分，故以全體言，高諧波之 本紙張尺度適用中國國家標準（CNS〉Α4規格（210X297公釐） -13 - 經濟部中央標準局員工消費合作社印製 A7 ___B7_ 五、發明説明（11 ) 漏泄已減少。 圖9乃表示本發明之第2實施形態之延遲型F Μ解調 電路者》 圖9之延遲型FM解調電路，與圖1所示延遲型FM 解調電路比較，只有第2延遲機構，及第3延遲機構爲不 同，其他均爲相同，故與圖1附有同樣之編號者，其說明 將予以省略。 亦即，作爲獲得前述第2信號之第2延遲機構，乃使 用：輸入前述限制放大器11之輸出信號（S 12)，使 其延遲一定時間之第2延遲電路1 3 a。並且，作爲獲得 前述第3信號之第3延遲機構，則使用：輸入前述限制放 大器1 1之輸出信號（S 1 2)，使其延遲一定時間之第 3延遲電路14a。 上述圖9之延遲型FM解調電路之動作，亦與前述圖 1之延遲型FM解調電路之動作比較，祗有第2信號及第 3信號之發生方法不同而已，基本上乃爲相同。 此外，在圖9之延遲型FM解調電路中，將第1延遲 電路1 2之延遲時間定爲載波週期之1/8，第2延遲電 路1 3 a之延遲時間定爲載波週期之1/4，第3延遲電 路1 4 a之延遲時間定爲載波週期之3/8，則輸入信號 之頻率與載波之頻率相等時，含在加算輸出信號（S 1 8 )之高諧波乃成爲僅爲輸入信號頻率之四倍之髙階波成分 *兩倍之高諧波成分將完全被去除，檢波效率將成爲最大 〇 本紙張尺度適用中國國家標隼（CNS〉A4規格（2丨OX297公釐1 "~— -14 - (裝 訂------^」 (請先閲讀背面之注意事項再填寫本頁) A7 ___B7_ 五、發明説明（l2 ) 〈發明之效果〉 如上述，依據本發明之延遲型FM解調電路，將可使 運算输出信號所含解調信號之高階波之頻率向高域移頻（ shift )，即使使用具有比較緩和之阻遏特性之LPF時 ，亦可充分進行髙諧波之去除。 〈附圖之簡單說明〉 〔圖1〕表示本發明之第1實施形態之延遲型FM解 調電路之方塊圖。 〔圖2〕說明圖1之延遲型FM解調電路之動作所用 之各部分之波形例之圖。 〔圖3〕說明在圖1之延遲型FM解調電路，輸入頻 率較圖2所示頻率爲低時之動作所用之各部分之波形例之 ΓΈΠ 圖。 經濟部中央標隼局員工消費合作社印製 (請先聞讀背面之注意事項再填寫本莧) 〔圖4〕說明在圖1之延遲型FM解調電路，輸入頻 率較圖2所示頻率爲高時之動作所用之各部分之波形例之 圖。 〔圖5〕表示在圖1之延遲型FM解調電路，輸入E I A J方式TV話音多重廣播信號中所含副話音信號時之 輸入信號及輸出信號之頻率頻帶之一例之圖。 〔圖6〕表示將圖1之延遲型FM解調電路使用在 E I A J方式TV話音多重之副話音解調時之高諧波之漏 泄情形之波形圖》 象紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -15 - 經濟部中央梯準局員工消費合作社印製 A7 _______ B7 五、發明説明（l3 ) 〔圖7〕表示將圖1之延遲型FM解調電路使用於 E I A J方式TV話音多重之副話音解調時之解調輸出之 波形圖。 〔圖8〕表示將圖1之延遲型FM解調電路使用於 E I A J方式TV話音多重之副話音解調時之解調輸出之 頻率頻譜之圖。 〔圖9〕表示本發明之第2實施形態之延遲型FM解 調電路之方塊圖。 〔圖1 0〕以往之延遲型FM解調型電路之方塊圖》 〔圖1 1〕爲說明以往之延遲型FM解調電路之動作 ’顯示各部分之波形例之圖。 〔圖1 2〕爲表示在以往之延遲型FM解調電路，輸 入頻率較圖1 1所示頻率爲低時之動作，顯示各部分之波 形例之圖。 〔圓1 3〕爲表示在以往之延遲型FM解調電路，輸 入頻率較圖1 1所示頻率爲高時之動作，顯示各部分之波 形例之圖》 〔圖1 4〕在以往之延遲型FM解調電路，輸入 E I A J方式TV話音多重廣播信號中所含副話音信號時 之輸入信號及輸出信號之頻率頻帶之一例之圖。 〔圖1 5〕表示以往之延遲型FM解調電路之輸入信 號頻率與FM解調输出電壓之關係之特性圖》 〔圖1 6〕表示以往之延遲型FM解調電路，使用於 E I A J方式TV話音多重之副話音解調時之高諧波漏泄 本紙張尺度適用中國國家標隼（CNS ) A4規格（210X297公釐）~ ' ---------------Γ 裝------訂------f i (請先閱讀背面之注意事項再填寫本頁) SI 2071 A7 B7五、發明説明（Η ) 情形之波形圖。 〔圖1 7〕表示以往已延遲型FM解調電路使用於 E I A J方式TV話音多重之副話音解調時之解調輸出之 波形圖。 〔圖1 8〕表示以往之延遲型FM解調電路，使用於 E I A J方式TV話音多重之副話音解調時之解調輸出之 頻率頻譜之圖。 (附圖中編號之說明） 11……限制放大器， 12……第1延遲電路， 1 3、1 3 a……第2延遲電路，1 4、1 4 a……第3 延遲電路，1 5……第1乘算電路，1 6……第2乘算電 路，1 7 ......加算電路，1 8 ...... L P F。 ---------------IT------ (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -17 -A -10-Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs A7 B7 V. Description of invention (8) It also outputs a second delay signal (S 1 4) that delays the input signal for a certain time. The output signal of the second delay circuit 13 is also divided into two, one signal (S 1 4) is directly input to the second multiplication circuit 16, and the other signal is input to the third delay circuit 14. The third delay circuit 14 also outputs a third delay signal (S 15) that delays the input signal for a certain period of time, and then inputs it to the second multiplication circuit 16e. The first multiplication circuit 15 divides the two The input signal is multiplied to obtain the first multiplied output signal (S16). In addition, the second multiplication circuit 16 also multiplies the two input signals to obtain a second multiplication output signal. Therefore, the duty of the first multiplied output signal (S 16) is proportional to the frequency of the input signal, and the role of the second multiplied output signal (S 1 7) is also proportional to the frequency of the input signal. In this case, the second multiplied output signal (S 1 7) is delayed from the first multiplied output signal (S 1 6 «) by the delay time of the second delay circuit 13. Then, the addition circuit 17 adds the aforementioned first multiplication output signal (S 16) and second multiplication output signal (S 17) to obtain an addition output signal (S18). The above two signals (S16) (S17) are as described above, because they have a function proportional to the frequency of the input signal, so the addition output signal (S18) also has a function proportional to the frequency of the input signal. In addition, the first multiplied output signal (S 1 6) and the second multiplied output signal (S17) contain high harmonics that are twice the input signal; the paper standard applies to the Chinese National Standard (CNS) A4 specification ( 210X297mm) f, (please read the precautions on the back before filling in this page) Binding · Order A7 _ _B7_ for consumer cooperation of the Central Prototype Bureau of the Ministry of Economic Affairs. V. Invention description (9) Step 2nd multiplication The output signal (S 1 7) is also delayed as described above from the first multiplied output signal (S 1 6) by the delay time of the second delay circuit 13. For this reason, part of the higher harmonics contained in the input signal of the first multiplied output signal (S 16) and the second multiplied output signal (S 1 7) will be converted to four times the input signal High harmonics. Thus, by adding LPF 18 to smooth the added output signal (S 18), an FM demodulated signal (sub-voice signal) proportional to the frequency of the input signal can be obtained. As mentioned above, the high harmonic contained in the input signal of the added output signal (S 1 8) is twice, because the component converted into a high harmonic of four times is reduced, so it is used as the LPF 1 8 and the conventional delay type When the FM demodulation circuit is inserted into the LPF with the same suppression characteristics on the output side of the multiplier circuit, it will be able to reduce the leakage of high harmonics compared to the conventional delay-type FM demodulation circuit. -In particular, if the delay times of the first delay circuit 1 2, the second delay circuit 1 3, and the third delay circuit 14 are each set to 1/8 of the carrier cycle, the input signal frequency and the carrier frequency are equal to each other. Adding the high harmonics of the output signal (S 1 8) will only become a high harmonic component that is four times the frequency of the input signal; twice the high harmonic component will be completely removed, and the detection efficiency will become the largest. Fig. 6 is a waveform showing a high-harmonic leakage situation when the delay-type FM demodulation circuit shown in Fig. 1 is used in the demodulation of sub-voices with TV voice multiplexing in the EIAJ mode. In this case, the condition is: the delay time of all delay circuits is 1/8 of the carrier cycle, and the input signal is unmodulated. This standard applies to Zhongguanjia Standard (CNS) A4 · (210X297mm) ' -12-{Bai Yi 1Τ ^ ^ (please read the precautions on the back before filling in this page) 312071 A7 _____B7 5. Description of the invention (10) There is a cut-off frequency 1 5 · 7 3 4 in the cascade connection on the output side of the multiplier circuit KHz once LPF, and cut-off frequency 2. 12KHz once LPF ° From the waveform in Figure 6, we can see that the leakage of high harmonics and the leakage of high harmonics shown in Figure 16 when using the conventional delayed FM demodulation circuit In comparison, it has been reduced by about 22dB. Fig. 7 is a diagram showing the waveform of the demodulated output when the delay-type FM demodulation circuit shown in Fig. 1 is used for the sub-voice demodulation of TV voice multiplexing in the EIAJ mode. The condition in this case is: the delay time of all delay circuits is 1/8 of the cutoff period, the input signal is 1 KHz, the modulation degree is 100%, and the cascade connection on the output side of the multiplier circuit is: The cut-off frequency is 15.74 KHz once LPF, and the cut-off frequency is 2.12 KHz once LPF. It can be seen from FIG. 7 that the leakage of high harmonics to the demodulation output has been reduced compared to the characteristics shown in FIG. 17 when the conventional delay-type FM demodulation circuit is used. Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs (please read the precautions on the back before filling in this page). Figure 8 shows the frequency spectrum of the demodulated output shown in Figure 7. It can be seen from FIG. 8 that compared with the frequency spectrum of the demodulated output shown in circle 18 when using a conventional delay-type FM demodulation circuit, the total harmonics up to 100 KHz are reduced by approximately 15 dB. In particular, the higher harmonics equivalent to twice the carrier frequency now show a reduction of more than 30 dB. The input signal has been demodulated by FM and will instantly become unequal to the carrier frequency. Therefore, the component of the input signal frequency that is twice the frequency of this part will not be completely removed. However, the part of the input signal close to the carrier frequency Some parts can be converted to four times the frequency of the input signal. Therefore, in all words, the paper standard of high harmonics is applicable to the Chinese national standard (CNS> Α4 specification (210X297 mm) -13-Employee consumption of the Central Standards Bureau of the Ministry of Economic Affairs Printed by the cooperative A7 ___B7_ V. Description of the invention (11) Leakage has been reduced. FIG. 9 shows the delayed FM demodulation circuit of the second embodiment of the present invention. FIG. 9 The delayed FM demodulation circuit of FIG. 9 and FIG. 1 In the comparison of the delay-type FM demodulation circuit shown, only the second delay mechanism and the third delay mechanism are different, and the others are the same, so the descriptions of those with the same number as in FIG. 1 will be omitted. That is, as The second delay mechanism for obtaining the aforementioned second signal uses a second delay circuit 1 3 a which inputs the output signal (S 12) of the aforementioned limiting amplifier 11 and delays it for a certain period of time. The third delay mechanism of the third signal uses a third delay circuit 14a that inputs the output signal (S 1 2) of the limiting amplifier 11 and delays it for a certain period of time. The above-mentioned delay type FM demodulation circuit of FIG. 9 The operation is also compared with the operation of the delay-type FM demodulation circuit shown in FIG. 1 above, but the second signal and the third signal are generated in different ways, which are basically the same. In addition, the delay-type FM solution in FIG. 9 In the tuning circuit, the delay time of the first delay circuit 12 is set to 1/8 of the carrier cycle, the delay time of the second delay circuit 1 3 a is set to 1/4 of the carrier cycle, and the third delay circuit 1 4 a The delay time is set at 3/8 of the carrier cycle, and when the frequency of the input signal is equal to the frequency of the carrier, the high harmonics contained in the summed output signal (S 1 8) becomes a high order that is only four times the frequency of the input signal The wave component * twice the high harmonic component will be completely removed, and the detection efficiency will become the largest. The paper standard is applicable to the Chinese national standard falcon (CNS> A4 specification (2 丨 OX297mm 1 " ~ — -14-(Binding ------ ^ "(Please read the notes on the back before filling this page) A7 ___B7_ V. Description of the invention (l2) <Effects of the invention> As mentioned above, the delayed FM demodulation circuit according to the present invention will shift the frequency of the high-order wave of the demodulated signal contained in the operation output signal to the high-domain frequency ( shift), even when using an LPF with relatively mild suppression characteristics, the high harmonics can be fully removed. <Brief description of the drawings> [FIG. 1] shows the delayed FM demodulation of the first embodiment of the present invention Block diagram of the circuit. [FIG. 2] A diagram illustrating examples of waveforms of various parts used in the operation of the delay-type FM demodulation circuit of FIG. 1. [FIG. 3] illustrates the delay-type FM demodulation circuit of FIG. 1. Fig. 2 is a ΓΈΠ diagram of waveform examples of the parts used for the operation when the frequency is low. Printed by the Employee Consumer Cooperative of the Central Standard Falcon Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling in this amaranth) A diagram of waveform examples of various parts used for high-speed operations. [FIG. 5] A diagram showing an example of the frequency band of the input signal and the output signal when the sub-voice signal included in the TV voice multiple broadcast signal of the E I A J system is input to the delay-type FM demodulation circuit of FIG. 1. [Figure 6] A waveform diagram showing the leakage of high harmonics when the delayed FM demodulation circuit of FIG. 1 is used in the EIAJ mode TV voice multiple sub-voice demodulation. The image paper scale is applicable to the Chinese National Standard (CNS ) A4 specification (210X297 mm) -15-A7 printed by the Employee Consumer Cooperative of the Central Escalation Bureau of the Ministry of Economy _______ B7 V. Description of the invention (l3) [Figure 7] indicates that the delayed FM demodulation circuit of FIG. 1 is used in EIAJ Waveform diagram of demodulation output when the secondary voice of TV voice is demodulated. [FIG. 8] A diagram showing the frequency spectrum of the demodulated output when the delay-type FM demodulation circuit of FIG. 1 is used for E I A J mode TV voice multiple sub-voice demodulation. [Fig. 9] A block diagram of a delay type FM demodulation circuit according to a second embodiment of the present invention. [FIG. 10] Block diagram of a conventional delay-type FM demodulation circuit. [FIG. 11] is a diagram illustrating the operation of a conventional delay-type FM demodulation circuit. A waveform example showing each part. [FIG. 12] is a diagram showing the operation of the conventional delay-type FM demodulation circuit when the input frequency is lower than the frequency shown in FIG. 11, and shows the waveform examples of each part. [Circle 1 3] shows the operation of the conventional delay-type FM demodulation circuit when the input frequency is higher than the frequency shown in FIG. 11 and shows a waveform example of each part. [FIG. 14] Delay in the conventional Type FM demodulation circuit, an example of the frequency band of the input signal and output signal when the sub-voice signal is included in the EIAJ system TV voice multiple broadcast signal. [Figure 15] Characteristic diagram showing the relationship between the input signal frequency and the FM demodulation output voltage of the conventional delay-type FM demodulation circuit. [FIG. 16] Representing the conventional delay-type FM demodulation circuit, used in EIAJ TV High harmonic leakage during secondary speech demodulation of multiple voices This paper standard applies to China National Standard Falcon (CNS) A4 specification (210X297mm) ~ '--------------- Γ loaded ------ ordered ------ fi (please read the precautions on the back before filling this page) SI 2071 A7 B7 Fifth, the description of the invention (Η) waveform diagram. [FIG. 17] A waveform diagram showing the demodulated output of the conventional delay-type FM demodulation circuit used in the E I A J mode TV voice multiplex sub-voice demodulation. [FIG. 18] A diagram showing the frequency spectrum of the demodulated output when the conventional delay-type FM demodulation circuit is used for the demodulation of the sub-voice of TV voice multiplexing in the E I A J mode. (Explanation of the numbers in the drawings) 11 ... limiting amplifier, 12 ... first delay circuit, 1 3, 1 3 a ... second delay circuit, 1 4, 1 4 a ... third delay circuit, 1 5 ... 1st multiplication circuit, 1 6 ... 2nd multiplication circuit, 1 7 ... addition circuit, 1 8 ... LPF. --------------- IT ------ (Please read the precautions on the back before filling out this page) The paper standard printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs is suitable for China National Standard (CNS) A4 specification (210X297mm) -17-