TW274617B - Programmable data exchange device - Google Patents

Programmable data exchange device

Info

Publication number
TW274617B
TW274617B TW84112455A TW84112455A TW274617B TW 274617 B TW274617 B TW 274617B TW 84112455 A TW84112455 A TW 84112455A TW 84112455 A TW84112455 A TW 84112455A TW 274617 B TW274617 B TW 274617B
Authority
TW
Taiwan
Prior art keywords
data
pin
memory
coupled
data exchange
Prior art date
Application number
TW84112455A
Other languages
Chinese (zh)
Inventor
Chii-Lieh Gau
Original Assignee
Chii-Lieh Gau
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chii-Lieh Gau filed Critical Chii-Lieh Gau
Priority to TW84112455A priority Critical patent/TW274617B/en
Application granted granted Critical
Publication of TW274617B publication Critical patent/TW274617B/en

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

A programmable data exchange device, that is coupled between one memory and one external system, in which the memory features several data I/O pins, and some of them have defects, some perfect, comprises: one data exchange unit with the first multiple data I/O pin and the second multiple data I/O pin, in which the first multiple data I/O pin is coupled to data I/O pin of the memory, and the second multiple data I/O pin is coupled to the external system, and the data exchange unit includes one memory unit for storing connection data of the first multiple data I/O pin which should correspond to the second multiple I/O pin; one testing unit coupled to the external system and the data exchange unit for controlling the data exchange in order to conduct test to the memory, and disabling the pins of the first multiple data I/O pin of the data exchange unit, which are coupled to data I/O pin of defect data I/O pin in the memory, and among the second multiple data exchange pin which is not coupled with perfect data I/O pin in the memory, and controlling storage data access in the memory unit of the memory exchange unit; one controlling unit coupled to the external system and the data exchange unit for controlling data transmission direction of the data exchange unit.
TW84112455A 1995-11-22 1995-11-22 Programmable data exchange device TW274617B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW84112455A TW274617B (en) 1995-11-22 1995-11-22 Programmable data exchange device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW84112455A TW274617B (en) 1995-11-22 1995-11-22 Programmable data exchange device

Publications (1)

Publication Number Publication Date
TW274617B true TW274617B (en) 1996-04-21

Family

ID=51397239

Family Applications (1)

Application Number Title Priority Date Filing Date
TW84112455A TW274617B (en) 1995-11-22 1995-11-22 Programmable data exchange device

Country Status (1)

Country Link
TW (1) TW274617B (en)

Similar Documents

Publication Publication Date Title
KR100276654B1 (en) Semiconductor device with internal memory
TW256894B (en) Method and apparatus for multiple memory bank selection
TW279218B (en) Low pin count-wide memory devices and systems and methods using the same
MY113861A (en) Memory testing apparatus
EP1986233A3 (en) On-chip reconfigurable memory
EP0234937A3 (en) Tag buffer with testing capability
EP0125633A3 (en) Testing apparatus for redundant memory
TW352466B (en) Apparatus and method for testing integrated circuit
EP0642134A3 (en) Test of a static random access memory.
EP0758785A3 (en) Semiconductor memory device and method of manufacturing the same
TW329527B (en) The semiconductor memory device with redundant function
GB9411950D0 (en) Memory test system
TW274617B (en) Programmable data exchange device
CA2124910A1 (en) Method and Apparatus for Including the States of Nonscannable Parts in a Scan Chain
TW238387B (en) Decoding circuit for semiconductor memory device and its process
DE69127870T2 (en) Mode switching for a storage system with scan diagnostics
CA2116314A1 (en) Apparatus and method for achieving high-speed data read access to memory
KR100208276B1 (en) Apparatus for doubling data in full electronic switching system
JPH07260884A (en) Semiconductor integrated circuit device
AU4658397A (en) Data retention test for static memory cell
AU7503998A (en) Time division multiplex highway switch control system and control method of T-S-T three-stage switches in electronic switching system
KR0183196B1 (en) Td bus testing method of electronic switching system
JPH04271100A (en) Integrated semiconductor memory
JPS6453399A (en) Semiconductor memory device
EP0363905A3 (en) I/o apparatus for programmable controller