TW266321B - Process for high-voltage CMOS transistor - Google Patents

Abstract

A process of high-voltage CMOS transistor, that is applicable to implement the first-type MOS transistor and the second-type MOS transistor on one first-type semiconductor substrate, comprises the steps of: forming one second-type well area and two second-type lightly doped area on predetermined position of the above first-type semiconductor substrate; forming two first-type lightly doped area on predetermined position of the above second-type well area; forming masking material on the above semiconductor substrate where is predetermined to form as drain, source and gate electrode of the above first-type and second-type MOS transistor; with above masking material as mask separately doping the first-type impurity and the second-type impurity to the above first-type lightly doped area and the second-type lightly doped area where is between area predetermined to form as the above drain, source and drain electrode, so as to form the first-type floating area and the second-type floating area; with the above masking material as mask implementing oxidization to form field oxide; removing the above masking material; forming gate oxide on the second-type well area and the first-type semiconductor substrate between the above filed oxides; forming conductive layer on the above gate oxide, and the above conductive layer crossing between the above field oxides to separately form the above gate; with the above field oxide and gate as mask separately doping the first-type impurity and the second-type impurity to the above first-type lightly doped area and the second-type lightly doped area to separately form the above first-type and second-type drain and source area.